// Copyright (c) 2014 Qualcomm Atheros, Inc. All rights reserved. // $ATH_LICENSE_HW_HDR_C$ // // DO NOT EDIT! This file is automatically generated // These definitions are tied to a particular hardware layout #ifndef _MPROT_SS_11AC_SU_INFO_H_ #define _MPROT_SS_11AC_SU_INFO_H_ #if !defined(__ASSEMBLER__) #endif // ################ START SUMMARY ################# // // Dword Fields // 0 struct l_sig_a l_sig_a_bw20; // 1 struct l_sig_a l_sig_a_bw40; // 2 struct l_sig_a l_sig_a_bw80; // 3 struct l_sig_a l_sig_a_bw160; // 4-5 struct vht_sig_a vht_sig_a_bw20; // 6-7 struct vht_sig_a vht_sig_a_bw40; // 8-9 struct vht_sig_a vht_sig_a_bw80; // 10-11 struct vht_sig_a vht_sig_a_bw160; // 12 struct vht_sig_b_su20 vht_sig_b_bw20; // 13 struct vht_sig_b_mac_su40 vht_sig_b_bw40; // 14 struct vht_sig_b_mac_su80 vht_sig_b_bw80; // 15 struct vht_sig_b_mac_su160 vht_sig_b_bw160; // 16 struct tx_service tx_service_bw20; // 17 struct tx_service tx_service_bw40; // 18 struct tx_service tx_service_bw80; // 19 struct tx_service tx_service_bw160; // 20 duration_bw20[15:0], duration_bw40[31:16] // 21 duration_bw80[15:0], duration_bw160[31:16] // 22 num_vht_mac_pad_bw20[19:0], reserved_22[31:20] // 23 num_vht_mac_pad_bw40[19:0], reserved_23[31:20] // 24 num_vht_mac_pad_bw80[19:0], reserved_24[31:20] // 25 num_vht_mac_pad_bw160[19:0], reserved_25[31:20] // // ################ END SUMMARY ################# #define NUM_OF_DWORDS_MPROT_SS_11AC_SU_INFO 26 struct mprot_ss_11ac_su_info { struct l_sig_a l_sig_a_bw20; struct l_sig_a l_sig_a_bw40; struct l_sig_a l_sig_a_bw80; struct l_sig_a l_sig_a_bw160; struct vht_sig_a vht_sig_a_bw20; struct vht_sig_a vht_sig_a_bw40; struct vht_sig_a vht_sig_a_bw80; struct vht_sig_a vht_sig_a_bw160; struct vht_sig_b_su20 vht_sig_b_bw20; struct vht_sig_b_mac_su40 vht_sig_b_bw40; struct vht_sig_b_mac_su80 vht_sig_b_bw80; struct vht_sig_b_mac_su160 vht_sig_b_bw160; struct tx_service tx_service_bw20; struct tx_service tx_service_bw40; struct tx_service tx_service_bw80; struct tx_service tx_service_bw160; volatile uint32_t duration_bw20 : 16, //[15:0] duration_bw40 : 16; //[31:16] volatile uint32_t duration_bw80 : 16, //[15:0] duration_bw160 : 16; //[31:16] volatile uint32_t num_vht_mac_pad_bw20 : 20, //[19:0] reserved_22 : 12; //[31:20] volatile uint32_t num_vht_mac_pad_bw40 : 20, //[19:0] reserved_23 : 12; //[31:20] volatile uint32_t num_vht_mac_pad_bw80 : 20, //[19:0] reserved_24 : 12; //[31:20] volatile uint32_t num_vht_mac_pad_bw160 : 20, //[19:0] reserved_25 : 12; //[31:20] }; /* struct l_sig_a l_sig_a_bw20 This field has exactly the same contents as the L_SIG_A TLV (without the tag/length word) struct l_sig_a l_sig_a_bw40 This field has exactly the same contents as the L_SIG_A TLV (without the tag/length word) struct l_sig_a l_sig_a_bw80 This field has exactly the same contents as the L_SIG_A TLV (without the tag/length word) struct l_sig_a l_sig_a_bw160 This field has exactly the same contents as the L_SIG_A TLV (without the tag/length word) struct vht_sig_a vht_sig_a_bw20 VHT_SIG_A field setting for 20 MHz transmission This field has exactly the same contents as the VHT_SIG_A TLV (without the tag/length word) struct vht_sig_a vht_sig_a_bw40 VHT_SIG_A field setting for 40 MHz transmission This field has exactly the same contents as the VHT_SIG_A TLV (without the tag/length word) struct vht_sig_a vht_sig_a_bw80 VHT_SIG_A field setting for 40 MHz transmission This field has exactly the same contents as the VHT_SIG_A TLV (without the tag/length word) struct vht_sig_a vht_sig_a_bw160 VHT_SIG_A field setting for 160 MHz transmission This field has exactly the same contents as the VHT_SIG_A TLV (without the tag/length word) struct vht_sig_b_su20 vht_sig_b_bw20 VHT_SIG_B field setting for 20 MHz transmission This field has exactly the same contents as the VHT_SIG_B_SU20 TLV (without the tag/length word) struct vht_sig_b_mac_su40 vht_sig_b_bw40 VHT_SIG_B field setting for 40 MHz transmission This field has exactly the same contents as the VHT_SIG_B_SU40 TLV (without the tag/length word) struct vht_sig_b_mac_su80 vht_sig_b_bw80 VHT_SIG_B field setting for 40 MHz transmission This field has exactly the same contents as the VHT_SIG_B_SU80 TLV (without the tag/length word) struct vht_sig_b_mac_su160 vht_sig_b_bw160 VHT_SIG_B field setting for 160 MHz transmission This field has exactly the same contents as the VHT_SIG_B_SU80 TLV (without the tag/length word) struct tx_service tx_service_bw20 HT SERVICE field setting for 20 MHz transmission This field has exactly the same contents as the TX_SERVICE TLV (without the tag/length word) struct tx_service tx_service_bw40 HT SERVICE field setting for 40 MHz transmission This field has exactly the same contents as the TX_SERVICE TLV (without the tag/length word) struct tx_service tx_service_bw80 HT SERVICE field setting for 80 MHz transmission This field has exactly the same contents as the TX_SERVICE TLV (without the tag/length word) struct tx_service tx_service_bw160 HT SERVICE field setting for 160 MHz transmission This field has exactly the same contents as the TX_SERVICE TLV (without the tag/length word) duration_bw20 Duration in the generated RTS/CTS frame for 20 MHz transmission. duration_bw40 Duration in the generated RTS/CTS frame for 40 MHz transmission. duration_bw80 Duration in the generated RTS/CTS frame for 80 MHz transmission. duration_bw160 Duration in the generated RTS/CTS frame for 160 MHz transmission. num_vht_mac_pad_bw20 Number of MAC pad bytes after the end of the last MPDU. The vht_ppdu_bit_length = service_bits + psdu_octet * 8 + num_vht_mac_pad * 8 + tail_bits + phy_pad_bits reserved_22 num_vht_mac_pad_bw40 Number of MAC pad bytes after the end of the last MPDU. The vht_ppdu_bit_length = service_bits + psdu_octet * 8 + num_vht_mac_pad * 8 + tail_bits + phy_pad_bits reserved_23 num_vht_mac_pad_bw80 Number of MAC pad bytes after the end of the last MPDU. The vht_ppdu_bit_length = service_bits + psdu_octet * 8 + num_vht_mac_pad * 8 + tail_bits + phy_pad_bits reserved_24 num_vht_mac_pad_bw160 Number of MAC pad bytes after the end of the last MPDU. The vht_ppdu_bit_length = service_bits + psdu_octet * 8 + num_vht_mac_pad * 8 + tail_bits + phy_pad_bits reserved_25 */ #define MPROT_SS_11AC_SU_INFO_0_L_SIG_A_L_SIG_A_BW20_OFFSET 0x00000000 #define MPROT_SS_11AC_SU_INFO_0_L_SIG_A_L_SIG_A_BW20_LSB 20 #define MPROT_SS_11AC_SU_INFO_0_L_SIG_A_L_SIG_A_BW20_MASK 0xffffffff #define MPROT_SS_11AC_SU_INFO_1_L_SIG_A_L_SIG_A_BW40_OFFSET 0x00000004 #define MPROT_SS_11AC_SU_INFO_1_L_SIG_A_L_SIG_A_BW40_LSB 20 #define MPROT_SS_11AC_SU_INFO_1_L_SIG_A_L_SIG_A_BW40_MASK 0xffffffff #define MPROT_SS_11AC_SU_INFO_2_L_SIG_A_L_SIG_A_BW80_OFFSET 0x00000008 #define MPROT_SS_11AC_SU_INFO_2_L_SIG_A_L_SIG_A_BW80_LSB 20 #define MPROT_SS_11AC_SU_INFO_2_L_SIG_A_L_SIG_A_BW80_MASK 0xffffffff #define MPROT_SS_11AC_SU_INFO_3_L_SIG_A_L_SIG_A_BW160_OFFSET 0x0000000c #define MPROT_SS_11AC_SU_INFO_3_L_SIG_A_L_SIG_A_BW160_LSB 20 #define MPROT_SS_11AC_SU_INFO_3_L_SIG_A_L_SIG_A_BW160_MASK 0xffffffff #define MPROT_SS_11AC_SU_INFO_4_VHT_SIG_A_VHT_SIG_A_BW20_OFFSET 0x00000010 #define MPROT_SS_11AC_SU_INFO_4_VHT_SIG_A_VHT_SIG_A_BW20_LSB 20 #define MPROT_SS_11AC_SU_INFO_4_VHT_SIG_A_VHT_SIG_A_BW20_MASK 0xffffffff #define MPROT_SS_11AC_SU_INFO_5_VHT_SIG_A_VHT_SIG_A_BW20_OFFSET 0x00000014 #define MPROT_SS_11AC_SU_INFO_5_VHT_SIG_A_VHT_SIG_A_BW20_LSB 20 #define MPROT_SS_11AC_SU_INFO_5_VHT_SIG_A_VHT_SIG_A_BW20_MASK 0xffffffff #define MPROT_SS_11AC_SU_INFO_6_VHT_SIG_A_VHT_SIG_A_BW40_OFFSET 0x00000018 #define MPROT_SS_11AC_SU_INFO_6_VHT_SIG_A_VHT_SIG_A_BW40_LSB 20 #define MPROT_SS_11AC_SU_INFO_6_VHT_SIG_A_VHT_SIG_A_BW40_MASK 0xffffffff #define MPROT_SS_11AC_SU_INFO_7_VHT_SIG_A_VHT_SIG_A_BW40_OFFSET 0x0000001c #define MPROT_SS_11AC_SU_INFO_7_VHT_SIG_A_VHT_SIG_A_BW40_LSB 20 #define MPROT_SS_11AC_SU_INFO_7_VHT_SIG_A_VHT_SIG_A_BW40_MASK 0xffffffff #define MPROT_SS_11AC_SU_INFO_8_VHT_SIG_A_VHT_SIG_A_BW80_OFFSET 0x00000020 #define MPROT_SS_11AC_SU_INFO_8_VHT_SIG_A_VHT_SIG_A_BW80_LSB 20 #define MPROT_SS_11AC_SU_INFO_8_VHT_SIG_A_VHT_SIG_A_BW80_MASK 0xffffffff #define MPROT_SS_11AC_SU_INFO_9_VHT_SIG_A_VHT_SIG_A_BW80_OFFSET 0x00000024 #define MPROT_SS_11AC_SU_INFO_9_VHT_SIG_A_VHT_SIG_A_BW80_LSB 20 #define MPROT_SS_11AC_SU_INFO_9_VHT_SIG_A_VHT_SIG_A_BW80_MASK 0xffffffff #define MPROT_SS_11AC_SU_INFO_10_VHT_SIG_A_VHT_SIG_A_BW160_OFFSET 0x00000028 #define MPROT_SS_11AC_SU_INFO_10_VHT_SIG_A_VHT_SIG_A_BW160_LSB 20 #define MPROT_SS_11AC_SU_INFO_10_VHT_SIG_A_VHT_SIG_A_BW160_MASK 0xffffffff #define MPROT_SS_11AC_SU_INFO_11_VHT_SIG_A_VHT_SIG_A_BW160_OFFSET 0x0000002c #define MPROT_SS_11AC_SU_INFO_11_VHT_SIG_A_VHT_SIG_A_BW160_LSB 20 #define MPROT_SS_11AC_SU_INFO_11_VHT_SIG_A_VHT_SIG_A_BW160_MASK 0xffffffff #define MPROT_SS_11AC_SU_INFO_12_VHT_SIG_B_SU20_VHT_SIG_B_BW20_OFFSET 0x00000030 #define MPROT_SS_11AC_SU_INFO_12_VHT_SIG_B_SU20_VHT_SIG_B_BW20_LSB 20 #define MPROT_SS_11AC_SU_INFO_12_VHT_SIG_B_SU20_VHT_SIG_B_BW20_MASK 0xffffffff #define MPROT_SS_11AC_SU_INFO_13_VHT_SIG_B_MAC_SU40_VHT_SIG_B_BW40_OFFSET 0x00000034 #define MPROT_SS_11AC_SU_INFO_13_VHT_SIG_B_MAC_SU40_VHT_SIG_B_BW40_LSB 20 #define MPROT_SS_11AC_SU_INFO_13_VHT_SIG_B_MAC_SU40_VHT_SIG_B_BW40_MASK 0xffffffff #define MPROT_SS_11AC_SU_INFO_14_VHT_SIG_B_MAC_SU80_VHT_SIG_B_BW80_OFFSET 0x00000038 #define MPROT_SS_11AC_SU_INFO_14_VHT_SIG_B_MAC_SU80_VHT_SIG_B_BW80_LSB 20 #define MPROT_SS_11AC_SU_INFO_14_VHT_SIG_B_MAC_SU80_VHT_SIG_B_BW80_MASK 0xffffffff #define MPROT_SS_11AC_SU_INFO_15_VHT_SIG_B_MAC_SU160_VHT_SIG_B_BW160_OFFSET 0x0000003c #define MPROT_SS_11AC_SU_INFO_15_VHT_SIG_B_MAC_SU160_VHT_SIG_B_BW160_LSB 20 #define MPROT_SS_11AC_SU_INFO_15_VHT_SIG_B_MAC_SU160_VHT_SIG_B_BW160_MASK 0xffffffff #define MPROT_SS_11AC_SU_INFO_16_TX_SERVICE_TX_SERVICE_BW20_OFFSET 0x00000040 #define MPROT_SS_11AC_SU_INFO_16_TX_SERVICE_TX_SERVICE_BW20_LSB 20 #define MPROT_SS_11AC_SU_INFO_16_TX_SERVICE_TX_SERVICE_BW20_MASK 0xffffffff #define MPROT_SS_11AC_SU_INFO_17_TX_SERVICE_TX_SERVICE_BW40_OFFSET 0x00000044 #define MPROT_SS_11AC_SU_INFO_17_TX_SERVICE_TX_SERVICE_BW40_LSB 20 #define MPROT_SS_11AC_SU_INFO_17_TX_SERVICE_TX_SERVICE_BW40_MASK 0xffffffff #define MPROT_SS_11AC_SU_INFO_18_TX_SERVICE_TX_SERVICE_BW80_OFFSET 0x00000048 #define MPROT_SS_11AC_SU_INFO_18_TX_SERVICE_TX_SERVICE_BW80_LSB 20 #define MPROT_SS_11AC_SU_INFO_18_TX_SERVICE_TX_SERVICE_BW80_MASK 0xffffffff #define MPROT_SS_11AC_SU_INFO_19_TX_SERVICE_TX_SERVICE_BW160_OFFSET 0x0000004c #define MPROT_SS_11AC_SU_INFO_19_TX_SERVICE_TX_SERVICE_BW160_LSB 20 #define MPROT_SS_11AC_SU_INFO_19_TX_SERVICE_TX_SERVICE_BW160_MASK 0xffffffff /* Description MPROT_SS_11AC_SU_INFO_20_DURATION_BW20 Duration in the generated RTS/CTS frame for 20 MHz transmission. */ #define MPROT_SS_11AC_SU_INFO_20_DURATION_BW20_OFFSET 0x00000050 #define MPROT_SS_11AC_SU_INFO_20_DURATION_BW20_LSB 0 #define MPROT_SS_11AC_SU_INFO_20_DURATION_BW20_MASK 0x0000ffff /* Description MPROT_SS_11AC_SU_INFO_20_DURATION_BW40 Duration in the generated RTS/CTS frame for 40 MHz transmission. */ #define MPROT_SS_11AC_SU_INFO_20_DURATION_BW40_OFFSET 0x00000050 #define MPROT_SS_11AC_SU_INFO_20_DURATION_BW40_LSB 16 #define MPROT_SS_11AC_SU_INFO_20_DURATION_BW40_MASK 0xffff0000 /* Description MPROT_SS_11AC_SU_INFO_21_DURATION_BW80 Duration in the generated RTS/CTS frame for 80 MHz transmission. */ #define MPROT_SS_11AC_SU_INFO_21_DURATION_BW80_OFFSET 0x00000054 #define MPROT_SS_11AC_SU_INFO_21_DURATION_BW80_LSB 0 #define MPROT_SS_11AC_SU_INFO_21_DURATION_BW80_MASK 0x0000ffff /* Description MPROT_SS_11AC_SU_INFO_21_DURATION_BW160 Duration in the generated RTS/CTS frame for 160 MHz transmission. */ #define MPROT_SS_11AC_SU_INFO_21_DURATION_BW160_OFFSET 0x00000054 #define MPROT_SS_11AC_SU_INFO_21_DURATION_BW160_LSB 16 #define MPROT_SS_11AC_SU_INFO_21_DURATION_BW160_MASK 0xffff0000 /* Description MPROT_SS_11AC_SU_INFO_22_NUM_VHT_MAC_PAD_BW20 Number of MAC pad bytes after the end of the last MPDU. The vht_ppdu_bit_length = service_bits + psdu_octet * 8 + num_vht_mac_pad * 8 + tail_bits + phy_pad_bits */ #define MPROT_SS_11AC_SU_INFO_22_NUM_VHT_MAC_PAD_BW20_OFFSET 0x00000058 #define MPROT_SS_11AC_SU_INFO_22_NUM_VHT_MAC_PAD_BW20_LSB 0 #define MPROT_SS_11AC_SU_INFO_22_NUM_VHT_MAC_PAD_BW20_MASK 0x000fffff /* Description MPROT_SS_11AC_SU_INFO_22_RESERVED_22 */ #define MPROT_SS_11AC_SU_INFO_22_RESERVED_22_OFFSET 0x00000058 #define MPROT_SS_11AC_SU_INFO_22_RESERVED_22_LSB 20 #define MPROT_SS_11AC_SU_INFO_22_RESERVED_22_MASK 0xfff00000 /* Description MPROT_SS_11AC_SU_INFO_23_NUM_VHT_MAC_PAD_BW40 Number of MAC pad bytes after the end of the last MPDU. The vht_ppdu_bit_length = service_bits + psdu_octet * 8 + num_vht_mac_pad * 8 + tail_bits + phy_pad_bits */ #define MPROT_SS_11AC_SU_INFO_23_NUM_VHT_MAC_PAD_BW40_OFFSET 0x0000005c #define MPROT_SS_11AC_SU_INFO_23_NUM_VHT_MAC_PAD_BW40_LSB 0 #define MPROT_SS_11AC_SU_INFO_23_NUM_VHT_MAC_PAD_BW40_MASK 0x000fffff /* Description MPROT_SS_11AC_SU_INFO_23_RESERVED_23 */ #define MPROT_SS_11AC_SU_INFO_23_RESERVED_23_OFFSET 0x0000005c #define MPROT_SS_11AC_SU_INFO_23_RESERVED_23_LSB 20 #define MPROT_SS_11AC_SU_INFO_23_RESERVED_23_MASK 0xfff00000 /* Description MPROT_SS_11AC_SU_INFO_24_NUM_VHT_MAC_PAD_BW80 Number of MAC pad bytes after the end of the last MPDU. The vht_ppdu_bit_length = service_bits + psdu_octet * 8 + num_vht_mac_pad * 8 + tail_bits + phy_pad_bits */ #define MPROT_SS_11AC_SU_INFO_24_NUM_VHT_MAC_PAD_BW80_OFFSET 0x00000060 #define MPROT_SS_11AC_SU_INFO_24_NUM_VHT_MAC_PAD_BW80_LSB 0 #define MPROT_SS_11AC_SU_INFO_24_NUM_VHT_MAC_PAD_BW80_MASK 0x000fffff /* Description MPROT_SS_11AC_SU_INFO_24_RESERVED_24 */ #define MPROT_SS_11AC_SU_INFO_24_RESERVED_24_OFFSET 0x00000060 #define MPROT_SS_11AC_SU_INFO_24_RESERVED_24_LSB 20 #define MPROT_SS_11AC_SU_INFO_24_RESERVED_24_MASK 0xfff00000 /* Description MPROT_SS_11AC_SU_INFO_25_NUM_VHT_MAC_PAD_BW160 Number of MAC pad bytes after the end of the last MPDU. The vht_ppdu_bit_length = service_bits + psdu_octet * 8 + num_vht_mac_pad * 8 + tail_bits + phy_pad_bits */ #define MPROT_SS_11AC_SU_INFO_25_NUM_VHT_MAC_PAD_BW160_OFFSET 0x00000064 #define MPROT_SS_11AC_SU_INFO_25_NUM_VHT_MAC_PAD_BW160_LSB 0 #define MPROT_SS_11AC_SU_INFO_25_NUM_VHT_MAC_PAD_BW160_MASK 0x000fffff /* Description MPROT_SS_11AC_SU_INFO_25_RESERVED_25 */ #define MPROT_SS_11AC_SU_INFO_25_RESERVED_25_OFFSET 0x00000064 #define MPROT_SS_11AC_SU_INFO_25_RESERVED_25_LSB 20 #define MPROT_SS_11AC_SU_INFO_25_RESERVED_25_MASK 0xfff00000 #endif // _MPROT_SS_11AC_SU_INFO_H_