// Copyright (c) 2014 Qualcomm Atheros, Inc.  All rights reserved.
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT!  This file is automatically generated
//               These definitions are tied to a particular hardware layout


#ifndef _TX_CBF_OFFSET_H_
#define _TX_CBF_OFFSET_H_
#if !defined(__ASSEMBLER__)
#endif

// ################ START SUMMARY #################
//
//	Dword	Fields
//	0	cbf_hdr_offset[7:0], tx_chain_mask[11:8], reserved[31:12]
//
// ################ END SUMMARY #################

#define NUM_OF_DWORDS_TX_CBF_OFFSET 1

struct tx_cbf_offset {
    volatile uint32_t cbf_hdr_offset                  :  8, //[7:0]
                      tx_chain_mask                   :  4, //[11:8]
                      reserved                        : 20; //[31:12]
};

/*

cbf_hdr_offset
			
			This field defines the start location of the CV data
			within a CBF packet.  <legal 24, 28> 

tx_chain_mask
			
			Tx chain mask to support up to 4 antennas.  <legal:
			1-15>

reserved
			
			Reserved - MAC to set this field to 0, PHY to ignore
			this field. <legal 0>
*/


/* Description		TX_CBF_OFFSET_0_CBF_HDR_OFFSET
			
			This field defines the start location of the CV data
			within a CBF packet.  <legal 24, 28> 
*/
#define TX_CBF_OFFSET_0_CBF_HDR_OFFSET_OFFSET                        0x00000000
#define TX_CBF_OFFSET_0_CBF_HDR_OFFSET_LSB                           0
#define TX_CBF_OFFSET_0_CBF_HDR_OFFSET_MASK                          0x000000ff

/* Description		TX_CBF_OFFSET_0_TX_CHAIN_MASK
			
			Tx chain mask to support up to 4 antennas.  <legal:
			1-15>
*/
#define TX_CBF_OFFSET_0_TX_CHAIN_MASK_OFFSET                         0x00000000
#define TX_CBF_OFFSET_0_TX_CHAIN_MASK_LSB                            8
#define TX_CBF_OFFSET_0_TX_CHAIN_MASK_MASK                           0x00000f00

/* Description		TX_CBF_OFFSET_0_RESERVED
			
			Reserved - MAC to set this field to 0, PHY to ignore
			this field. <legal 0>
*/
#define TX_CBF_OFFSET_0_RESERVED_OFFSET                              0x00000000
#define TX_CBF_OFFSET_0_RESERVED_LSB                                 12
#define TX_CBF_OFFSET_0_RESERVED_MASK                                0xfffff000


#endif // _TX_CBF_OFFSET_H_