/*
 * Copyright (c) 2015 Qualcomm Atheros, Inc.
 * All Rights Reserved.
 * Qualcomm Atheros Confidential and Proprietary.
 */

#ifndef _MAC_PCU_REG_H_
#define _MAC_PCU_REG_H_


#include "wifi_top_reg_map.h"

// 32'h8010 (MAC_PCU_BCN_RSSI_AVE)
#define MAC_PCU_BCN_RSSI_AVE_AVE_VALUE2_MSB 		 RXPCU_BCN_RSSI_AVE_AVE_VALUE2_MSB
#define MAC_PCU_BCN_RSSI_AVE_AVE_VALUE2_LSB 		 RXPCU_BCN_RSSI_AVE_AVE_VALUE2_LSB
#define MAC_PCU_BCN_RSSI_AVE_AVE_VALUE2_MASK 		 RXPCU_BCN_RSSI_AVE_AVE_VALUE2_MASK
#define MAC_PCU_BCN_RSSI_AVE_AVE_VALUE2_GET(x) 		 RXPCU_BCN_RSSI_AVE_AVE_VALUE2_GET(x)
#define MAC_PCU_BCN_RSSI_AVE_AVE_VALUE2_SET(x) 		 RXPCU_BCN_RSSI_AVE_AVE_VALUE2_SET(x)
#define MAC_PCU_BCN_RSSI_AVE_AVE_VALUE2_RESET 		 RXPCU_BCN_RSSI_AVE_AVE_VALUE2_RESET
#define MAC_PCU_BCN_RSSI_AVE_AVE_VALUE_MSB 		 RXPCU_BCN_RSSI_AVE_AVE_VALUE_MSB
#define MAC_PCU_BCN_RSSI_AVE_AVE_VALUE_LSB 		 RXPCU_BCN_RSSI_AVE_AVE_VALUE_LSB
#define MAC_PCU_BCN_RSSI_AVE_AVE_VALUE_MASK 		 RXPCU_BCN_RSSI_AVE_AVE_VALUE_MASK
#define MAC_PCU_BCN_RSSI_AVE_AVE_VALUE_GET(x) 		 RXPCU_BCN_RSSI_AVE_AVE_VALUE_GET(x)
#define MAC_PCU_BCN_RSSI_AVE_AVE_VALUE_SET(x) 		 RXPCU_BCN_RSSI_AVE_AVE_VALUE_SET(x)
#define MAC_PCU_BCN_RSSI_AVE_AVE_VALUE_RESET 		 RXPCU_BCN_RSSI_AVE_AVE_VALUE_RESET
#define MAC_PCU_BCN_RSSI_AVE_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_BCN_RSSI_AVE_ADDRESS
// SW modifiable bits
#define MAC_PCU_BCN_RSSI_AVE_SW_MASK 		 RXPCU_BCN_RSSI_AVE_SW_MASK
// bits defined at reset
#define MAC_PCU_BCN_RSSI_AVE_RSTMASK 		 RXPCU_BCN_RSSI_AVE_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BCN_RSSI_AVE_RESET 		 RXPCU_BCN_RSSI_AVE_RESET

// 32'h8014 (MAC_PCU_ACK_CTS_TIMEOUT)
#define MAC_PCU_ACK_CTS_TIMEOUT_CTS_TIMEOUT_MSB 		 TXPCU_TIMEOUT_CTS_TIMEOUT_MSB
#define MAC_PCU_ACK_CTS_TIMEOUT_CTS_TIMEOUT_LSB 		 TXPCU_TIMEOUT_CTS_TIMEOUT_LSB
#define MAC_PCU_ACK_CTS_TIMEOUT_CTS_TIMEOUT_MASK 		 TXPCU_TIMEOUT_CTS_TIMEOUT_MASK
#define MAC_PCU_ACK_CTS_TIMEOUT_CTS_TIMEOUT_GET(x) 		 TXPCU_TIMEOUT_CTS_TIMEOUT_GET(x)
#define MAC_PCU_ACK_CTS_TIMEOUT_CTS_TIMEOUT_SET(x) 		 TXPCU_TIMEOUT_CTS_TIMEOUT_SET(x)
#define MAC_PCU_ACK_CTS_TIMEOUT_CTS_TIMEOUT_RESET 		 TXPCU_TIMEOUT_CTS_TIMEOUT_RESET
#define MAC_PCU_ACK_CTS_TIMEOUT_ACK_TIMEOUT_MSB 		 TXPCU_TIMEOUT_ACK_TIMEOUT_MSB
#define MAC_PCU_ACK_CTS_TIMEOUT_ACK_TIMEOUT_LSB 		 TXPCU_TIMEOUT_ACK_TIMEOUT_LSB
#define MAC_PCU_ACK_CTS_TIMEOUT_ACK_TIMEOUT_MASK 		 TXPCU_TIMEOUT_ACK_TIMEOUT_MASK
#define MAC_PCU_ACK_CTS_TIMEOUT_ACK_TIMEOUT_GET(x) 		 TXPCU_TIMEOUT_ACK_TIMEOUT_GET(x)
#define MAC_PCU_ACK_CTS_TIMEOUT_ACK_TIMEOUT_SET(x) 		 TXPCU_TIMEOUT_ACK_TIMEOUT_SET(x)
#define MAC_PCU_ACK_CTS_TIMEOUT_ACK_TIMEOUT_RESET 		 TXPCU_TIMEOUT_ACK_TIMEOUT_RESET
#define MAC_PCU_ACK_CTS_TIMEOUT_ADDRESS 		 MAC_TXPCU_BASE_ADDRESS+TXPCU_TIMEOUT_ADDRESS
// SW modifiable bits
#define MAC_PCU_ACK_CTS_TIMEOUT_SW_MASK 		 TXPCU_TIMEOUT_SW_MASK
// bits defined at reset
#define MAC_PCU_ACK_CTS_TIMEOUT_RSTMASK 		 TXPCU_TIMEOUT_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_ACK_CTS_TIMEOUT_RESET 		 TXPCU_TIMEOUT_RESET

// 32'h8018 (MAC_PCU_BCN_RSSI_CTL)
#define MAC_PCU_BCN_RSSI_CTL_RESET_MSB 		 RXPCU_BCN_RSSI_CTL_RESET_MSB
#define MAC_PCU_BCN_RSSI_CTL_RESET_LSB 		 RXPCU_BCN_RSSI_CTL_RESET_LSB
#define MAC_PCU_BCN_RSSI_CTL_RESET_MASK 		 RXPCU_BCN_RSSI_CTL_RESET_MASK
#define MAC_PCU_BCN_RSSI_CTL_RESET_GET(x) 		 RXPCU_BCN_RSSI_CTL_RESET_GET(x)
#define MAC_PCU_BCN_RSSI_CTL_RESET_SET(x) 		 RXPCU_BCN_RSSI_CTL_RESET_SET(x)
#define MAC_PCU_BCN_RSSI_CTL_RESET_RESET 		 RXPCU_BCN_RSSI_CTL_RESET_RESET
#define MAC_PCU_BCN_RSSI_CTL_WEIGHT_MSB 		 RXPCU_BCN_RSSI_CTL_WEIGHT_MSB
#define MAC_PCU_BCN_RSSI_CTL_WEIGHT_LSB 		 RXPCU_BCN_RSSI_CTL_WEIGHT_LSB
#define MAC_PCU_BCN_RSSI_CTL_WEIGHT_MASK 		 RXPCU_BCN_RSSI_CTL_WEIGHT_MASK
#define MAC_PCU_BCN_RSSI_CTL_WEIGHT_GET(x) 		 RXPCU_BCN_RSSI_CTL_WEIGHT_GET(x)
#define MAC_PCU_BCN_RSSI_CTL_WEIGHT_SET(x) 		 RXPCU_BCN_RSSI_CTL_WEIGHT_SET(x)
#define MAC_PCU_BCN_RSSI_CTL_WEIGHT_RESET 		 RXPCU_BCN_RSSI_CTL_WEIGHT_RESET
#define MAC_PCU_BCN_RSSI_CTL_RSSI_HIGH_THRESH_MSB 		 RXPCU_BCN_RSSI_CTL_RSSI_HIGH_THRESH_MSB
#define MAC_PCU_BCN_RSSI_CTL_RSSI_HIGH_THRESH_LSB 		 RXPCU_BCN_RSSI_CTL_RSSI_HIGH_THRESH_LSB
#define MAC_PCU_BCN_RSSI_CTL_RSSI_HIGH_THRESH_MASK 		 RXPCU_BCN_RSSI_CTL_RSSI_HIGH_THRESH_MASK
#define MAC_PCU_BCN_RSSI_CTL_RSSI_HIGH_THRESH_GET(x) 		 RXPCU_BCN_RSSI_CTL_RSSI_HIGH_THRESH_GET(x)
#define MAC_PCU_BCN_RSSI_CTL_RSSI_HIGH_THRESH_SET(x) 		 RXPCU_BCN_RSSI_CTL_RSSI_HIGH_THRESH_SET(x)
#define MAC_PCU_BCN_RSSI_CTL_RSSI_HIGH_THRESH_RESET 		 RXPCU_BCN_RSSI_CTL_RSSI_HIGH_THRESH_RESET
#define MAC_PCU_BCN_RSSI_CTL_MISS_THRESH_MSB 		 RXPCU_BCN_RSSI_CTL_MISS_THRESH_MSB
#define MAC_PCU_BCN_RSSI_CTL_MISS_THRESH_LSB 		 RXPCU_BCN_RSSI_CTL_MISS_THRESH_LSB
#define MAC_PCU_BCN_RSSI_CTL_MISS_THRESH_MASK 		 RXPCU_BCN_RSSI_CTL_MISS_THRESH_MASK
#define MAC_PCU_BCN_RSSI_CTL_MISS_THRESH_GET(x) 		 RXPCU_BCN_RSSI_CTL_MISS_THRESH_GET(x)
#define MAC_PCU_BCN_RSSI_CTL_MISS_THRESH_SET(x) 		 RXPCU_BCN_RSSI_CTL_MISS_THRESH_SET(x)
#define MAC_PCU_BCN_RSSI_CTL_MISS_THRESH_RESET 		 RXPCU_BCN_RSSI_CTL_MISS_THRESH_RESET
#define MAC_PCU_BCN_RSSI_CTL_RSSI_LOW_THRESH_MSB 		 RXPCU_BCN_RSSI_CTL_RSSI_LOW_THRESH_MSB
#define MAC_PCU_BCN_RSSI_CTL_RSSI_LOW_THRESH_LSB 		 RXPCU_BCN_RSSI_CTL_RSSI_LOW_THRESH_LSB
#define MAC_PCU_BCN_RSSI_CTL_RSSI_LOW_THRESH_MASK 		 RXPCU_BCN_RSSI_CTL_RSSI_LOW_THRESH_MASK
#define MAC_PCU_BCN_RSSI_CTL_RSSI_LOW_THRESH_GET(x) 		 RXPCU_BCN_RSSI_CTL_RSSI_LOW_THRESH_GET(x)
#define MAC_PCU_BCN_RSSI_CTL_RSSI_LOW_THRESH_SET(x) 		 RXPCU_BCN_RSSI_CTL_RSSI_LOW_THRESH_SET(x)
#define MAC_PCU_BCN_RSSI_CTL_RSSI_LOW_THRESH_RESET 		 RXPCU_BCN_RSSI_CTL_RSSI_LOW_THRESH_RESET
#define MAC_PCU_BCN_RSSI_CTL_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_BCN_RSSI_CTL_ADDRESS
// SW modifiable bits
#define MAC_PCU_BCN_RSSI_CTL_SW_MASK 		 RXPCU_BCN_RSSI_CTL_SW_MASK
// bits defined at reset
#define MAC_PCU_BCN_RSSI_CTL_RSTMASK 		 RXPCU_BCN_RSSI_CTL_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BCN_RSSI_CTL_RESET 		 RXPCU_BCN_RSSI_CTL_RESET

// 32'h8020 (MAC_PCU_BCN_RSSI_CTL2)
#define MAC_PCU_BCN_RSSI_CTL2_RESET2_MSB 		 RXPCU_BCN_RSSI_CTL2_RESET2_MSB
#define MAC_PCU_BCN_RSSI_CTL2_RESET2_LSB 		 RXPCU_BCN_RSSI_CTL2_RESET2_LSB
#define MAC_PCU_BCN_RSSI_CTL2_RESET2_MASK 		 RXPCU_BCN_RSSI_CTL2_RESET2_MASK
#define MAC_PCU_BCN_RSSI_CTL2_RESET2_GET(x) 		 RXPCU_BCN_RSSI_CTL2_RESET2_GET(x)
#define MAC_PCU_BCN_RSSI_CTL2_RESET2_SET(x) 		 RXPCU_BCN_RSSI_CTL2_RESET2_SET(x)
#define MAC_PCU_BCN_RSSI_CTL2_RESET2_RESET 		 RXPCU_BCN_RSSI_CTL2_RESET2_RESET
#define MAC_PCU_BCN_RSSI_CTL2_RSSI2_HIGH_THRESH_MSB 		 RXPCU_BCN_RSSI_CTL2_RSSI2_HIGH_THRESH_MSB
#define MAC_PCU_BCN_RSSI_CTL2_RSSI2_HIGH_THRESH_LSB 		 RXPCU_BCN_RSSI_CTL2_RSSI2_HIGH_THRESH_LSB
#define MAC_PCU_BCN_RSSI_CTL2_RSSI2_HIGH_THRESH_MASK 		 RXPCU_BCN_RSSI_CTL2_RSSI2_HIGH_THRESH_MASK
#define MAC_PCU_BCN_RSSI_CTL2_RSSI2_HIGH_THRESH_GET(x) 		 RXPCU_BCN_RSSI_CTL2_RSSI2_HIGH_THRESH_GET(x)
#define MAC_PCU_BCN_RSSI_CTL2_RSSI2_HIGH_THRESH_SET(x) 		 RXPCU_BCN_RSSI_CTL2_RSSI2_HIGH_THRESH_SET(x)
#define MAC_PCU_BCN_RSSI_CTL2_RSSI2_HIGH_THRESH_RESET 		 RXPCU_BCN_RSSI_CTL2_RSSI2_HIGH_THRESH_RESET
#define MAC_PCU_BCN_RSSI_CTL2_RSSI2_LOW_THRESH_MSB 		 RXPCU_BCN_RSSI_CTL2_RSSI2_LOW_THRESH_MSB
#define MAC_PCU_BCN_RSSI_CTL2_RSSI2_LOW_THRESH_LSB 		 RXPCU_BCN_RSSI_CTL2_RSSI2_LOW_THRESH_LSB
#define MAC_PCU_BCN_RSSI_CTL2_RSSI2_LOW_THRESH_MASK 		 RXPCU_BCN_RSSI_CTL2_RSSI2_LOW_THRESH_MASK
#define MAC_PCU_BCN_RSSI_CTL2_RSSI2_LOW_THRESH_GET(x) 		 RXPCU_BCN_RSSI_CTL2_RSSI2_LOW_THRESH_GET(x)
#define MAC_PCU_BCN_RSSI_CTL2_RSSI2_LOW_THRESH_SET(x) 		 RXPCU_BCN_RSSI_CTL2_RSSI2_LOW_THRESH_SET(x)
#define MAC_PCU_BCN_RSSI_CTL2_RSSI2_LOW_THRESH_RESET 		 RXPCU_BCN_RSSI_CTL2_RSSI2_LOW_THRESH_RESET
#define MAC_PCU_BCN_RSSI_CTL2_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_BCN_RSSI_CTL2_ADDRESS
// SW modifiable bits
#define MAC_PCU_BCN_RSSI_CTL2_SW_MASK 		 RXPCU_BCN_RSSI_CTL2_SW_MASK
// bits defined at reset
#define MAC_PCU_BCN_RSSI_CTL2_RSTMASK 		 RXPCU_BCN_RSSI_CTL2_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BCN_RSSI_CTL2_RESET 		 RXPCU_BCN_RSSI_CTL2_RESET

// 32'h8024 (MAC_PCU_BT_WL_1)
#define MAC_PCU_BT_WL_1_WEIGHT_MSB 		 PTA_COEX_BT_WL_1_WEIGHT_MSB
#define MAC_PCU_BT_WL_1_WEIGHT_LSB 		 PTA_COEX_BT_WL_1_WEIGHT_LSB
#define MAC_PCU_BT_WL_1_WEIGHT_MASK 		 PTA_COEX_BT_WL_1_WEIGHT_MASK
#define MAC_PCU_BT_WL_1_WEIGHT_GET(x) 		 PTA_COEX_BT_WL_1_WEIGHT_GET(x)
#define MAC_PCU_BT_WL_1_WEIGHT_SET(x) 		 PTA_COEX_BT_WL_1_WEIGHT_SET(x)
#define MAC_PCU_BT_WL_1_WEIGHT_RESET 		 PTA_COEX_BT_WL_1_WEIGHT_RESET
#define MAC_PCU_BT_WL_1_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_WL_1_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_WL_1_SW_MASK 		 PTA_COEX_BT_WL_1_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_WL_1_RSTMASK 		 PTA_COEX_BT_WL_1_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_WL_1_RESET 		 PTA_COEX_BT_WL_1_RESET

// 32'h8028 (MAC_PCU_BT_WL_2)
#define MAC_PCU_BT_WL_2_WEIGHT_MSB 		 PTA_COEX_BT_WL_2_WEIGHT_MSB
#define MAC_PCU_BT_WL_2_WEIGHT_LSB 		 PTA_COEX_BT_WL_2_WEIGHT_LSB
#define MAC_PCU_BT_WL_2_WEIGHT_MASK 		 PTA_COEX_BT_WL_2_WEIGHT_MASK
#define MAC_PCU_BT_WL_2_WEIGHT_GET(x) 		 PTA_COEX_BT_WL_2_WEIGHT_GET(x)
#define MAC_PCU_BT_WL_2_WEIGHT_SET(x) 		 PTA_COEX_BT_WL_2_WEIGHT_SET(x)
#define MAC_PCU_BT_WL_2_WEIGHT_RESET 		 PTA_COEX_BT_WL_2_WEIGHT_RESET
#define MAC_PCU_BT_WL_2_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_WL_2_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_WL_2_SW_MASK 		 PTA_COEX_BT_WL_2_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_WL_2_RSTMASK 		 PTA_COEX_BT_WL_2_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_WL_2_RESET 		 PTA_COEX_BT_WL_2_RESET

// 32'h802c (MAC_PCU_BT_WL_3)
#define MAC_PCU_BT_WL_3_WEIGHT_MSB 		 PTA_COEX_BT_WL_3_WEIGHT_MSB
#define MAC_PCU_BT_WL_3_WEIGHT_LSB 		 PTA_COEX_BT_WL_3_WEIGHT_LSB
#define MAC_PCU_BT_WL_3_WEIGHT_MASK 		 PTA_COEX_BT_WL_3_WEIGHT_MASK
#define MAC_PCU_BT_WL_3_WEIGHT_GET(x) 		 PTA_COEX_BT_WL_3_WEIGHT_GET(x)
#define MAC_PCU_BT_WL_3_WEIGHT_SET(x) 		 PTA_COEX_BT_WL_3_WEIGHT_SET(x)
#define MAC_PCU_BT_WL_3_WEIGHT_RESET 		 PTA_COEX_BT_WL_3_WEIGHT_RESET
#define MAC_PCU_BT_WL_3_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_WL_3_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_WL_3_SW_MASK 		 PTA_COEX_BT_WL_3_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_WL_3_RSTMASK 		 PTA_COEX_BT_WL_3_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_WL_3_RESET 		 PTA_COEX_BT_WL_3_RESET

// 32'h8030 (MAC_PCU_BT_WL_4)
#define MAC_PCU_BT_WL_4_WEIGHT_MSB 		 PTA_COEX_BT_WL_4_WEIGHT_MSB
#define MAC_PCU_BT_WL_4_WEIGHT_LSB 		 PTA_COEX_BT_WL_4_WEIGHT_LSB
#define MAC_PCU_BT_WL_4_WEIGHT_MASK 		 PTA_COEX_BT_WL_4_WEIGHT_MASK
#define MAC_PCU_BT_WL_4_WEIGHT_GET(x) 		 PTA_COEX_BT_WL_4_WEIGHT_GET(x)
#define MAC_PCU_BT_WL_4_WEIGHT_SET(x) 		 PTA_COEX_BT_WL_4_WEIGHT_SET(x)
#define MAC_PCU_BT_WL_4_WEIGHT_RESET 		 PTA_COEX_BT_WL_4_WEIGHT_RESET
#define MAC_PCU_BT_WL_4_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_WL_4_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_WL_4_SW_MASK 		 PTA_COEX_BT_WL_4_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_WL_4_RSTMASK 		 PTA_COEX_BT_WL_4_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_WL_4_RESET 		 PTA_COEX_BT_WL_4_RESET

// 32'h8034 (MAC_PCU_COEX_EPTA)
#define MAC_PCU_COEX_EPTA_WT_IDX_MSB 		 PTA_COEX_COEX_EPTA_WT_IDX_MSB
#define MAC_PCU_COEX_EPTA_WT_IDX_LSB 		 PTA_COEX_COEX_EPTA_WT_IDX_LSB
#define MAC_PCU_COEX_EPTA_WT_IDX_MASK 		 PTA_COEX_COEX_EPTA_WT_IDX_MASK
#define MAC_PCU_COEX_EPTA_WT_IDX_GET(x) 		 PTA_COEX_COEX_EPTA_WT_IDX_GET(x)
#define MAC_PCU_COEX_EPTA_WT_IDX_SET(x) 		 PTA_COEX_COEX_EPTA_WT_IDX_SET(x)
#define MAC_PCU_COEX_EPTA_WT_IDX_RESET 		 PTA_COEX_COEX_EPTA_WT_IDX_RESET
#define MAC_PCU_COEX_EPTA_LINKID_MSB 		 PTA_COEX_COEX_EPTA_LINKID_MSB
#define MAC_PCU_COEX_EPTA_LINKID_LSB 		 PTA_COEX_COEX_EPTA_LINKID_LSB
#define MAC_PCU_COEX_EPTA_LINKID_MASK 		 PTA_COEX_COEX_EPTA_LINKID_MASK
#define MAC_PCU_COEX_EPTA_LINKID_GET(x) 		 PTA_COEX_COEX_EPTA_LINKID_GET(x)
#define MAC_PCU_COEX_EPTA_LINKID_SET(x) 		 PTA_COEX_COEX_EPTA_LINKID_SET(x)
#define MAC_PCU_COEX_EPTA_LINKID_RESET 		 PTA_COEX_COEX_EPTA_LINKID_RESET
#define MAC_PCU_COEX_EPTA_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_COEX_EPTA_ADDRESS
// SW modifiable bits
#define MAC_PCU_COEX_EPTA_SW_MASK 		 PTA_COEX_COEX_EPTA_SW_MASK
// bits defined at reset
#define MAC_PCU_COEX_EPTA_RSTMASK 		 PTA_COEX_COEX_EPTA_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_COEX_EPTA_RESET 		 PTA_COEX_COEX_EPTA_RESET

// 32'h8038 (MAC_PCU_MAX_CFP_DUR)
#define MAC_PCU_MAX_CFP_DUR_USEC_FRAC_DENOMINATOR_MSB 		 WIFI_TIMERS_MAX_CFP_DUR_USEC_FRAC_DENOMINATOR_MSB
#define MAC_PCU_MAX_CFP_DUR_USEC_FRAC_DENOMINATOR_LSB 		 WIFI_TIMERS_MAX_CFP_DUR_USEC_FRAC_DENOMINATOR_LSB
#define MAC_PCU_MAX_CFP_DUR_USEC_FRAC_DENOMINATOR_MASK 		 WIFI_TIMERS_MAX_CFP_DUR_USEC_FRAC_DENOMINATOR_MASK
#define MAC_PCU_MAX_CFP_DUR_USEC_FRAC_DENOMINATOR_GET(x) 		 WIFI_TIMERS_MAX_CFP_DUR_USEC_FRAC_DENOMINATOR_GET(x)
#define MAC_PCU_MAX_CFP_DUR_USEC_FRAC_DENOMINATOR_SET(x) 		 WIFI_TIMERS_MAX_CFP_DUR_USEC_FRAC_DENOMINATOR_SET(x)
#define MAC_PCU_MAX_CFP_DUR_USEC_FRAC_DENOMINATOR_RESET 		 WIFI_TIMERS_MAX_CFP_DUR_USEC_FRAC_DENOMINATOR_RESET
#define MAC_PCU_MAX_CFP_DUR_USEC_FRAC_NUMERATOR_MSB 		 WIFI_TIMERS_MAX_CFP_DUR_USEC_FRAC_NUMERATOR_MSB
#define MAC_PCU_MAX_CFP_DUR_USEC_FRAC_NUMERATOR_LSB 		 WIFI_TIMERS_MAX_CFP_DUR_USEC_FRAC_NUMERATOR_LSB
#define MAC_PCU_MAX_CFP_DUR_USEC_FRAC_NUMERATOR_MASK 		 WIFI_TIMERS_MAX_CFP_DUR_USEC_FRAC_NUMERATOR_MASK
#define MAC_PCU_MAX_CFP_DUR_USEC_FRAC_NUMERATOR_GET(x) 		 WIFI_TIMERS_MAX_CFP_DUR_USEC_FRAC_NUMERATOR_GET(x)
#define MAC_PCU_MAX_CFP_DUR_USEC_FRAC_NUMERATOR_SET(x) 		 WIFI_TIMERS_MAX_CFP_DUR_USEC_FRAC_NUMERATOR_SET(x)
#define MAC_PCU_MAX_CFP_DUR_USEC_FRAC_NUMERATOR_RESET 		 WIFI_TIMERS_MAX_CFP_DUR_USEC_FRAC_NUMERATOR_RESET
#define MAC_PCU_MAX_CFP_DUR_VALUE_MSB 		 WIFI_TIMERS_MAX_CFP_DUR_VALUE_MSB
#define MAC_PCU_MAX_CFP_DUR_VALUE_LSB 		 WIFI_TIMERS_MAX_CFP_DUR_VALUE_LSB
#define MAC_PCU_MAX_CFP_DUR_VALUE_MASK 		 WIFI_TIMERS_MAX_CFP_DUR_VALUE_MASK
#define MAC_PCU_MAX_CFP_DUR_VALUE_GET(x) 		 WIFI_TIMERS_MAX_CFP_DUR_VALUE_GET(x)
#define MAC_PCU_MAX_CFP_DUR_VALUE_SET(x) 		 WIFI_TIMERS_MAX_CFP_DUR_VALUE_SET(x)
#define MAC_PCU_MAX_CFP_DUR_VALUE_RESET 		 WIFI_TIMERS_MAX_CFP_DUR_VALUE_RESET
#define MAC_PCU_MAX_CFP_DUR_ADDRESS 		 WIFI_TIMERS_BASE_ADDRESS+WIFI_TIMERS_MAX_CFP_DUR_ADDRESS
// SW modifiable bits
#define MAC_PCU_MAX_CFP_DUR_SW_MASK 		 WIFI_TIMERS_MAX_CFP_DUR_SW_MASK
// bits defined at reset
#define MAC_PCU_MAX_CFP_DUR_RSTMASK 		 WIFI_TIMERS_MAX_CFP_DUR_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_MAX_CFP_DUR_RESET 		 WIFI_TIMERS_MAX_CFP_DUR_RESET

// 32'h803c (MAC_PCU_RX_FILTER)
#define MAC_PCU_RX_FILTER_BSSID_BASED_MULTICAST_MSB 		 RXPCU_RX_FILTER_BSSID_BASED_MULTICAST_MSB
#define MAC_PCU_RX_FILTER_BSSID_BASED_MULTICAST_LSB 		 RXPCU_RX_FILTER_BSSID_BASED_MULTICAST_LSB
#define MAC_PCU_RX_FILTER_BSSID_BASED_MULTICAST_MASK 		 RXPCU_RX_FILTER_BSSID_BASED_MULTICAST_MASK
#define MAC_PCU_RX_FILTER_BSSID_BASED_MULTICAST_GET(x) 		 RXPCU_RX_FILTER_BSSID_BASED_MULTICAST_GET(x)
#define MAC_PCU_RX_FILTER_BSSID_BASED_MULTICAST_SET(x) 		 RXPCU_RX_FILTER_BSSID_BASED_MULTICAST_SET(x)
#define MAC_PCU_RX_FILTER_BSSID_BASED_MULTICAST_RESET 		 RXPCU_RX_FILTER_BSSID_BASED_MULTICAST_RESET
#define MAC_PCU_RX_FILTER_PHY_DATA_MSB 		 RXPCU_RX_FILTER_PHY_DATA_MSB
#define MAC_PCU_RX_FILTER_PHY_DATA_LSB 		 RXPCU_RX_FILTER_PHY_DATA_LSB
#define MAC_PCU_RX_FILTER_PHY_DATA_MASK 		 RXPCU_RX_FILTER_PHY_DATA_MASK
#define MAC_PCU_RX_FILTER_PHY_DATA_GET(x) 		 RXPCU_RX_FILTER_PHY_DATA_GET(x)
#define MAC_PCU_RX_FILTER_PHY_DATA_SET(x) 		 RXPCU_RX_FILTER_PHY_DATA_SET(x)
#define MAC_PCU_RX_FILTER_PHY_DATA_RESET 		 RXPCU_RX_FILTER_PHY_DATA_RESET
#define MAC_PCU_RX_FILTER_MY_BEACON2_MSB 		 RXPCU_RX_FILTER_MY_BEACON2_MSB
#define MAC_PCU_RX_FILTER_MY_BEACON2_LSB 		 RXPCU_RX_FILTER_MY_BEACON2_LSB
#define MAC_PCU_RX_FILTER_MY_BEACON2_MASK 		 RXPCU_RX_FILTER_MY_BEACON2_MASK
#define MAC_PCU_RX_FILTER_MY_BEACON2_GET(x) 		 RXPCU_RX_FILTER_MY_BEACON2_GET(x)
#define MAC_PCU_RX_FILTER_MY_BEACON2_SET(x) 		 RXPCU_RX_FILTER_MY_BEACON2_SET(x)
#define MAC_PCU_RX_FILTER_MY_BEACON2_RESET 		 RXPCU_RX_FILTER_MY_BEACON2_RESET
#define MAC_PCU_RX_FILTER_GENERIC_FILTER_MSB 		 RXPCU_RX_FILTER_GENERIC_FILTER_MSB
#define MAC_PCU_RX_FILTER_GENERIC_FILTER_LSB 		 RXPCU_RX_FILTER_GENERIC_FILTER_LSB
#define MAC_PCU_RX_FILTER_GENERIC_FILTER_MASK 		 RXPCU_RX_FILTER_GENERIC_FILTER_MASK
#define MAC_PCU_RX_FILTER_GENERIC_FILTER_GET(x) 		 RXPCU_RX_FILTER_GENERIC_FILTER_GET(x)
#define MAC_PCU_RX_FILTER_GENERIC_FILTER_SET(x) 		 RXPCU_RX_FILTER_GENERIC_FILTER_SET(x)
#define MAC_PCU_RX_FILTER_GENERIC_FILTER_RESET 		 RXPCU_RX_FILTER_GENERIC_FILTER_RESET
#define MAC_PCU_RX_FILTER_GENERIC_FTYPE_MSB 		 RXPCU_RX_FILTER_GENERIC_FTYPE_MSB
#define MAC_PCU_RX_FILTER_GENERIC_FTYPE_LSB 		 RXPCU_RX_FILTER_GENERIC_FTYPE_LSB
#define MAC_PCU_RX_FILTER_GENERIC_FTYPE_MASK 		 RXPCU_RX_FILTER_GENERIC_FTYPE_MASK
#define MAC_PCU_RX_FILTER_GENERIC_FTYPE_GET(x) 		 RXPCU_RX_FILTER_GENERIC_FTYPE_GET(x)
#define MAC_PCU_RX_FILTER_GENERIC_FTYPE_SET(x) 		 RXPCU_RX_FILTER_GENERIC_FTYPE_SET(x)
#define MAC_PCU_RX_FILTER_GENERIC_FTYPE_RESET 		 RXPCU_RX_FILTER_GENERIC_FTYPE_RESET
#define MAC_PCU_RX_FILTER_FROM_TO_DS_MSB 		 RXPCU_RX_FILTER_FROM_TO_DS_MSB
#define MAC_PCU_RX_FILTER_FROM_TO_DS_LSB 		 RXPCU_RX_FILTER_FROM_TO_DS_LSB
#define MAC_PCU_RX_FILTER_FROM_TO_DS_MASK 		 RXPCU_RX_FILTER_FROM_TO_DS_MASK
#define MAC_PCU_RX_FILTER_FROM_TO_DS_GET(x) 		 RXPCU_RX_FILTER_FROM_TO_DS_GET(x)
#define MAC_PCU_RX_FILTER_FROM_TO_DS_SET(x) 		 RXPCU_RX_FILTER_FROM_TO_DS_SET(x)
#define MAC_PCU_RX_FILTER_FROM_TO_DS_RESET 		 RXPCU_RX_FILTER_FROM_TO_DS_RESET
#define MAC_PCU_RX_FILTER_CONTROL_WRAPPER_MSB 		 RXPCU_RX_FILTER_CONTROL_WRAPPER_MSB
#define MAC_PCU_RX_FILTER_CONTROL_WRAPPER_LSB 		 RXPCU_RX_FILTER_CONTROL_WRAPPER_LSB
#define MAC_PCU_RX_FILTER_CONTROL_WRAPPER_MASK 		 RXPCU_RX_FILTER_CONTROL_WRAPPER_MASK
#define MAC_PCU_RX_FILTER_CONTROL_WRAPPER_GET(x) 		 RXPCU_RX_FILTER_CONTROL_WRAPPER_GET(x)
#define MAC_PCU_RX_FILTER_CONTROL_WRAPPER_SET(x) 		 RXPCU_RX_FILTER_CONTROL_WRAPPER_SET(x)
#define MAC_PCU_RX_FILTER_CONTROL_WRAPPER_RESET 		 RXPCU_RX_FILTER_CONTROL_WRAPPER_RESET
#define MAC_PCU_RX_FILTER_MGMT_ACTION_MCAST_MSB 		 RXPCU_RX_FILTER_MGMT_ACTION_MCAST_MSB
#define MAC_PCU_RX_FILTER_MGMT_ACTION_MCAST_LSB 		 RXPCU_RX_FILTER_MGMT_ACTION_MCAST_LSB
#define MAC_PCU_RX_FILTER_MGMT_ACTION_MCAST_MASK 		 RXPCU_RX_FILTER_MGMT_ACTION_MCAST_MASK
#define MAC_PCU_RX_FILTER_MGMT_ACTION_MCAST_GET(x) 		 RXPCU_RX_FILTER_MGMT_ACTION_MCAST_GET(x)
#define MAC_PCU_RX_FILTER_MGMT_ACTION_MCAST_SET(x) 		 RXPCU_RX_FILTER_MGMT_ACTION_MCAST_SET(x)
#define MAC_PCU_RX_FILTER_MGMT_ACTION_MCAST_RESET 		 RXPCU_RX_FILTER_MGMT_ACTION_MCAST_RESET
#define MAC_PCU_RX_FILTER_HW_BCN_PROC_ENABLE_MSB 		 RXPCU_RX_FILTER_HW_BCN_PROC_ENABLE_MSB
#define MAC_PCU_RX_FILTER_HW_BCN_PROC_ENABLE_LSB 		 RXPCU_RX_FILTER_HW_BCN_PROC_ENABLE_LSB
#define MAC_PCU_RX_FILTER_HW_BCN_PROC_ENABLE_MASK 		 RXPCU_RX_FILTER_HW_BCN_PROC_ENABLE_MASK
#define MAC_PCU_RX_FILTER_HW_BCN_PROC_ENABLE_GET(x) 		 RXPCU_RX_FILTER_HW_BCN_PROC_ENABLE_GET(x)
#define MAC_PCU_RX_FILTER_HW_BCN_PROC_ENABLE_SET(x) 		 RXPCU_RX_FILTER_HW_BCN_PROC_ENABLE_SET(x)
#define MAC_PCU_RX_FILTER_HW_BCN_PROC_ENABLE_RESET 		 RXPCU_RX_FILTER_HW_BCN_PROC_ENABLE_RESET
#define MAC_PCU_RX_FILTER_RST_DLMTR_CNT_DISABLE_MSB 		 RXPCU_RX_FILTER_RST_DLMTR_CNT_DISABLE_MSB
#define MAC_PCU_RX_FILTER_RST_DLMTR_CNT_DISABLE_LSB 		 RXPCU_RX_FILTER_RST_DLMTR_CNT_DISABLE_LSB
#define MAC_PCU_RX_FILTER_RST_DLMTR_CNT_DISABLE_MASK 		 RXPCU_RX_FILTER_RST_DLMTR_CNT_DISABLE_MASK
#define MAC_PCU_RX_FILTER_RST_DLMTR_CNT_DISABLE_GET(x) 		 RXPCU_RX_FILTER_RST_DLMTR_CNT_DISABLE_GET(x)
#define MAC_PCU_RX_FILTER_RST_DLMTR_CNT_DISABLE_SET(x) 		 RXPCU_RX_FILTER_RST_DLMTR_CNT_DISABLE_SET(x)
#define MAC_PCU_RX_FILTER_RST_DLMTR_CNT_DISABLE_RESET 		 RXPCU_RX_FILTER_RST_DLMTR_CNT_DISABLE_RESET
#define MAC_PCU_RX_FILTER_MCAST_BCAST_ALL_MSB 		 RXPCU_RX_FILTER_MCAST_BCAST_ALL_MSB
#define MAC_PCU_RX_FILTER_MCAST_BCAST_ALL_LSB 		 RXPCU_RX_FILTER_MCAST_BCAST_ALL_LSB
#define MAC_PCU_RX_FILTER_MCAST_BCAST_ALL_MASK 		 RXPCU_RX_FILTER_MCAST_BCAST_ALL_MASK
#define MAC_PCU_RX_FILTER_MCAST_BCAST_ALL_GET(x) 		 RXPCU_RX_FILTER_MCAST_BCAST_ALL_GET(x)
#define MAC_PCU_RX_FILTER_MCAST_BCAST_ALL_SET(x) 		 RXPCU_RX_FILTER_MCAST_BCAST_ALL_SET(x)
#define MAC_PCU_RX_FILTER_MCAST_BCAST_ALL_RESET 		 RXPCU_RX_FILTER_MCAST_BCAST_ALL_RESET
#define MAC_PCU_RX_FILTER_PS_POLL_MSB 		 RXPCU_RX_FILTER_PS_POLL_MSB
#define MAC_PCU_RX_FILTER_PS_POLL_LSB 		 RXPCU_RX_FILTER_PS_POLL_LSB
#define MAC_PCU_RX_FILTER_PS_POLL_MASK 		 RXPCU_RX_FILTER_PS_POLL_MASK
#define MAC_PCU_RX_FILTER_PS_POLL_GET(x) 		 RXPCU_RX_FILTER_PS_POLL_GET(x)
#define MAC_PCU_RX_FILTER_PS_POLL_SET(x) 		 RXPCU_RX_FILTER_PS_POLL_SET(x)
#define MAC_PCU_RX_FILTER_PS_POLL_RESET 		 RXPCU_RX_FILTER_PS_POLL_RESET
#define MAC_PCU_RX_FILTER_RESERVED_MSB 		 RXPCU_RX_FILTER_RESERVED_MSB
#define MAC_PCU_RX_FILTER_RESERVED_LSB 		 RXPCU_RX_FILTER_RESERVED_LSB
#define MAC_PCU_RX_FILTER_RESERVED_MASK 		 RXPCU_RX_FILTER_RESERVED_MASK
#define MAC_PCU_RX_FILTER_RESERVED_GET(x) 		 RXPCU_RX_FILTER_RESERVED_GET(x)
#define MAC_PCU_RX_FILTER_RESERVED_SET(x) 		 RXPCU_RX_FILTER_RESERVED_SET(x)
#define MAC_PCU_RX_FILTER_RESERVED_RESET 		 RXPCU_RX_FILTER_RESERVED_RESET
#define MAC_PCU_RX_FILTER_UNCOMPRESSED_BA_BAR_MSB 		 RXPCU_RX_FILTER_UNCOMPRESSED_BA_BAR_MSB
#define MAC_PCU_RX_FILTER_UNCOMPRESSED_BA_BAR_LSB 		 RXPCU_RX_FILTER_UNCOMPRESSED_BA_BAR_LSB
#define MAC_PCU_RX_FILTER_UNCOMPRESSED_BA_BAR_MASK 		 RXPCU_RX_FILTER_UNCOMPRESSED_BA_BAR_MASK
#define MAC_PCU_RX_FILTER_UNCOMPRESSED_BA_BAR_GET(x) 		 RXPCU_RX_FILTER_UNCOMPRESSED_BA_BAR_GET(x)
#define MAC_PCU_RX_FILTER_UNCOMPRESSED_BA_BAR_SET(x) 		 RXPCU_RX_FILTER_UNCOMPRESSED_BA_BAR_SET(x)
#define MAC_PCU_RX_FILTER_UNCOMPRESSED_BA_BAR_RESET 		 RXPCU_RX_FILTER_UNCOMPRESSED_BA_BAR_RESET
#define MAC_PCU_RX_FILTER_COMPRESSED_BA_MSB 		 RXPCU_RX_FILTER_COMPRESSED_BA_MSB
#define MAC_PCU_RX_FILTER_COMPRESSED_BA_LSB 		 RXPCU_RX_FILTER_COMPRESSED_BA_LSB
#define MAC_PCU_RX_FILTER_COMPRESSED_BA_MASK 		 RXPCU_RX_FILTER_COMPRESSED_BA_MASK
#define MAC_PCU_RX_FILTER_COMPRESSED_BA_GET(x) 		 RXPCU_RX_FILTER_COMPRESSED_BA_GET(x)
#define MAC_PCU_RX_FILTER_COMPRESSED_BA_SET(x) 		 RXPCU_RX_FILTER_COMPRESSED_BA_SET(x)
#define MAC_PCU_RX_FILTER_COMPRESSED_BA_RESET 		 RXPCU_RX_FILTER_COMPRESSED_BA_RESET
#define MAC_PCU_RX_FILTER_COMPRESSED_BAR_MSB 		 RXPCU_RX_FILTER_COMPRESSED_BAR_MSB
#define MAC_PCU_RX_FILTER_COMPRESSED_BAR_LSB 		 RXPCU_RX_FILTER_COMPRESSED_BAR_LSB
#define MAC_PCU_RX_FILTER_COMPRESSED_BAR_MASK 		 RXPCU_RX_FILTER_COMPRESSED_BAR_MASK
#define MAC_PCU_RX_FILTER_COMPRESSED_BAR_GET(x) 		 RXPCU_RX_FILTER_COMPRESSED_BAR_GET(x)
#define MAC_PCU_RX_FILTER_COMPRESSED_BAR_SET(x) 		 RXPCU_RX_FILTER_COMPRESSED_BAR_SET(x)
#define MAC_PCU_RX_FILTER_COMPRESSED_BAR_RESET 		 RXPCU_RX_FILTER_COMPRESSED_BAR_RESET
#define MAC_PCU_RX_FILTER_MY_BEACON_MSB 		 RXPCU_RX_FILTER_MY_BEACON_MSB
#define MAC_PCU_RX_FILTER_MY_BEACON_LSB 		 RXPCU_RX_FILTER_MY_BEACON_LSB
#define MAC_PCU_RX_FILTER_MY_BEACON_MASK 		 RXPCU_RX_FILTER_MY_BEACON_MASK
#define MAC_PCU_RX_FILTER_MY_BEACON_GET(x) 		 RXPCU_RX_FILTER_MY_BEACON_GET(x)
#define MAC_PCU_RX_FILTER_MY_BEACON_SET(x) 		 RXPCU_RX_FILTER_MY_BEACON_SET(x)
#define MAC_PCU_RX_FILTER_MY_BEACON_RESET 		 RXPCU_RX_FILTER_MY_BEACON_RESET
#define MAC_PCU_RX_FILTER_SYNC_FRAME_MSB 		 RXPCU_RX_FILTER_SYNC_FRAME_MSB
#define MAC_PCU_RX_FILTER_SYNC_FRAME_LSB 		 RXPCU_RX_FILTER_SYNC_FRAME_LSB
#define MAC_PCU_RX_FILTER_SYNC_FRAME_MASK 		 RXPCU_RX_FILTER_SYNC_FRAME_MASK
#define MAC_PCU_RX_FILTER_SYNC_FRAME_GET(x) 		 RXPCU_RX_FILTER_SYNC_FRAME_GET(x)
#define MAC_PCU_RX_FILTER_SYNC_FRAME_SET(x) 		 RXPCU_RX_FILTER_SYNC_FRAME_SET(x)
#define MAC_PCU_RX_FILTER_SYNC_FRAME_RESET 		 RXPCU_RX_FILTER_SYNC_FRAME_RESET
#define MAC_PCU_RX_FILTER_PROBE_REQ_MSB 		 RXPCU_RX_FILTER_PROBE_REQ_MSB
#define MAC_PCU_RX_FILTER_PROBE_REQ_LSB 		 RXPCU_RX_FILTER_PROBE_REQ_LSB
#define MAC_PCU_RX_FILTER_PROBE_REQ_MASK 		 RXPCU_RX_FILTER_PROBE_REQ_MASK
#define MAC_PCU_RX_FILTER_PROBE_REQ_GET(x) 		 RXPCU_RX_FILTER_PROBE_REQ_GET(x)
#define MAC_PCU_RX_FILTER_PROBE_REQ_SET(x) 		 RXPCU_RX_FILTER_PROBE_REQ_SET(x)
#define MAC_PCU_RX_FILTER_PROBE_REQ_RESET 		 RXPCU_RX_FILTER_PROBE_REQ_RESET
#define MAC_PCU_RX_FILTER_XR_POLL_MSB 		 RXPCU_RX_FILTER_XR_POLL_MSB
#define MAC_PCU_RX_FILTER_XR_POLL_LSB 		 RXPCU_RX_FILTER_XR_POLL_LSB
#define MAC_PCU_RX_FILTER_XR_POLL_MASK 		 RXPCU_RX_FILTER_XR_POLL_MASK
#define MAC_PCU_RX_FILTER_XR_POLL_GET(x) 		 RXPCU_RX_FILTER_XR_POLL_GET(x)
#define MAC_PCU_RX_FILTER_XR_POLL_SET(x) 		 RXPCU_RX_FILTER_XR_POLL_SET(x)
#define MAC_PCU_RX_FILTER_XR_POLL_RESET 		 RXPCU_RX_FILTER_XR_POLL_RESET
#define MAC_PCU_RX_FILTER_PROMISCUOUS_MSB 		 RXPCU_RX_FILTER_PROMISCUOUS_MSB
#define MAC_PCU_RX_FILTER_PROMISCUOUS_LSB 		 RXPCU_RX_FILTER_PROMISCUOUS_LSB
#define MAC_PCU_RX_FILTER_PROMISCUOUS_MASK 		 RXPCU_RX_FILTER_PROMISCUOUS_MASK
#define MAC_PCU_RX_FILTER_PROMISCUOUS_GET(x) 		 RXPCU_RX_FILTER_PROMISCUOUS_GET(x)
#define MAC_PCU_RX_FILTER_PROMISCUOUS_SET(x) 		 RXPCU_RX_FILTER_PROMISCUOUS_SET(x)
#define MAC_PCU_RX_FILTER_PROMISCUOUS_RESET 		 RXPCU_RX_FILTER_PROMISCUOUS_RESET
#define MAC_PCU_RX_FILTER_BEACON_MSB 		 RXPCU_RX_FILTER_BEACON_MSB
#define MAC_PCU_RX_FILTER_BEACON_LSB 		 RXPCU_RX_FILTER_BEACON_LSB
#define MAC_PCU_RX_FILTER_BEACON_MASK 		 RXPCU_RX_FILTER_BEACON_MASK
#define MAC_PCU_RX_FILTER_BEACON_GET(x) 		 RXPCU_RX_FILTER_BEACON_GET(x)
#define MAC_PCU_RX_FILTER_BEACON_SET(x) 		 RXPCU_RX_FILTER_BEACON_SET(x)
#define MAC_PCU_RX_FILTER_BEACON_RESET 		 RXPCU_RX_FILTER_BEACON_RESET
#define MAC_PCU_RX_FILTER_CONTROL_MSB 		 RXPCU_RX_FILTER_CONTROL_MSB
#define MAC_PCU_RX_FILTER_CONTROL_LSB 		 RXPCU_RX_FILTER_CONTROL_LSB
#define MAC_PCU_RX_FILTER_CONTROL_MASK 		 RXPCU_RX_FILTER_CONTROL_MASK
#define MAC_PCU_RX_FILTER_CONTROL_GET(x) 		 RXPCU_RX_FILTER_CONTROL_GET(x)
#define MAC_PCU_RX_FILTER_CONTROL_SET(x) 		 RXPCU_RX_FILTER_CONTROL_SET(x)
#define MAC_PCU_RX_FILTER_CONTROL_RESET 		 RXPCU_RX_FILTER_CONTROL_RESET
#define MAC_PCU_RX_FILTER_BROADCAST_MSB 		 RXPCU_RX_FILTER_BROADCAST_MSB
#define MAC_PCU_RX_FILTER_BROADCAST_LSB 		 RXPCU_RX_FILTER_BROADCAST_LSB
#define MAC_PCU_RX_FILTER_BROADCAST_MASK 		 RXPCU_RX_FILTER_BROADCAST_MASK
#define MAC_PCU_RX_FILTER_BROADCAST_GET(x) 		 RXPCU_RX_FILTER_BROADCAST_GET(x)
#define MAC_PCU_RX_FILTER_BROADCAST_SET(x) 		 RXPCU_RX_FILTER_BROADCAST_SET(x)
#define MAC_PCU_RX_FILTER_BROADCAST_RESET 		 RXPCU_RX_FILTER_BROADCAST_RESET
#define MAC_PCU_RX_FILTER_MULTICAST_MSB 		 RXPCU_RX_FILTER_MULTICAST_MSB
#define MAC_PCU_RX_FILTER_MULTICAST_LSB 		 RXPCU_RX_FILTER_MULTICAST_LSB
#define MAC_PCU_RX_FILTER_MULTICAST_MASK 		 RXPCU_RX_FILTER_MULTICAST_MASK
#define MAC_PCU_RX_FILTER_MULTICAST_GET(x) 		 RXPCU_RX_FILTER_MULTICAST_GET(x)
#define MAC_PCU_RX_FILTER_MULTICAST_SET(x) 		 RXPCU_RX_FILTER_MULTICAST_SET(x)
#define MAC_PCU_RX_FILTER_MULTICAST_RESET 		 RXPCU_RX_FILTER_MULTICAST_RESET
#define MAC_PCU_RX_FILTER_UNICAST_MSB 		 RXPCU_RX_FILTER_UNICAST_MSB
#define MAC_PCU_RX_FILTER_UNICAST_LSB 		 RXPCU_RX_FILTER_UNICAST_LSB
#define MAC_PCU_RX_FILTER_UNICAST_MASK 		 RXPCU_RX_FILTER_UNICAST_MASK
#define MAC_PCU_RX_FILTER_UNICAST_GET(x) 		 RXPCU_RX_FILTER_UNICAST_GET(x)
#define MAC_PCU_RX_FILTER_UNICAST_SET(x) 		 RXPCU_RX_FILTER_UNICAST_SET(x)
#define MAC_PCU_RX_FILTER_UNICAST_RESET 		 RXPCU_RX_FILTER_UNICAST_RESET
#define MAC_PCU_RX_FILTER_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_RX_FILTER_ADDRESS
// SW modifiable bits
#define MAC_PCU_RX_FILTER_SW_MASK 		 RXPCU_RX_FILTER_SW_MASK
// bits defined at reset
#define MAC_PCU_RX_FILTER_RSTMASK 		 RXPCU_RX_FILTER_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_RX_FILTER_RESET 		 RXPCU_RX_FILTER_RESET

// 32'h8040 (MAC_PCU_MCAST_FILTER_L32)
#define MAC_PCU_MCAST_FILTER_L32_VALUE_MSB 		 RXPCU_MCAST_FILTER_L32_VALUE_MSB
#define MAC_PCU_MCAST_FILTER_L32_VALUE_LSB 		 RXPCU_MCAST_FILTER_L32_VALUE_LSB
#define MAC_PCU_MCAST_FILTER_L32_VALUE_MASK 		 RXPCU_MCAST_FILTER_L32_VALUE_MASK
#define MAC_PCU_MCAST_FILTER_L32_VALUE_GET(x) 		 RXPCU_MCAST_FILTER_L32_VALUE_GET(x)
#define MAC_PCU_MCAST_FILTER_L32_VALUE_SET(x) 		 RXPCU_MCAST_FILTER_L32_VALUE_SET(x)
#define MAC_PCU_MCAST_FILTER_L32_VALUE_RESET 		 RXPCU_MCAST_FILTER_L32_VALUE_RESET
#define MAC_PCU_MCAST_FILTER_L32_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_MCAST_FILTER_L32_ADDRESS
// SW modifiable bits
#define MAC_PCU_MCAST_FILTER_L32_SW_MASK 		 RXPCU_MCAST_FILTER_L32_SW_MASK
// bits defined at reset
#define MAC_PCU_MCAST_FILTER_L32_RSTMASK 		 RXPCU_MCAST_FILTER_L32_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_MCAST_FILTER_L32_RESET 		 RXPCU_MCAST_FILTER_L32_RESET

// 32'h8044 (MAC_PCU_MCAST_FILTER_U32)
#define MAC_PCU_MCAST_FILTER_U32_VALUE_MSB 		 RXPCU_MCAST_FILTER_U32_VALUE_MSB
#define MAC_PCU_MCAST_FILTER_U32_VALUE_LSB 		 RXPCU_MCAST_FILTER_U32_VALUE_LSB
#define MAC_PCU_MCAST_FILTER_U32_VALUE_MASK 		 RXPCU_MCAST_FILTER_U32_VALUE_MASK
#define MAC_PCU_MCAST_FILTER_U32_VALUE_GET(x) 		 RXPCU_MCAST_FILTER_U32_VALUE_GET(x)
#define MAC_PCU_MCAST_FILTER_U32_VALUE_SET(x) 		 RXPCU_MCAST_FILTER_U32_VALUE_SET(x)
#define MAC_PCU_MCAST_FILTER_U32_VALUE_RESET 		 RXPCU_MCAST_FILTER_U32_VALUE_RESET
#define MAC_PCU_MCAST_FILTER_U32_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_MCAST_FILTER_U32_ADDRESS
// SW modifiable bits
#define MAC_PCU_MCAST_FILTER_U32_SW_MASK 		 RXPCU_MCAST_FILTER_U32_SW_MASK
// bits defined at reset
#define MAC_PCU_MCAST_FILTER_U32_RSTMASK 		 RXPCU_MCAST_FILTER_U32_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_MCAST_FILTER_U32_RESET 		 RXPCU_MCAST_FILTER_U32_RESET

// 32'h8058 (MAC_PCU_DEF_ANTENNA)
#define MAC_PCU_DEF_ANTENNA_RX_ANT_DIV_ON_MSB 		 TXPCU_DEF_ANTENNA_RX_ANT_DIV_ON_MSB
#define MAC_PCU_DEF_ANTENNA_RX_ANT_DIV_ON_LSB 		 TXPCU_DEF_ANTENNA_RX_ANT_DIV_ON_LSB
#define MAC_PCU_DEF_ANTENNA_RX_ANT_DIV_ON_MASK 		 TXPCU_DEF_ANTENNA_RX_ANT_DIV_ON_MASK
#define MAC_PCU_DEF_ANTENNA_RX_ANT_DIV_ON_GET(x) 		 TXPCU_DEF_ANTENNA_RX_ANT_DIV_ON_GET(x)
#define MAC_PCU_DEF_ANTENNA_RX_ANT_DIV_ON_SET(x) 		 TXPCU_DEF_ANTENNA_RX_ANT_DIV_ON_SET(x)
#define MAC_PCU_DEF_ANTENNA_RX_ANT_DIV_ON_RESET 		 TXPCU_DEF_ANTENNA_RX_ANT_DIV_ON_RESET
#define MAC_PCU_DEF_ANTENNA_RX_ANT_EN_MSB 		 TXPCU_DEF_ANTENNA_RX_ANT_EN_MSB
#define MAC_PCU_DEF_ANTENNA_RX_ANT_EN_LSB 		 TXPCU_DEF_ANTENNA_RX_ANT_EN_LSB
#define MAC_PCU_DEF_ANTENNA_RX_ANT_EN_MASK 		 TXPCU_DEF_ANTENNA_RX_ANT_EN_MASK
#define MAC_PCU_DEF_ANTENNA_RX_ANT_EN_GET(x) 		 TXPCU_DEF_ANTENNA_RX_ANT_EN_GET(x)
#define MAC_PCU_DEF_ANTENNA_RX_ANT_EN_SET(x) 		 TXPCU_DEF_ANTENNA_RX_ANT_EN_SET(x)
#define MAC_PCU_DEF_ANTENNA_RX_ANT_EN_RESET 		 TXPCU_DEF_ANTENNA_RX_ANT_EN_RESET
#define MAC_PCU_DEF_ANTENNA_FAST_TX_ANT_EN_MSB 		 TXPCU_DEF_ANTENNA_FAST_TX_ANT_EN_MSB
#define MAC_PCU_DEF_ANTENNA_FAST_TX_ANT_EN_LSB 		 TXPCU_DEF_ANTENNA_FAST_TX_ANT_EN_LSB
#define MAC_PCU_DEF_ANTENNA_FAST_TX_ANT_EN_MASK 		 TXPCU_DEF_ANTENNA_FAST_TX_ANT_EN_MASK
#define MAC_PCU_DEF_ANTENNA_FAST_TX_ANT_EN_GET(x) 		 TXPCU_DEF_ANTENNA_FAST_TX_ANT_EN_GET(x)
#define MAC_PCU_DEF_ANTENNA_FAST_TX_ANT_EN_SET(x) 		 TXPCU_DEF_ANTENNA_FAST_TX_ANT_EN_SET(x)
#define MAC_PCU_DEF_ANTENNA_FAST_TX_ANT_EN_RESET 		 TXPCU_DEF_ANTENNA_FAST_TX_ANT_EN_RESET
#define MAC_PCU_DEF_ANTENNA_RX_LNA_CONFIG_SEL_MSB 		 TXPCU_DEF_ANTENNA_RX_LNA_CONFIG_SEL_MSB
#define MAC_PCU_DEF_ANTENNA_RX_LNA_CONFIG_SEL_LSB 		 TXPCU_DEF_ANTENNA_RX_LNA_CONFIG_SEL_LSB
#define MAC_PCU_DEF_ANTENNA_RX_LNA_CONFIG_SEL_MASK 		 TXPCU_DEF_ANTENNA_RX_LNA_CONFIG_SEL_MASK
#define MAC_PCU_DEF_ANTENNA_RX_LNA_CONFIG_SEL_GET(x) 		 TXPCU_DEF_ANTENNA_RX_LNA_CONFIG_SEL_GET(x)
#define MAC_PCU_DEF_ANTENNA_RX_LNA_CONFIG_SEL_SET(x) 		 TXPCU_DEF_ANTENNA_RX_LNA_CONFIG_SEL_SET(x)
#define MAC_PCU_DEF_ANTENNA_RX_LNA_CONFIG_SEL_RESET 		 TXPCU_DEF_ANTENNA_RX_LNA_CONFIG_SEL_RESET
#define MAC_PCU_DEF_ANTENNA_FAST_DEF_ANT_MSB 		 TXPCU_DEF_ANTENNA_FAST_DEF_ANT_MSB
#define MAC_PCU_DEF_ANTENNA_FAST_DEF_ANT_LSB 		 TXPCU_DEF_ANTENNA_FAST_DEF_ANT_LSB
#define MAC_PCU_DEF_ANTENNA_FAST_DEF_ANT_MASK 		 TXPCU_DEF_ANTENNA_FAST_DEF_ANT_MASK
#define MAC_PCU_DEF_ANTENNA_FAST_DEF_ANT_GET(x) 		 TXPCU_DEF_ANTENNA_FAST_DEF_ANT_GET(x)
#define MAC_PCU_DEF_ANTENNA_FAST_DEF_ANT_SET(x) 		 TXPCU_DEF_ANTENNA_FAST_DEF_ANT_SET(x)
#define MAC_PCU_DEF_ANTENNA_FAST_DEF_ANT_RESET 		 TXPCU_DEF_ANTENNA_FAST_DEF_ANT_RESET
#define MAC_PCU_DEF_ANTENNA_TX_CUR_ANT_MSB 		 TXPCU_DEF_ANTENNA_TX_CUR_ANT_MSB
#define MAC_PCU_DEF_ANTENNA_TX_CUR_ANT_LSB 		 TXPCU_DEF_ANTENNA_TX_CUR_ANT_LSB
#define MAC_PCU_DEF_ANTENNA_TX_CUR_ANT_MASK 		 TXPCU_DEF_ANTENNA_TX_CUR_ANT_MASK
#define MAC_PCU_DEF_ANTENNA_TX_CUR_ANT_GET(x) 		 TXPCU_DEF_ANTENNA_TX_CUR_ANT_GET(x)
#define MAC_PCU_DEF_ANTENNA_TX_CUR_ANT_SET(x) 		 TXPCU_DEF_ANTENNA_TX_CUR_ANT_SET(x)
#define MAC_PCU_DEF_ANTENNA_TX_CUR_ANT_RESET 		 TXPCU_DEF_ANTENNA_TX_CUR_ANT_RESET
#define MAC_PCU_DEF_ANTENNA_SLOW_TX_ANT_EN_MSB 		 TXPCU_DEF_ANTENNA_SLOW_TX_ANT_EN_MSB
#define MAC_PCU_DEF_ANTENNA_SLOW_TX_ANT_EN_LSB 		 TXPCU_DEF_ANTENNA_SLOW_TX_ANT_EN_LSB
#define MAC_PCU_DEF_ANTENNA_SLOW_TX_ANT_EN_MASK 		 TXPCU_DEF_ANTENNA_SLOW_TX_ANT_EN_MASK
#define MAC_PCU_DEF_ANTENNA_SLOW_TX_ANT_EN_GET(x) 		 TXPCU_DEF_ANTENNA_SLOW_TX_ANT_EN_GET(x)
#define MAC_PCU_DEF_ANTENNA_SLOW_TX_ANT_EN_SET(x) 		 TXPCU_DEF_ANTENNA_SLOW_TX_ANT_EN_SET(x)
#define MAC_PCU_DEF_ANTENNA_SLOW_TX_ANT_EN_RESET 		 TXPCU_DEF_ANTENNA_SLOW_TX_ANT_EN_RESET
#define MAC_PCU_DEF_ANTENNA_TX_DEF_ANT_SEL_MSB 		 TXPCU_DEF_ANTENNA_TX_DEF_ANT_SEL_MSB
#define MAC_PCU_DEF_ANTENNA_TX_DEF_ANT_SEL_LSB 		 TXPCU_DEF_ANTENNA_TX_DEF_ANT_SEL_LSB
#define MAC_PCU_DEF_ANTENNA_TX_DEF_ANT_SEL_MASK 		 TXPCU_DEF_ANTENNA_TX_DEF_ANT_SEL_MASK
#define MAC_PCU_DEF_ANTENNA_TX_DEF_ANT_SEL_GET(x) 		 TXPCU_DEF_ANTENNA_TX_DEF_ANT_SEL_GET(x)
#define MAC_PCU_DEF_ANTENNA_TX_DEF_ANT_SEL_SET(x) 		 TXPCU_DEF_ANTENNA_TX_DEF_ANT_SEL_SET(x)
#define MAC_PCU_DEF_ANTENNA_TX_DEF_ANT_SEL_RESET 		 TXPCU_DEF_ANTENNA_TX_DEF_ANT_SEL_RESET
#define MAC_PCU_DEF_ANTENNA_VALUE_MSB 		 TXPCU_DEF_ANTENNA_VALUE_MSB
#define MAC_PCU_DEF_ANTENNA_VALUE_LSB 		 TXPCU_DEF_ANTENNA_VALUE_LSB
#define MAC_PCU_DEF_ANTENNA_VALUE_MASK 		 TXPCU_DEF_ANTENNA_VALUE_MASK
#define MAC_PCU_DEF_ANTENNA_VALUE_GET(x) 		 TXPCU_DEF_ANTENNA_VALUE_GET(x)
#define MAC_PCU_DEF_ANTENNA_VALUE_SET(x) 		 TXPCU_DEF_ANTENNA_VALUE_SET(x)
#define MAC_PCU_DEF_ANTENNA_VALUE_RESET 		 TXPCU_DEF_ANTENNA_VALUE_RESET
#define MAC_PCU_DEF_ANTENNA_ADDRESS 		 MAC_TXPCU_BASE_ADDRESS+TXPCU_DEF_ANTENNA_ADDRESS
// SW modifiable bits
#define MAC_PCU_DEF_ANTENNA_SW_MASK 		 TXPCU_DEF_ANTENNA_SW_MASK
// bits defined at reset
#define MAC_PCU_DEF_ANTENNA_RSTMASK 		 TXPCU_DEF_ANTENNA_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_DEF_ANTENNA_RESET 		 TXPCU_DEF_ANTENNA_RESET

// 32'h805c (MAC_PCU_AES_MUTE_MASK_0)
#define MAC_PCU_AES_MUTE_MASK_0_QOS_MSB 		 AES_MUTE_MASK_0_QOS_MSB
#define MAC_PCU_AES_MUTE_MASK_0_QOS_LSB 		 AES_MUTE_MASK_0_QOS_LSB
#define MAC_PCU_AES_MUTE_MASK_0_QOS_MASK 		 AES_MUTE_MASK_0_QOS_MASK
#define MAC_PCU_AES_MUTE_MASK_0_QOS_GET(x) 		 AES_MUTE_MASK_0_QOS_GET(x)
#define MAC_PCU_AES_MUTE_MASK_0_QOS_SET(x) 		 AES_MUTE_MASK_0_QOS_SET(x)
#define MAC_PCU_AES_MUTE_MASK_0_QOS_RESET 		 AES_MUTE_MASK_0_QOS_RESET
#define MAC_PCU_AES_MUTE_MASK_0_FC_MSB 		 AES_MUTE_MASK_0_FC_MSB
#define MAC_PCU_AES_MUTE_MASK_0_FC_LSB 		 AES_MUTE_MASK_0_FC_LSB
#define MAC_PCU_AES_MUTE_MASK_0_FC_MASK 		 AES_MUTE_MASK_0_FC_MASK
#define MAC_PCU_AES_MUTE_MASK_0_FC_GET(x) 		 AES_MUTE_MASK_0_FC_GET(x)
#define MAC_PCU_AES_MUTE_MASK_0_FC_SET(x) 		 AES_MUTE_MASK_0_FC_SET(x)
#define MAC_PCU_AES_MUTE_MASK_0_FC_RESET 		 AES_MUTE_MASK_0_FC_RESET
#define MAC_PCU_AES_MUTE_MASK_0_ADDRESS 		 MAC_CRYPTO_BASE_ADDRESS+AES_MUTE_MASK_0_ADDRESS
// SW modifiable bits
#define MAC_PCU_AES_MUTE_MASK_0_SW_MASK 		 AES_MUTE_MASK_0_SW_MASK
// bits defined at reset
#define MAC_PCU_AES_MUTE_MASK_0_RSTMASK 		 AES_MUTE_MASK_0_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_AES_MUTE_MASK_0_RESET 		 AES_MUTE_MASK_0_RESET

// 32'h8060 (MAC_PCU_AES_MUTE_MASK_1)
#define MAC_PCU_AES_MUTE_MASK_1_FC_MGMT_MSB 		 AES_MUTE_MASK_1_FC_MGMT_MSB
#define MAC_PCU_AES_MUTE_MASK_1_FC_MGMT_LSB 		 AES_MUTE_MASK_1_FC_MGMT_LSB
#define MAC_PCU_AES_MUTE_MASK_1_FC_MGMT_MASK 		 AES_MUTE_MASK_1_FC_MGMT_MASK
#define MAC_PCU_AES_MUTE_MASK_1_FC_MGMT_GET(x) 		 AES_MUTE_MASK_1_FC_MGMT_GET(x)
#define MAC_PCU_AES_MUTE_MASK_1_FC_MGMT_SET(x) 		 AES_MUTE_MASK_1_FC_MGMT_SET(x)
#define MAC_PCU_AES_MUTE_MASK_1_FC_MGMT_RESET 		 AES_MUTE_MASK_1_FC_MGMT_RESET
#define MAC_PCU_AES_MUTE_MASK_1_SEQ_MSB 		 AES_MUTE_MASK_1_SEQ_MSB
#define MAC_PCU_AES_MUTE_MASK_1_SEQ_LSB 		 AES_MUTE_MASK_1_SEQ_LSB
#define MAC_PCU_AES_MUTE_MASK_1_SEQ_MASK 		 AES_MUTE_MASK_1_SEQ_MASK
#define MAC_PCU_AES_MUTE_MASK_1_SEQ_GET(x) 		 AES_MUTE_MASK_1_SEQ_GET(x)
#define MAC_PCU_AES_MUTE_MASK_1_SEQ_SET(x) 		 AES_MUTE_MASK_1_SEQ_SET(x)
#define MAC_PCU_AES_MUTE_MASK_1_SEQ_RESET 		 AES_MUTE_MASK_1_SEQ_RESET
#define MAC_PCU_AES_MUTE_MASK_1_ADDRESS 		 MAC_CRYPTO_BASE_ADDRESS+AES_MUTE_MASK_1_ADDRESS
// SW modifiable bits
#define MAC_PCU_AES_MUTE_MASK_1_SW_MASK 		 AES_MUTE_MASK_1_SW_MASK
// bits defined at reset
#define MAC_PCU_AES_MUTE_MASK_1_RSTMASK 		 AES_MUTE_MASK_1_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_AES_MUTE_MASK_1_RESET 		 AES_MUTE_MASK_1_RESET

// 32'h8070 (MAC_PCU_DYM_MIMO_PWR_SAVE)
#define MAC_PCU_DYM_MIMO_PWR_SAVE_HI_PWR_CHAIN_MASK_MSB 		 RXPCU_DYM_MIMO_PWR_SAVE_HI_PWR_CHAIN_MASK_MSB
#define MAC_PCU_DYM_MIMO_PWR_SAVE_HI_PWR_CHAIN_MASK_LSB 		 RXPCU_DYM_MIMO_PWR_SAVE_HI_PWR_CHAIN_MASK_LSB
#define MAC_PCU_DYM_MIMO_PWR_SAVE_HI_PWR_CHAIN_MASK_MASK 		 RXPCU_DYM_MIMO_PWR_SAVE_HI_PWR_CHAIN_MASK_MASK
#define MAC_PCU_DYM_MIMO_PWR_SAVE_HI_PWR_CHAIN_MASK_GET(x) 		 RXPCU_DYM_MIMO_PWR_SAVE_HI_PWR_CHAIN_MASK_GET(x)
#define MAC_PCU_DYM_MIMO_PWR_SAVE_HI_PWR_CHAIN_MASK_SET(x) 		 RXPCU_DYM_MIMO_PWR_SAVE_HI_PWR_CHAIN_MASK_SET(x)
#define MAC_PCU_DYM_MIMO_PWR_SAVE_HI_PWR_CHAIN_MASK_RESET 		 RXPCU_DYM_MIMO_PWR_SAVE_HI_PWR_CHAIN_MASK_RESET
#define MAC_PCU_DYM_MIMO_PWR_SAVE_LOW_PWR_CHAIN_MASK_MSB 		 RXPCU_DYM_MIMO_PWR_SAVE_LOW_PWR_CHAIN_MASK_MSB
#define MAC_PCU_DYM_MIMO_PWR_SAVE_LOW_PWR_CHAIN_MASK_LSB 		 RXPCU_DYM_MIMO_PWR_SAVE_LOW_PWR_CHAIN_MASK_LSB
#define MAC_PCU_DYM_MIMO_PWR_SAVE_LOW_PWR_CHAIN_MASK_MASK 		 RXPCU_DYM_MIMO_PWR_SAVE_LOW_PWR_CHAIN_MASK_MASK
#define MAC_PCU_DYM_MIMO_PWR_SAVE_LOW_PWR_CHAIN_MASK_GET(x) 		 RXPCU_DYM_MIMO_PWR_SAVE_LOW_PWR_CHAIN_MASK_GET(x)
#define MAC_PCU_DYM_MIMO_PWR_SAVE_LOW_PWR_CHAIN_MASK_SET(x) 		 RXPCU_DYM_MIMO_PWR_SAVE_LOW_PWR_CHAIN_MASK_SET(x)
#define MAC_PCU_DYM_MIMO_PWR_SAVE_LOW_PWR_CHAIN_MASK_RESET 		 RXPCU_DYM_MIMO_PWR_SAVE_LOW_PWR_CHAIN_MASK_RESET
#define MAC_PCU_DYM_MIMO_PWR_SAVE_SW_CHAIN_MASK_SEL_MSB 		 RXPCU_DYM_MIMO_PWR_SAVE_SW_CHAIN_MASK_SEL_MSB
#define MAC_PCU_DYM_MIMO_PWR_SAVE_SW_CHAIN_MASK_SEL_LSB 		 RXPCU_DYM_MIMO_PWR_SAVE_SW_CHAIN_MASK_SEL_LSB
#define MAC_PCU_DYM_MIMO_PWR_SAVE_SW_CHAIN_MASK_SEL_MASK 		 RXPCU_DYM_MIMO_PWR_SAVE_SW_CHAIN_MASK_SEL_MASK
#define MAC_PCU_DYM_MIMO_PWR_SAVE_SW_CHAIN_MASK_SEL_GET(x) 		 RXPCU_DYM_MIMO_PWR_SAVE_SW_CHAIN_MASK_SEL_GET(x)
#define MAC_PCU_DYM_MIMO_PWR_SAVE_SW_CHAIN_MASK_SEL_SET(x) 		 RXPCU_DYM_MIMO_PWR_SAVE_SW_CHAIN_MASK_SEL_SET(x)
#define MAC_PCU_DYM_MIMO_PWR_SAVE_SW_CHAIN_MASK_SEL_RESET 		 RXPCU_DYM_MIMO_PWR_SAVE_SW_CHAIN_MASK_SEL_RESET
#define MAC_PCU_DYM_MIMO_PWR_SAVE_HW_CTRL_EN_MSB 		 RXPCU_DYM_MIMO_PWR_SAVE_HW_CTRL_EN_MSB
#define MAC_PCU_DYM_MIMO_PWR_SAVE_HW_CTRL_EN_LSB 		 RXPCU_DYM_MIMO_PWR_SAVE_HW_CTRL_EN_LSB
#define MAC_PCU_DYM_MIMO_PWR_SAVE_HW_CTRL_EN_MASK 		 RXPCU_DYM_MIMO_PWR_SAVE_HW_CTRL_EN_MASK
#define MAC_PCU_DYM_MIMO_PWR_SAVE_HW_CTRL_EN_GET(x) 		 RXPCU_DYM_MIMO_PWR_SAVE_HW_CTRL_EN_GET(x)
#define MAC_PCU_DYM_MIMO_PWR_SAVE_HW_CTRL_EN_SET(x) 		 RXPCU_DYM_MIMO_PWR_SAVE_HW_CTRL_EN_SET(x)
#define MAC_PCU_DYM_MIMO_PWR_SAVE_HW_CTRL_EN_RESET 		 RXPCU_DYM_MIMO_PWR_SAVE_HW_CTRL_EN_RESET
#define MAC_PCU_DYM_MIMO_PWR_SAVE_USE_MAC_CTRL_MSB 		 RXPCU_DYM_MIMO_PWR_SAVE_USE_MAC_CTRL_MSB
#define MAC_PCU_DYM_MIMO_PWR_SAVE_USE_MAC_CTRL_LSB 		 RXPCU_DYM_MIMO_PWR_SAVE_USE_MAC_CTRL_LSB
#define MAC_PCU_DYM_MIMO_PWR_SAVE_USE_MAC_CTRL_MASK 		 RXPCU_DYM_MIMO_PWR_SAVE_USE_MAC_CTRL_MASK
#define MAC_PCU_DYM_MIMO_PWR_SAVE_USE_MAC_CTRL_GET(x) 		 RXPCU_DYM_MIMO_PWR_SAVE_USE_MAC_CTRL_GET(x)
#define MAC_PCU_DYM_MIMO_PWR_SAVE_USE_MAC_CTRL_SET(x) 		 RXPCU_DYM_MIMO_PWR_SAVE_USE_MAC_CTRL_SET(x)
#define MAC_PCU_DYM_MIMO_PWR_SAVE_USE_MAC_CTRL_RESET 		 RXPCU_DYM_MIMO_PWR_SAVE_USE_MAC_CTRL_RESET
#define MAC_PCU_DYM_MIMO_PWR_SAVE_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_DYM_MIMO_PWR_SAVE_ADDRESS
// SW modifiable bits
#define MAC_PCU_DYM_MIMO_PWR_SAVE_SW_MASK 		 RXPCU_DYM_MIMO_PWR_SAVE_SW_MASK
// bits defined at reset
#define MAC_PCU_DYM_MIMO_PWR_SAVE_RSTMASK 		 RXPCU_DYM_MIMO_PWR_SAVE_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_DYM_MIMO_PWR_SAVE_RESET 		 RXPCU_DYM_MIMO_PWR_SAVE_RESET

// 32'h8080 (MAC_PCU_LAST_BEACON_TSF)
#define MAC_PCU_LAST_BEACON_TSF_VALUE_MSB 		 RXPCU_LAST_BEACON_TSF_VALUE_MSB
#define MAC_PCU_LAST_BEACON_TSF_VALUE_LSB 		 RXPCU_LAST_BEACON_TSF_VALUE_LSB
#define MAC_PCU_LAST_BEACON_TSF_VALUE_MASK 		 RXPCU_LAST_BEACON_TSF_VALUE_MASK
#define MAC_PCU_LAST_BEACON_TSF_VALUE_GET(x) 		 RXPCU_LAST_BEACON_TSF_VALUE_GET(x)
#define MAC_PCU_LAST_BEACON_TSF_VALUE_SET(x) 		 RXPCU_LAST_BEACON_TSF_VALUE_SET(x)
#define MAC_PCU_LAST_BEACON_TSF_VALUE_RESET 		 RXPCU_LAST_BEACON_TSF_VALUE_RESET
#define MAC_PCU_LAST_BEACON_TSF_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_LAST_BEACON_TSF_ADDRESS
// SW modifiable bits
#define MAC_PCU_LAST_BEACON_TSF_SW_MASK 		 RXPCU_LAST_BEACON_TSF_SW_MASK
// bits defined at reset
#define MAC_PCU_LAST_BEACON_TSF_RSTMASK 		 RXPCU_LAST_BEACON_TSF_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_LAST_BEACON_TSF_RESET 		 RXPCU_LAST_BEACON_TSF_RESET

// 32'h8084 (MAC_PCU_NAV)
#define MAC_PCU_NAV_VALUE_MSB 		 RXPCU_NAV_VALUE_MSB
#define MAC_PCU_NAV_VALUE_LSB 		 RXPCU_NAV_VALUE_LSB
#define MAC_PCU_NAV_VALUE_MASK 		 RXPCU_NAV_VALUE_MASK
#define MAC_PCU_NAV_VALUE_GET(x) 		 RXPCU_NAV_VALUE_GET(x)
#define MAC_PCU_NAV_VALUE_SET(x) 		 RXPCU_NAV_VALUE_SET(x)
#define MAC_PCU_NAV_VALUE_RESET 		 RXPCU_NAV_VALUE_RESET
#define MAC_PCU_NAV_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_NAV_ADDRESS
// SW modifiable bits
#define MAC_PCU_NAV_SW_MASK 		 RXPCU_NAV_SW_MASK
// bits defined at reset
#define MAC_PCU_NAV_RSTMASK 		 RXPCU_NAV_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_NAV_RESET 		 RXPCU_NAV_RESET

// 32'h8088 (MAC_PCU_RTS_SUCCESS_CNT)
#define MAC_PCU_RTS_SUCCESS_CNT_VALUE_MSB 	 TXPCU_DEBUG_RTS_SUCCESS_CNT_VALUE_MSB
#define MAC_PCU_RTS_SUCCESS_CNT_VALUE_LSB 	 TXPCU_DEBUG_RTS_SUCCESS_CNT_VALUE_LSB
#define MAC_PCU_RTS_SUCCESS_CNT_VALUE_MASK 	 TXPCU_DEBUG_RTS_SUCCESS_CNT_VALUE_MASK
#define MAC_PCU_RTS_SUCCESS_CNT_VALUE_GET(x) 	 TXPCU_DEBUG_RTS_SUCCESS_CNT_VALUE_GET(x)
#define MAC_PCU_RTS_SUCCESS_CNT_VALUE_SET(x) 	 TXPCU_DEBUG_RTS_SUCCESS_CNT_VALUE_SET(x)
#define MAC_PCU_RTS_SUCCESS_CNT_VALUE_RESET 	 TXPCU_DEBUG_RTS_SUCCESS_CNT_VALUE_RESET
#define MAC_PCU_RTS_SUCCESS_CNT_ADDRESS 	 MAC_TXPCU_BASE_ADDRESS+TXPCU_DEBUG_RTS_SUCCESS_CNT_ADDRESS
// SW modifiable bits
#define MAC_PCU_RTS_SUCCESS_CNT_SW_MASK 	 TXPCU_DEBUG_RTS_SUCCESS_CNT_SW_MASK
// bits defined at reset
#define MAC_PCU_RTS_SUCCESS_CNT_RSTMASK 	 TXPCU_DEBUG_RTS_SUCCESS_CNT_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_RTS_SUCCESS_CNT_RESET 		 TXPCU_DEBUG_RTS_SUCCESS_CNT_RESET

// 32'h808c (MAC_PCU_RTS_FAIL_CNT)
#define MAC_PCU_RTS_FAIL_CNT_VALUE_MSB 		 TXPCU_DEBUG_RTS_FAIL_CNT_VALUE_MSB
#define MAC_PCU_RTS_FAIL_CNT_VALUE_LSB 		 TXPCU_DEBUG_RTS_FAIL_CNT_VALUE_LSB
#define MAC_PCU_RTS_FAIL_CNT_VALUE_MASK 	 TXPCU_DEBUG_RTS_FAIL_CNT_VALUE_MASK
#define MAC_PCU_RTS_FAIL_CNT_VALUE_GET(x) 	 TXPCU_DEBUG_RTS_FAIL_CNT_VALUE_GET(x)
#define MAC_PCU_RTS_FAIL_CNT_VALUE_SET(x) 	 TXPCU_DEBUG_RTS_FAIL_CNT_VALUE_SET(x)
#define MAC_PCU_RTS_FAIL_CNT_VALUE_RESET 	 TXPCU_DEBUG_RTS_FAIL_CNT_VALUE_RESET
#define MAC_PCU_RTS_FAIL_CNT_ADDRESS 		 MAC_TXPCU_BASE_ADDRESS+TXPCU_DEBUG_RTS_FAIL_CNT_ADDRESS
// SW modifiable bits
#define MAC_PCU_RTS_FAIL_CNT_SW_MASK 		 TXPCU_DEBUG_RTS_FAIL_CNT_SW_MASK
// bits defined at reset
#define MAC_PCU_RTS_FAIL_CNT_RSTMASK 		 TXPCU_DEBUG_RTS_FAIL_CNT_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_RTS_FAIL_CNT_RESET 		 TXPCU_DEBUG_RTS_FAIL_CNT_RESET

// 32'h8090 (MAC_PCU_ACK_FAIL_CNT)
#define MAC_PCU_ACK_FAIL_CNT_VALUE_MSB 		 TXPCU_DEBUG_ACK_FAIL_CNT_VALUE_MSB
#define MAC_PCU_ACK_FAIL_CNT_VALUE_LSB 		 TXPCU_DEBUG_ACK_FAIL_CNT_VALUE_LSB
#define MAC_PCU_ACK_FAIL_CNT_VALUE_MASK 	 TXPCU_DEBUG_ACK_FAIL_CNT_VALUE_MASK
#define MAC_PCU_ACK_FAIL_CNT_VALUE_GET(x) 	 TXPCU_DEBUG_ACK_FAIL_CNT_VALUE_GET(x)
#define MAC_PCU_ACK_FAIL_CNT_VALUE_SET(x) 	 TXPCU_DEBUG_ACK_FAIL_CNT_VALUE_SET(x)
#define MAC_PCU_ACK_FAIL_CNT_VALUE_RESET 	 TXPCU_DEBUG_ACK_FAIL_CNT_VALUE_RESET
#define MAC_PCU_ACK_FAIL_CNT_ADDRESS 		 MAC_TXPCU_BASE_ADDRESS+TXPCU_DEBUG_ACK_FAIL_CNT_ADDRESS
// SW modifiable bits
#define MAC_PCU_ACK_FAIL_CNT_SW_MASK 		 TXPCU_DEBUG_ACK_FAIL_CNT_SW_MASK
// bits defined at reset
#define MAC_PCU_ACK_FAIL_CNT_RSTMASK 		 TXPCU_DEBUG_ACK_FAIL_CNT_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_ACK_FAIL_CNT_RESET 		 TXPCU_DEBUG_ACK_FAIL_CNT_RESET

// 32'h8094 (MAC_PCU_FCS_FAIL_CNT)
#define MAC_PCU_FCS_FAIL_CNT_VALUE_MSB 		 RXPCU_FCS_FAIL_CNT_VALUE_MSB
#define MAC_PCU_FCS_FAIL_CNT_VALUE_LSB 		 RXPCU_FCS_FAIL_CNT_VALUE_LSB
#define MAC_PCU_FCS_FAIL_CNT_VALUE_MASK 		 RXPCU_FCS_FAIL_CNT_VALUE_MASK
#define MAC_PCU_FCS_FAIL_CNT_VALUE_GET(x) 		 RXPCU_FCS_FAIL_CNT_VALUE_GET(x)
#define MAC_PCU_FCS_FAIL_CNT_VALUE_SET(x) 		 RXPCU_FCS_FAIL_CNT_VALUE_SET(x)
#define MAC_PCU_FCS_FAIL_CNT_VALUE_RESET 		 RXPCU_FCS_FAIL_CNT_VALUE_RESET
#define MAC_PCU_FCS_FAIL_CNT_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_FCS_FAIL_CNT_ADDRESS
// SW modifiable bits
#define MAC_PCU_FCS_FAIL_CNT_SW_MASK 		 RXPCU_FCS_FAIL_CNT_SW_MASK
// bits defined at reset
#define MAC_PCU_FCS_FAIL_CNT_RSTMASK 		 RXPCU_FCS_FAIL_CNT_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_FCS_FAIL_CNT_RESET 		 RXPCU_FCS_FAIL_CNT_RESET

// 32'h8098 (MAC_PCU_BEACON_CNT)
#define MAC_PCU_BEACON_CNT_VALUE_MSB 		 RXPCU_BEACON_CNT_VALUE_MSB
#define MAC_PCU_BEACON_CNT_VALUE_LSB 		 RXPCU_BEACON_CNT_VALUE_LSB
#define MAC_PCU_BEACON_CNT_VALUE_MASK 		 RXPCU_BEACON_CNT_VALUE_MASK
#define MAC_PCU_BEACON_CNT_VALUE_GET(x) 		 RXPCU_BEACON_CNT_VALUE_GET(x)
#define MAC_PCU_BEACON_CNT_VALUE_SET(x) 		 RXPCU_BEACON_CNT_VALUE_SET(x)
#define MAC_PCU_BEACON_CNT_VALUE_RESET 		 RXPCU_BEACON_CNT_VALUE_RESET
#define MAC_PCU_BEACON_CNT_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_BEACON_CNT_ADDRESS
// SW modifiable bits
#define MAC_PCU_BEACON_CNT_SW_MASK 		 RXPCU_BEACON_CNT_SW_MASK
// bits defined at reset
#define MAC_PCU_BEACON_CNT_RSTMASK 		 RXPCU_BEACON_CNT_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BEACON_CNT_RESET 		 RXPCU_BEACON_CNT_RESET

// 32'h809c (MAC_PCU_BEACON2_CNT)
#define MAC_PCU_BEACON2_CNT_VALUE_MSB 		 RXPCU_BEACON2_CNT_VALUE_MSB
#define MAC_PCU_BEACON2_CNT_VALUE_LSB 		 RXPCU_BEACON2_CNT_VALUE_LSB
#define MAC_PCU_BEACON2_CNT_VALUE_MASK 		 RXPCU_BEACON2_CNT_VALUE_MASK
#define MAC_PCU_BEACON2_CNT_VALUE_GET(x) 		 RXPCU_BEACON2_CNT_VALUE_GET(x)
#define MAC_PCU_BEACON2_CNT_VALUE_SET(x) 		 RXPCU_BEACON2_CNT_VALUE_SET(x)
#define MAC_PCU_BEACON2_CNT_VALUE_RESET 		 RXPCU_BEACON2_CNT_VALUE_RESET
#define MAC_PCU_BEACON2_CNT_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_BEACON2_CNT_ADDRESS
// SW modifiable bits
#define MAC_PCU_BEACON2_CNT_SW_MASK 		 RXPCU_BEACON2_CNT_SW_MASK
// bits defined at reset
#define MAC_PCU_BEACON2_CNT_RSTMASK 		 RXPCU_BEACON2_CNT_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BEACON2_CNT_RESET 		 RXPCU_BEACON2_CNT_RESET

// 32'h80a0 (MAC_PCU_BASIC_SET)
#define MAC_PCU_BASIC_SET_MCS_MSB 		 TXPCU_BASIC_SET_MCS_MSB
#define MAC_PCU_BASIC_SET_MCS_LSB 		 TXPCU_BASIC_SET_MCS_LSB
#define MAC_PCU_BASIC_SET_MCS_MASK 		 TXPCU_BASIC_SET_MCS_MASK
#define MAC_PCU_BASIC_SET_MCS_GET(x) 		 TXPCU_BASIC_SET_MCS_GET(x)
#define MAC_PCU_BASIC_SET_MCS_SET(x) 		 TXPCU_BASIC_SET_MCS_SET(x)
#define MAC_PCU_BASIC_SET_MCS_RESET 		 TXPCU_BASIC_SET_MCS_RESET
#define MAC_PCU_BASIC_SET_ADDRESS 		 MAC_TXPCU_BASE_ADDRESS+TXPCU_BASIC_SET_ADDRESS
// SW modifiable bits
#define MAC_PCU_BASIC_SET_SW_MASK 		 TXPCU_BASIC_SET_SW_MASK
// bits defined at reset
#define MAC_PCU_BASIC_SET_RSTMASK 		 TXPCU_BASIC_SET_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BASIC_SET_RESET 		 TXPCU_BASIC_SET_RESET

// 32'h80a4 (MAC_PCU_MGMT_SEQ)
#define MAC_PCU_MGMT_SEQ_MAX_MSB 		 TXPCU_MGMT_SEQ_MAX_MSB
#define MAC_PCU_MGMT_SEQ_MAX_LSB 		 TXPCU_MGMT_SEQ_MAX_LSB
#define MAC_PCU_MGMT_SEQ_MAX_MASK 		 TXPCU_MGMT_SEQ_MAX_MASK
#define MAC_PCU_MGMT_SEQ_MAX_GET(x) 		 TXPCU_MGMT_SEQ_MAX_GET(x)
#define MAC_PCU_MGMT_SEQ_MAX_SET(x) 		 TXPCU_MGMT_SEQ_MAX_SET(x)
#define MAC_PCU_MGMT_SEQ_MAX_RESET 		 TXPCU_MGMT_SEQ_MAX_RESET
#define MAC_PCU_MGMT_SEQ_MIN_MSB 		 TXPCU_MGMT_SEQ_MIN_MSB
#define MAC_PCU_MGMT_SEQ_MIN_LSB 		 TXPCU_MGMT_SEQ_MIN_LSB
#define MAC_PCU_MGMT_SEQ_MIN_MASK 		 TXPCU_MGMT_SEQ_MIN_MASK
#define MAC_PCU_MGMT_SEQ_MIN_GET(x) 		 TXPCU_MGMT_SEQ_MIN_GET(x)
#define MAC_PCU_MGMT_SEQ_MIN_SET(x) 		 TXPCU_MGMT_SEQ_MIN_SET(x)
#define MAC_PCU_MGMT_SEQ_MIN_RESET 		 TXPCU_MGMT_SEQ_MIN_RESET
#define MAC_PCU_MGMT_SEQ_ADDRESS 		 MAC_TXPCU_BASE_ADDRESS+TXPCU_MGMT_SEQ_ADDRESS
// SW modifiable bits
#define MAC_PCU_MGMT_SEQ_SW_MASK 		 TXPCU_MGMT_SEQ_SW_MASK
// bits defined at reset
#define MAC_PCU_MGMT_SEQ_RSTMASK 		 TXPCU_MGMT_SEQ_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_MGMT_SEQ_RESET 		 TXPCU_MGMT_SEQ_RESET

// 32'h80d0 (MAC_PCU_XRSTMP)
#define MAC_PCU_XRSTMP_RX_ABORT_RSSI_THRESH_MSB 		 RXPCU_XRSTMP_RX_ABORT_RSSI_THRESH_MSB
#define MAC_PCU_XRSTMP_RX_ABORT_RSSI_THRESH_LSB 		 RXPCU_XRSTMP_RX_ABORT_RSSI_THRESH_LSB
#define MAC_PCU_XRSTMP_RX_ABORT_RSSI_THRESH_MASK 		 RXPCU_XRSTMP_RX_ABORT_RSSI_THRESH_MASK
#define MAC_PCU_XRSTMP_RX_ABORT_RSSI_THRESH_GET(x) 		 RXPCU_XRSTMP_RX_ABORT_RSSI_THRESH_GET(x)
#define MAC_PCU_XRSTMP_RX_ABORT_RSSI_THRESH_SET(x) 		 RXPCU_XRSTMP_RX_ABORT_RSSI_THRESH_SET(x)
#define MAC_PCU_XRSTMP_RX_ABORT_RSSI_THRESH_RESET 		 RXPCU_XRSTMP_RX_ABORT_RSSI_THRESH_RESET
#define MAC_PCU_XRSTMP_TX_STOMP_RSSI_THRESH_MSB 		 RXPCU_XRSTMP_TX_STOMP_RSSI_THRESH_MSB
#define MAC_PCU_XRSTMP_TX_STOMP_RSSI_THRESH_LSB 		 RXPCU_XRSTMP_TX_STOMP_RSSI_THRESH_LSB
#define MAC_PCU_XRSTMP_TX_STOMP_RSSI_THRESH_MASK 		 RXPCU_XRSTMP_TX_STOMP_RSSI_THRESH_MASK
#define MAC_PCU_XRSTMP_TX_STOMP_RSSI_THRESH_GET(x) 		 RXPCU_XRSTMP_TX_STOMP_RSSI_THRESH_GET(x)
#define MAC_PCU_XRSTMP_TX_STOMP_RSSI_THRESH_SET(x) 		 RXPCU_XRSTMP_TX_STOMP_RSSI_THRESH_SET(x)
#define MAC_PCU_XRSTMP_TX_STOMP_RSSI_THRESH_RESET 		 RXPCU_XRSTMP_TX_STOMP_RSSI_THRESH_RESET
#define MAC_PCU_XRSTMP_RX_ABORT_DATA_MSB 		 RXPCU_XRSTMP_RX_ABORT_DATA_MSB
#define MAC_PCU_XRSTMP_RX_ABORT_DATA_LSB 		 RXPCU_XRSTMP_RX_ABORT_DATA_LSB
#define MAC_PCU_XRSTMP_RX_ABORT_DATA_MASK 		 RXPCU_XRSTMP_RX_ABORT_DATA_MASK
#define MAC_PCU_XRSTMP_RX_ABORT_DATA_GET(x) 		 RXPCU_XRSTMP_RX_ABORT_DATA_GET(x)
#define MAC_PCU_XRSTMP_RX_ABORT_DATA_SET(x) 		 RXPCU_XRSTMP_RX_ABORT_DATA_SET(x)
#define MAC_PCU_XRSTMP_RX_ABORT_DATA_RESET 		 RXPCU_XRSTMP_RX_ABORT_DATA_RESET
#define MAC_PCU_XRSTMP_TX_STOMP_DATA_MSB 		 RXPCU_XRSTMP_TX_STOMP_DATA_MSB
#define MAC_PCU_XRSTMP_TX_STOMP_DATA_LSB 		 RXPCU_XRSTMP_TX_STOMP_DATA_LSB
#define MAC_PCU_XRSTMP_TX_STOMP_DATA_MASK 		 RXPCU_XRSTMP_TX_STOMP_DATA_MASK
#define MAC_PCU_XRSTMP_TX_STOMP_DATA_GET(x) 		 RXPCU_XRSTMP_TX_STOMP_DATA_GET(x)
#define MAC_PCU_XRSTMP_TX_STOMP_DATA_SET(x) 		 RXPCU_XRSTMP_TX_STOMP_DATA_SET(x)
#define MAC_PCU_XRSTMP_TX_STOMP_DATA_RESET 		 RXPCU_XRSTMP_TX_STOMP_DATA_RESET
#define MAC_PCU_XRSTMP_TX_STOMP_BSSID_MSB 		 RXPCU_XRSTMP_TX_STOMP_BSSID_MSB
#define MAC_PCU_XRSTMP_TX_STOMP_BSSID_LSB 		 RXPCU_XRSTMP_TX_STOMP_BSSID_LSB
#define MAC_PCU_XRSTMP_TX_STOMP_BSSID_MASK 		 RXPCU_XRSTMP_TX_STOMP_BSSID_MASK
#define MAC_PCU_XRSTMP_TX_STOMP_BSSID_GET(x) 		 RXPCU_XRSTMP_TX_STOMP_BSSID_GET(x)
#define MAC_PCU_XRSTMP_TX_STOMP_BSSID_SET(x) 		 RXPCU_XRSTMP_TX_STOMP_BSSID_SET(x)
#define MAC_PCU_XRSTMP_TX_STOMP_BSSID_RESET 		 RXPCU_XRSTMP_TX_STOMP_BSSID_RESET
#define MAC_PCU_XRSTMP_TX_STOMP_RSSI_MSB 		 RXPCU_XRSTMP_TX_STOMP_RSSI_MSB
#define MAC_PCU_XRSTMP_TX_STOMP_RSSI_LSB 		 RXPCU_XRSTMP_TX_STOMP_RSSI_LSB
#define MAC_PCU_XRSTMP_TX_STOMP_RSSI_MASK 		 RXPCU_XRSTMP_TX_STOMP_RSSI_MASK
#define MAC_PCU_XRSTMP_TX_STOMP_RSSI_GET(x) 		 RXPCU_XRSTMP_TX_STOMP_RSSI_GET(x)
#define MAC_PCU_XRSTMP_TX_STOMP_RSSI_SET(x) 		 RXPCU_XRSTMP_TX_STOMP_RSSI_SET(x)
#define MAC_PCU_XRSTMP_TX_STOMP_RSSI_RESET 		 RXPCU_XRSTMP_TX_STOMP_RSSI_RESET
#define MAC_PCU_XRSTMP_RX_ABORT_BSSID_MSB 		 RXPCU_XRSTMP_RX_ABORT_BSSID_MSB
#define MAC_PCU_XRSTMP_RX_ABORT_BSSID_LSB 		 RXPCU_XRSTMP_RX_ABORT_BSSID_LSB
#define MAC_PCU_XRSTMP_RX_ABORT_BSSID_MASK 		 RXPCU_XRSTMP_RX_ABORT_BSSID_MASK
#define MAC_PCU_XRSTMP_RX_ABORT_BSSID_GET(x) 		 RXPCU_XRSTMP_RX_ABORT_BSSID_GET(x)
#define MAC_PCU_XRSTMP_RX_ABORT_BSSID_SET(x) 		 RXPCU_XRSTMP_RX_ABORT_BSSID_SET(x)
#define MAC_PCU_XRSTMP_RX_ABORT_BSSID_RESET 		 RXPCU_XRSTMP_RX_ABORT_BSSID_RESET
#define MAC_PCU_XRSTMP_RX_ABORT_RSSI_MSB 		 RXPCU_XRSTMP_RX_ABORT_RSSI_MSB
#define MAC_PCU_XRSTMP_RX_ABORT_RSSI_LSB 		 RXPCU_XRSTMP_RX_ABORT_RSSI_LSB
#define MAC_PCU_XRSTMP_RX_ABORT_RSSI_MASK 		 RXPCU_XRSTMP_RX_ABORT_RSSI_MASK
#define MAC_PCU_XRSTMP_RX_ABORT_RSSI_GET(x) 		 RXPCU_XRSTMP_RX_ABORT_RSSI_GET(x)
#define MAC_PCU_XRSTMP_RX_ABORT_RSSI_SET(x) 		 RXPCU_XRSTMP_RX_ABORT_RSSI_SET(x)
#define MAC_PCU_XRSTMP_RX_ABORT_RSSI_RESET 		 RXPCU_XRSTMP_RX_ABORT_RSSI_RESET
#define MAC_PCU_XRSTMP_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_XRSTMP_ADDRESS
// SW modifiable bits
#define MAC_PCU_XRSTMP_SW_MASK 		 RXPCU_XRSTMP_SW_MASK
// bits defined at reset
#define MAC_PCU_XRSTMP_RSTMASK 		 RXPCU_XRSTMP_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_XRSTMP_RESET 		 RXPCU_XRSTMP_RESET

// 32'h80e0 (MAC_PCU_ADDR1_MASK_L32)
#define MAC_PCU_ADDR1_MASK_L32_VALUE_MSB 		 RXPCU_ADDR1_MASK_L32_VALUE_MSB
#define MAC_PCU_ADDR1_MASK_L32_VALUE_LSB 		 RXPCU_ADDR1_MASK_L32_VALUE_LSB
#define MAC_PCU_ADDR1_MASK_L32_VALUE_MASK 		 RXPCU_ADDR1_MASK_L32_VALUE_MASK
#define MAC_PCU_ADDR1_MASK_L32_VALUE_GET(x) 		 RXPCU_ADDR1_MASK_L32_VALUE_GET(x)
#define MAC_PCU_ADDR1_MASK_L32_VALUE_SET(x) 		 RXPCU_ADDR1_MASK_L32_VALUE_SET(x)
#define MAC_PCU_ADDR1_MASK_L32_VALUE_RESET 		 RXPCU_ADDR1_MASK_L32_VALUE_RESET
#define MAC_PCU_ADDR1_MASK_L32_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_ADDR1_MASK_L32_ADDRESS
// SW modifiable bits
#define MAC_PCU_ADDR1_MASK_L32_SW_MASK 		 RXPCU_ADDR1_MASK_L32_SW_MASK
// bits defined at reset
#define MAC_PCU_ADDR1_MASK_L32_RSTMASK 		 RXPCU_ADDR1_MASK_L32_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_ADDR1_MASK_L32_RESET 		 RXPCU_ADDR1_MASK_L32_RESET

// 32'h80e4 (MAC_PCU_ADDR1_MASK_U16)
#define MAC_PCU_ADDR1_MASK_U16_VALUE_MSB 		 RXPCU_ADDR1_MASK_U16_VALUE_MSB
#define MAC_PCU_ADDR1_MASK_U16_VALUE_LSB 		 RXPCU_ADDR1_MASK_U16_VALUE_LSB
#define MAC_PCU_ADDR1_MASK_U16_VALUE_MASK 		 RXPCU_ADDR1_MASK_U16_VALUE_MASK
#define MAC_PCU_ADDR1_MASK_U16_VALUE_GET(x) 		 RXPCU_ADDR1_MASK_U16_VALUE_GET(x)
#define MAC_PCU_ADDR1_MASK_U16_VALUE_SET(x) 		 RXPCU_ADDR1_MASK_U16_VALUE_SET(x)
#define MAC_PCU_ADDR1_MASK_U16_VALUE_RESET 		 RXPCU_ADDR1_MASK_U16_VALUE_RESET
#define MAC_PCU_ADDR1_MASK_U16_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_ADDR1_MASK_U16_ADDRESS
// SW modifiable bits
#define MAC_PCU_ADDR1_MASK_U16_SW_MASK 		 RXPCU_ADDR1_MASK_U16_SW_MASK
// bits defined at reset
#define MAC_PCU_ADDR1_MASK_U16_RSTMASK 		 RXPCU_ADDR1_MASK_U16_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_ADDR1_MASK_U16_RESET 		 RXPCU_ADDR1_MASK_U16_RESET

// 32'h80fc (MAC_PCU_QUIET_TIME_1)
#define MAC_PCU_QUIET_TIME_1_ACK_CTS_ENABLE_MSB 		 PTA_COEX_QUIET_TIME_1_ACK_CTS_ENABLE_MSB
#define MAC_PCU_QUIET_TIME_1_ACK_CTS_ENABLE_LSB 		 PTA_COEX_QUIET_TIME_1_ACK_CTS_ENABLE_LSB
#define MAC_PCU_QUIET_TIME_1_ACK_CTS_ENABLE_MASK 		 PTA_COEX_QUIET_TIME_1_ACK_CTS_ENABLE_MASK
#define MAC_PCU_QUIET_TIME_1_ACK_CTS_ENABLE_GET(x) 		 PTA_COEX_QUIET_TIME_1_ACK_CTS_ENABLE_GET(x)
#define MAC_PCU_QUIET_TIME_1_ACK_CTS_ENABLE_SET(x) 		 PTA_COEX_QUIET_TIME_1_ACK_CTS_ENABLE_SET(x)
#define MAC_PCU_QUIET_TIME_1_ACK_CTS_ENABLE_RESET 		 PTA_COEX_QUIET_TIME_1_ACK_CTS_ENABLE_RESET
#define MAC_PCU_QUIET_TIME_1_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_QUIET_TIME_1_ADDRESS
// SW modifiable bits
#define MAC_PCU_QUIET_TIME_1_SW_MASK 		 PTA_COEX_QUIET_TIME_1_SW_MASK
// bits defined at reset
#define MAC_PCU_QUIET_TIME_1_RSTMASK 		 PTA_COEX_QUIET_TIME_1_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_QUIET_TIME_1_RESET 		 PTA_COEX_QUIET_TIME_1_RESET

// 32'h8100 (MAC_PCU_QUIET_TIME_2)
#define MAC_PCU_QUIET_TIME_2_DURATION_MSB 		 WIFI_TIMERS_QUIET_TIME_2_DURATION_MSB
#define MAC_PCU_QUIET_TIME_2_DURATION_LSB 		 WIFI_TIMERS_QUIET_TIME_2_DURATION_LSB
#define MAC_PCU_QUIET_TIME_2_DURATION_MASK 		 WIFI_TIMERS_QUIET_TIME_2_DURATION_MASK
#define MAC_PCU_QUIET_TIME_2_DURATION_GET(x) 		 WIFI_TIMERS_QUIET_TIME_2_DURATION_GET(x)
#define MAC_PCU_QUIET_TIME_2_DURATION_SET(x) 		 WIFI_TIMERS_QUIET_TIME_2_DURATION_SET(x)
#define MAC_PCU_QUIET_TIME_2_DURATION_RESET 		 WIFI_TIMERS_QUIET_TIME_2_DURATION_RESET
#define MAC_PCU_QUIET_TIME_2_DURATION2_MSB 		 WIFI_TIMERS_QUIET_TIME_2_DURATION2_MSB
#define MAC_PCU_QUIET_TIME_2_DURATION2_LSB 		 WIFI_TIMERS_QUIET_TIME_2_DURATION2_LSB
#define MAC_PCU_QUIET_TIME_2_DURATION2_MASK 		 WIFI_TIMERS_QUIET_TIME_2_DURATION2_MASK
#define MAC_PCU_QUIET_TIME_2_DURATION2_GET(x) 		 WIFI_TIMERS_QUIET_TIME_2_DURATION2_GET(x)
#define MAC_PCU_QUIET_TIME_2_DURATION2_SET(x) 		 WIFI_TIMERS_QUIET_TIME_2_DURATION2_SET(x)
#define MAC_PCU_QUIET_TIME_2_DURATION2_RESET 		 WIFI_TIMERS_QUIET_TIME_2_DURATION2_RESET
#define MAC_PCU_QUIET_TIME_2_ADDRESS 		 WIFI_TIMERS_BASE_ADDRESS+WIFI_TIMERS_QUIET_TIME_2_ADDRESS
// SW modifiable bits
#define MAC_PCU_QUIET_TIME_2_SW_MASK 		 WIFI_TIMERS_QUIET_TIME_2_SW_MASK
// bits defined at reset
#define MAC_PCU_QUIET_TIME_2_RSTMASK 		 WIFI_TIMERS_QUIET_TIME_2_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_QUIET_TIME_2_RESET 		 WIFI_TIMERS_QUIET_TIME_2_RESET

// 32'h810c (MAC_PCU_PHY_ERROR_MASK)
#define MAC_PCU_PHY_ERROR_MASK_VALUE_MSB 		 RXPCU_PHY_ERROR_MASK_VALUE_MSB
#define MAC_PCU_PHY_ERROR_MASK_VALUE_LSB 		 RXPCU_PHY_ERROR_MASK_VALUE_LSB
#define MAC_PCU_PHY_ERROR_MASK_VALUE_MASK 		 RXPCU_PHY_ERROR_MASK_VALUE_MASK
#define MAC_PCU_PHY_ERROR_MASK_VALUE_GET(x) 		 RXPCU_PHY_ERROR_MASK_VALUE_GET(x)
#define MAC_PCU_PHY_ERROR_MASK_VALUE_SET(x) 		 RXPCU_PHY_ERROR_MASK_VALUE_SET(x)
#define MAC_PCU_PHY_ERROR_MASK_VALUE_RESET 		 RXPCU_PHY_ERROR_MASK_VALUE_RESET
#define MAC_PCU_PHY_ERROR_MASK_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_PHY_ERROR_MASK_ADDRESS
// SW modifiable bits
#define MAC_PCU_PHY_ERROR_MASK_SW_MASK 		 RXPCU_PHY_ERROR_MASK_SW_MASK
// bits defined at reset
#define MAC_PCU_PHY_ERROR_MASK_RSTMASK 		 RXPCU_PHY_ERROR_MASK_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_PHY_ERROR_MASK_RESET 		 RXPCU_PHY_ERROR_MASK_RESET

// 32'h8118 (MAC_PCU_MIC_QOS_CONTROL)
#define MAC_PCU_MIC_QOS_CONTROL_ENABLE_MSB 		 MIC_QOS_CONTROL_ENABLE_MSB
#define MAC_PCU_MIC_QOS_CONTROL_ENABLE_LSB 		 MIC_QOS_CONTROL_ENABLE_LSB
#define MAC_PCU_MIC_QOS_CONTROL_ENABLE_MASK 		 MIC_QOS_CONTROL_ENABLE_MASK
#define MAC_PCU_MIC_QOS_CONTROL_ENABLE_GET(x) 		 MIC_QOS_CONTROL_ENABLE_GET(x)
#define MAC_PCU_MIC_QOS_CONTROL_ENABLE_SET(x) 		 MIC_QOS_CONTROL_ENABLE_SET(x)
#define MAC_PCU_MIC_QOS_CONTROL_ENABLE_RESET 		 MIC_QOS_CONTROL_ENABLE_RESET
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_7_MSB 		 MIC_QOS_CONTROL_VALUE_7_MSB
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_7_LSB 		 MIC_QOS_CONTROL_VALUE_7_LSB
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_7_MASK 		 MIC_QOS_CONTROL_VALUE_7_MASK
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_7_GET(x) 		 MIC_QOS_CONTROL_VALUE_7_GET(x)
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_7_SET(x) 		 MIC_QOS_CONTROL_VALUE_7_SET(x)
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_7_RESET 		 MIC_QOS_CONTROL_VALUE_7_RESET
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_6_MSB 		 MIC_QOS_CONTROL_VALUE_6_MSB
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_6_LSB 		 MIC_QOS_CONTROL_VALUE_6_LSB
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_6_MASK 		 MIC_QOS_CONTROL_VALUE_6_MASK
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_6_GET(x) 		 MIC_QOS_CONTROL_VALUE_6_GET(x)
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_6_SET(x) 		 MIC_QOS_CONTROL_VALUE_6_SET(x)
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_6_RESET 		 MIC_QOS_CONTROL_VALUE_6_RESET
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_5_MSB 		 MIC_QOS_CONTROL_VALUE_5_MSB
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_5_LSB 		 MIC_QOS_CONTROL_VALUE_5_LSB
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_5_MASK 		 MIC_QOS_CONTROL_VALUE_5_MASK
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_5_GET(x) 		 MIC_QOS_CONTROL_VALUE_5_GET(x)
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_5_SET(x) 		 MIC_QOS_CONTROL_VALUE_5_SET(x)
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_5_RESET 		 MIC_QOS_CONTROL_VALUE_5_RESET
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_4_MSB 		 MIC_QOS_CONTROL_VALUE_4_MSB
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_4_LSB 		 MIC_QOS_CONTROL_VALUE_4_LSB
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_4_MASK 		 MIC_QOS_CONTROL_VALUE_4_MASK
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_4_GET(x) 		 MIC_QOS_CONTROL_VALUE_4_GET(x)
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_4_SET(x) 		 MIC_QOS_CONTROL_VALUE_4_SET(x)
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_4_RESET 		 MIC_QOS_CONTROL_VALUE_4_RESET
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_3_MSB 		 MIC_QOS_CONTROL_VALUE_3_MSB
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_3_LSB 		 MIC_QOS_CONTROL_VALUE_3_LSB
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_3_MASK 		 MIC_QOS_CONTROL_VALUE_3_MASK
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_3_GET(x) 		 MIC_QOS_CONTROL_VALUE_3_GET(x)
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_3_SET(x) 		 MIC_QOS_CONTROL_VALUE_3_SET(x)
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_3_RESET 		 MIC_QOS_CONTROL_VALUE_3_RESET
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_2_MSB 		 MIC_QOS_CONTROL_VALUE_2_MSB
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_2_LSB 		 MIC_QOS_CONTROL_VALUE_2_LSB
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_2_MASK 		 MIC_QOS_CONTROL_VALUE_2_MASK
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_2_GET(x) 		 MIC_QOS_CONTROL_VALUE_2_GET(x)
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_2_SET(x) 		 MIC_QOS_CONTROL_VALUE_2_SET(x)
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_2_RESET 		 MIC_QOS_CONTROL_VALUE_2_RESET
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_1_MSB 		 MIC_QOS_CONTROL_VALUE_1_MSB
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_1_LSB 		 MIC_QOS_CONTROL_VALUE_1_LSB
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_1_MASK 		 MIC_QOS_CONTROL_VALUE_1_MASK
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_1_GET(x) 		 MIC_QOS_CONTROL_VALUE_1_GET(x)
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_1_SET(x) 		 MIC_QOS_CONTROL_VALUE_1_SET(x)
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_1_RESET 		 MIC_QOS_CONTROL_VALUE_1_RESET
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_0_MSB 		 MIC_QOS_CONTROL_VALUE_0_MSB
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_0_LSB 		 MIC_QOS_CONTROL_VALUE_0_LSB
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_0_MASK 		 MIC_QOS_CONTROL_VALUE_0_MASK
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_0_GET(x) 		 MIC_QOS_CONTROL_VALUE_0_GET(x)
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_0_SET(x) 		 MIC_QOS_CONTROL_VALUE_0_SET(x)
#define MAC_PCU_MIC_QOS_CONTROL_VALUE_0_RESET 		 MIC_QOS_CONTROL_VALUE_0_RESET
#define MAC_PCU_MIC_QOS_CONTROL_ADDRESS 		 MAC_CRYPTO_BASE_ADDRESS+MIC_QOS_CONTROL_ADDRESS
// SW modifiable bits
#define MAC_PCU_MIC_QOS_CONTROL_SW_MASK 		 MIC_QOS_CONTROL_SW_MASK
// bits defined at reset
#define MAC_PCU_MIC_QOS_CONTROL_RSTMASK 		 MIC_QOS_CONTROL_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_MIC_QOS_CONTROL_RESET 		 MIC_QOS_CONTROL_RESET

// 32'h811c (MAC_PCU_MIC_QOS_SELECT)
#define MAC_PCU_MIC_QOS_SELECT_VALUE_7_MSB 		 MIC_QOS_SELECT_VALUE_7_MSB
#define MAC_PCU_MIC_QOS_SELECT_VALUE_7_LSB 		 MIC_QOS_SELECT_VALUE_7_LSB
#define MAC_PCU_MIC_QOS_SELECT_VALUE_7_MASK 		 MIC_QOS_SELECT_VALUE_7_MASK
#define MAC_PCU_MIC_QOS_SELECT_VALUE_7_GET(x) 		 MIC_QOS_SELECT_VALUE_7_GET(x)
#define MAC_PCU_MIC_QOS_SELECT_VALUE_7_SET(x) 		 MIC_QOS_SELECT_VALUE_7_SET(x)
#define MAC_PCU_MIC_QOS_SELECT_VALUE_7_RESET 		 MIC_QOS_SELECT_VALUE_7_RESET
#define MAC_PCU_MIC_QOS_SELECT_VALUE_6_MSB 		 MIC_QOS_SELECT_VALUE_6_MSB
#define MAC_PCU_MIC_QOS_SELECT_VALUE_6_LSB 		 MIC_QOS_SELECT_VALUE_6_LSB
#define MAC_PCU_MIC_QOS_SELECT_VALUE_6_MASK 		 MIC_QOS_SELECT_VALUE_6_MASK
#define MAC_PCU_MIC_QOS_SELECT_VALUE_6_GET(x) 		 MIC_QOS_SELECT_VALUE_6_GET(x)
#define MAC_PCU_MIC_QOS_SELECT_VALUE_6_SET(x) 		 MIC_QOS_SELECT_VALUE_6_SET(x)
#define MAC_PCU_MIC_QOS_SELECT_VALUE_6_RESET 		 MIC_QOS_SELECT_VALUE_6_RESET
#define MAC_PCU_MIC_QOS_SELECT_VALUE_5_MSB 		 MIC_QOS_SELECT_VALUE_5_MSB
#define MAC_PCU_MIC_QOS_SELECT_VALUE_5_LSB 		 MIC_QOS_SELECT_VALUE_5_LSB
#define MAC_PCU_MIC_QOS_SELECT_VALUE_5_MASK 		 MIC_QOS_SELECT_VALUE_5_MASK
#define MAC_PCU_MIC_QOS_SELECT_VALUE_5_GET(x) 		 MIC_QOS_SELECT_VALUE_5_GET(x)
#define MAC_PCU_MIC_QOS_SELECT_VALUE_5_SET(x) 		 MIC_QOS_SELECT_VALUE_5_SET(x)
#define MAC_PCU_MIC_QOS_SELECT_VALUE_5_RESET 		 MIC_QOS_SELECT_VALUE_5_RESET
#define MAC_PCU_MIC_QOS_SELECT_VALUE_4_MSB 		 MIC_QOS_SELECT_VALUE_4_MSB
#define MAC_PCU_MIC_QOS_SELECT_VALUE_4_LSB 		 MIC_QOS_SELECT_VALUE_4_LSB
#define MAC_PCU_MIC_QOS_SELECT_VALUE_4_MASK 		 MIC_QOS_SELECT_VALUE_4_MASK
#define MAC_PCU_MIC_QOS_SELECT_VALUE_4_GET(x) 		 MIC_QOS_SELECT_VALUE_4_GET(x)
#define MAC_PCU_MIC_QOS_SELECT_VALUE_4_SET(x) 		 MIC_QOS_SELECT_VALUE_4_SET(x)
#define MAC_PCU_MIC_QOS_SELECT_VALUE_4_RESET 		 MIC_QOS_SELECT_VALUE_4_RESET
#define MAC_PCU_MIC_QOS_SELECT_VALUE_3_MSB 		 MIC_QOS_SELECT_VALUE_3_MSB
#define MAC_PCU_MIC_QOS_SELECT_VALUE_3_LSB 		 MIC_QOS_SELECT_VALUE_3_LSB
#define MAC_PCU_MIC_QOS_SELECT_VALUE_3_MASK 		 MIC_QOS_SELECT_VALUE_3_MASK
#define MAC_PCU_MIC_QOS_SELECT_VALUE_3_GET(x) 		 MIC_QOS_SELECT_VALUE_3_GET(x)
#define MAC_PCU_MIC_QOS_SELECT_VALUE_3_SET(x) 		 MIC_QOS_SELECT_VALUE_3_SET(x)
#define MAC_PCU_MIC_QOS_SELECT_VALUE_3_RESET 		 MIC_QOS_SELECT_VALUE_3_RESET
#define MAC_PCU_MIC_QOS_SELECT_VALUE_2_MSB 		 MIC_QOS_SELECT_VALUE_2_MSB
#define MAC_PCU_MIC_QOS_SELECT_VALUE_2_LSB 		 MIC_QOS_SELECT_VALUE_2_LSB
#define MAC_PCU_MIC_QOS_SELECT_VALUE_2_MASK 		 MIC_QOS_SELECT_VALUE_2_MASK
#define MAC_PCU_MIC_QOS_SELECT_VALUE_2_GET(x) 		 MIC_QOS_SELECT_VALUE_2_GET(x)
#define MAC_PCU_MIC_QOS_SELECT_VALUE_2_SET(x) 		 MIC_QOS_SELECT_VALUE_2_SET(x)
#define MAC_PCU_MIC_QOS_SELECT_VALUE_2_RESET 		 MIC_QOS_SELECT_VALUE_2_RESET
#define MAC_PCU_MIC_QOS_SELECT_VALUE_1_MSB 		 MIC_QOS_SELECT_VALUE_1_MSB
#define MAC_PCU_MIC_QOS_SELECT_VALUE_1_LSB 		 MIC_QOS_SELECT_VALUE_1_LSB
#define MAC_PCU_MIC_QOS_SELECT_VALUE_1_MASK 		 MIC_QOS_SELECT_VALUE_1_MASK
#define MAC_PCU_MIC_QOS_SELECT_VALUE_1_GET(x) 		 MIC_QOS_SELECT_VALUE_1_GET(x)
#define MAC_PCU_MIC_QOS_SELECT_VALUE_1_SET(x) 		 MIC_QOS_SELECT_VALUE_1_SET(x)
#define MAC_PCU_MIC_QOS_SELECT_VALUE_1_RESET 		 MIC_QOS_SELECT_VALUE_1_RESET
#define MAC_PCU_MIC_QOS_SELECT_VALUE_0_MSB 		 MIC_QOS_SELECT_VALUE_0_MSB
#define MAC_PCU_MIC_QOS_SELECT_VALUE_0_LSB 		 MIC_QOS_SELECT_VALUE_0_LSB
#define MAC_PCU_MIC_QOS_SELECT_VALUE_0_MASK 		 MIC_QOS_SELECT_VALUE_0_MASK
#define MAC_PCU_MIC_QOS_SELECT_VALUE_0_GET(x) 		 MIC_QOS_SELECT_VALUE_0_GET(x)
#define MAC_PCU_MIC_QOS_SELECT_VALUE_0_SET(x) 		 MIC_QOS_SELECT_VALUE_0_SET(x)
#define MAC_PCU_MIC_QOS_SELECT_VALUE_0_RESET 		 MIC_QOS_SELECT_VALUE_0_RESET
#define MAC_PCU_MIC_QOS_SELECT_ADDRESS 		 MAC_CRYPTO_BASE_ADDRESS+MIC_QOS_SELECT_ADDRESS
// SW modifiable bits
#define MAC_PCU_MIC_QOS_SELECT_SW_MASK 		 MIC_QOS_SELECT_SW_MASK
// bits defined at reset
#define MAC_PCU_MIC_QOS_SELECT_RSTMASK 		 MIC_QOS_SELECT_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_MIC_QOS_SELECT_RESET 		 MIC_QOS_SELECT_RESET

// 32'h8120 (MAC_PCU_MISC_MODE)
#define MAC_PCU_MISC_MODE_DEBUG_MODE_MSB 		 RXPCU_MISC_MODE_DEBUG_MODE_MSB
#define MAC_PCU_MISC_MODE_DEBUG_MODE_LSB 		 RXPCU_MISC_MODE_DEBUG_MODE_LSB
#define MAC_PCU_MISC_MODE_DEBUG_MODE_MASK 		 RXPCU_MISC_MODE_DEBUG_MODE_MASK
#define MAC_PCU_MISC_MODE_DEBUG_MODE_GET(x) 		 RXPCU_MISC_MODE_DEBUG_MODE_GET(x)
#define MAC_PCU_MISC_MODE_DEBUG_MODE_SET(x) 		 RXPCU_MISC_MODE_DEBUG_MODE_SET(x)
#define MAC_PCU_MISC_MODE_DEBUG_MODE_RESET 		 RXPCU_MISC_MODE_DEBUG_MODE_RESET
#define MAC_PCU_MISC_MODE_USE_EOP_PTR_FOR_DMA_WR_MSB 		 RXPCU_MISC_MODE_USE_EOP_PTR_FOR_DMA_WR_MSB
#define MAC_PCU_MISC_MODE_USE_EOP_PTR_FOR_DMA_WR_LSB 		 RXPCU_MISC_MODE_USE_EOP_PTR_FOR_DMA_WR_LSB
#define MAC_PCU_MISC_MODE_USE_EOP_PTR_FOR_DMA_WR_MASK 		 RXPCU_MISC_MODE_USE_EOP_PTR_FOR_DMA_WR_MASK
#define MAC_PCU_MISC_MODE_USE_EOP_PTR_FOR_DMA_WR_GET(x) 		 RXPCU_MISC_MODE_USE_EOP_PTR_FOR_DMA_WR_GET(x)
#define MAC_PCU_MISC_MODE_USE_EOP_PTR_FOR_DMA_WR_SET(x) 		 RXPCU_MISC_MODE_USE_EOP_PTR_FOR_DMA_WR_SET(x)
#define MAC_PCU_MISC_MODE_USE_EOP_PTR_FOR_DMA_WR_RESET 		 RXPCU_MISC_MODE_USE_EOP_PTR_FOR_DMA_WR_RESET
#define MAC_PCU_MISC_MODE_ALWAYS_PERFORM_KEY_SEARCH_MSB 		 RXPCU_MISC_MODE_ALWAYS_PERFORM_KEY_SEARCH_MSB
#define MAC_PCU_MISC_MODE_ALWAYS_PERFORM_KEY_SEARCH_LSB 		 RXPCU_MISC_MODE_ALWAYS_PERFORM_KEY_SEARCH_LSB
#define MAC_PCU_MISC_MODE_ALWAYS_PERFORM_KEY_SEARCH_MASK 		 RXPCU_MISC_MODE_ALWAYS_PERFORM_KEY_SEARCH_MASK
#define MAC_PCU_MISC_MODE_ALWAYS_PERFORM_KEY_SEARCH_GET(x) 		 RXPCU_MISC_MODE_ALWAYS_PERFORM_KEY_SEARCH_GET(x)
#define MAC_PCU_MISC_MODE_ALWAYS_PERFORM_KEY_SEARCH_SET(x) 		 RXPCU_MISC_MODE_ALWAYS_PERFORM_KEY_SEARCH_SET(x)
#define MAC_PCU_MISC_MODE_ALWAYS_PERFORM_KEY_SEARCH_RESET 		 RXPCU_MISC_MODE_ALWAYS_PERFORM_KEY_SEARCH_RESET
#define MAC_PCU_MISC_MODE_SEL_EVM_MSB 		 RXPCU_MISC_MODE_SEL_EVM_MSB
#define MAC_PCU_MISC_MODE_SEL_EVM_LSB 		 RXPCU_MISC_MODE_SEL_EVM_LSB
#define MAC_PCU_MISC_MODE_SEL_EVM_MASK 		 RXPCU_MISC_MODE_SEL_EVM_MASK
#define MAC_PCU_MISC_MODE_SEL_EVM_GET(x) 		 RXPCU_MISC_MODE_SEL_EVM_GET(x)
#define MAC_PCU_MISC_MODE_SEL_EVM_SET(x) 		 RXPCU_MISC_MODE_SEL_EVM_SET(x)
#define MAC_PCU_MISC_MODE_SEL_EVM_RESET 		 RXPCU_MISC_MODE_SEL_EVM_RESET
#define MAC_PCU_MISC_MODE_CLEAR_BA_VALID_MSB 		 RXPCU_MISC_MODE_CLEAR_BA_VALID_MSB
#define MAC_PCU_MISC_MODE_CLEAR_BA_VALID_LSB 		 RXPCU_MISC_MODE_CLEAR_BA_VALID_LSB
#define MAC_PCU_MISC_MODE_CLEAR_BA_VALID_MASK 		 RXPCU_MISC_MODE_CLEAR_BA_VALID_MASK
#define MAC_PCU_MISC_MODE_CLEAR_BA_VALID_GET(x) 		 RXPCU_MISC_MODE_CLEAR_BA_VALID_GET(x)
#define MAC_PCU_MISC_MODE_CLEAR_BA_VALID_SET(x) 		 RXPCU_MISC_MODE_CLEAR_BA_VALID_SET(x)
#define MAC_PCU_MISC_MODE_CLEAR_BA_VALID_RESET 		 RXPCU_MISC_MODE_CLEAR_BA_VALID_RESET
#define MAC_PCU_MISC_MODE_CLEAR_FIRST_HCF_MSB 		 RXPCU_MISC_MODE_CLEAR_FIRST_HCF_MSB
#define MAC_PCU_MISC_MODE_CLEAR_FIRST_HCF_LSB 		 RXPCU_MISC_MODE_CLEAR_FIRST_HCF_LSB
#define MAC_PCU_MISC_MODE_CLEAR_FIRST_HCF_MASK 		 RXPCU_MISC_MODE_CLEAR_FIRST_HCF_MASK
#define MAC_PCU_MISC_MODE_CLEAR_FIRST_HCF_GET(x) 		 RXPCU_MISC_MODE_CLEAR_FIRST_HCF_GET(x)
#define MAC_PCU_MISC_MODE_CLEAR_FIRST_HCF_SET(x) 		 RXPCU_MISC_MODE_CLEAR_FIRST_HCF_SET(x)
#define MAC_PCU_MISC_MODE_CLEAR_FIRST_HCF_RESET 		 RXPCU_MISC_MODE_CLEAR_FIRST_HCF_RESET
#define MAC_PCU_MISC_MODE_CLEAR_VMF_MSB 		 RXPCU_MISC_MODE_CLEAR_VMF_MSB
#define MAC_PCU_MISC_MODE_CLEAR_VMF_LSB 		 RXPCU_MISC_MODE_CLEAR_VMF_LSB
#define MAC_PCU_MISC_MODE_CLEAR_VMF_MASK 		 RXPCU_MISC_MODE_CLEAR_VMF_MASK
#define MAC_PCU_MISC_MODE_CLEAR_VMF_GET(x) 		 RXPCU_MISC_MODE_CLEAR_VMF_GET(x)
#define MAC_PCU_MISC_MODE_CLEAR_VMF_SET(x) 		 RXPCU_MISC_MODE_CLEAR_VMF_SET(x)
#define MAC_PCU_MISC_MODE_CLEAR_VMF_RESET 		 RXPCU_MISC_MODE_CLEAR_VMF_RESET
#define MAC_PCU_MISC_MODE_RX_HCF_POLL_ENABLE_MSB 		 RXPCU_MISC_MODE_RX_HCF_POLL_ENABLE_MSB
#define MAC_PCU_MISC_MODE_RX_HCF_POLL_ENABLE_LSB 		 RXPCU_MISC_MODE_RX_HCF_POLL_ENABLE_LSB
#define MAC_PCU_MISC_MODE_RX_HCF_POLL_ENABLE_MASK 		 RXPCU_MISC_MODE_RX_HCF_POLL_ENABLE_MASK
#define MAC_PCU_MISC_MODE_RX_HCF_POLL_ENABLE_GET(x) 		 RXPCU_MISC_MODE_RX_HCF_POLL_ENABLE_GET(x)
#define MAC_PCU_MISC_MODE_RX_HCF_POLL_ENABLE_SET(x) 		 RXPCU_MISC_MODE_RX_HCF_POLL_ENABLE_SET(x)
#define MAC_PCU_MISC_MODE_RX_HCF_POLL_ENABLE_RESET 		 RXPCU_MISC_MODE_RX_HCF_POLL_ENABLE_RESET
#define MAC_PCU_MISC_MODE_HCF_POLL_CANCELS_NAV_MSB 		 RXPCU_MISC_MODE_HCF_POLL_CANCELS_NAV_MSB
#define MAC_PCU_MISC_MODE_HCF_POLL_CANCELS_NAV_LSB 		 RXPCU_MISC_MODE_HCF_POLL_CANCELS_NAV_LSB
#define MAC_PCU_MISC_MODE_HCF_POLL_CANCELS_NAV_MASK 		 RXPCU_MISC_MODE_HCF_POLL_CANCELS_NAV_MASK
#define MAC_PCU_MISC_MODE_HCF_POLL_CANCELS_NAV_GET(x) 		 RXPCU_MISC_MODE_HCF_POLL_CANCELS_NAV_GET(x)
#define MAC_PCU_MISC_MODE_HCF_POLL_CANCELS_NAV_SET(x) 		 RXPCU_MISC_MODE_HCF_POLL_CANCELS_NAV_SET(x)
#define MAC_PCU_MISC_MODE_HCF_POLL_CANCELS_NAV_RESET 		 RXPCU_MISC_MODE_HCF_POLL_CANCELS_NAV_RESET
#define MAC_PCU_MISC_MODE_TBTT_PROTECT_MSB 		 RXPCU_MISC_MODE_TBTT_PROTECT_MSB
#define MAC_PCU_MISC_MODE_TBTT_PROTECT_LSB 		 RXPCU_MISC_MODE_TBTT_PROTECT_LSB
#define MAC_PCU_MISC_MODE_TBTT_PROTECT_MASK 		 RXPCU_MISC_MODE_TBTT_PROTECT_MASK
#define MAC_PCU_MISC_MODE_TBTT_PROTECT_GET(x) 		 RXPCU_MISC_MODE_TBTT_PROTECT_GET(x)
#define MAC_PCU_MISC_MODE_TBTT_PROTECT_SET(x) 		 RXPCU_MISC_MODE_TBTT_PROTECT_SET(x)
#define MAC_PCU_MISC_MODE_TBTT_PROTECT_RESET 		 RXPCU_MISC_MODE_TBTT_PROTECT_RESET
#define MAC_PCU_MISC_MODE_BT_ANT_PREVENTS_RX_MSB 		 RXPCU_MISC_MODE_BT_ANT_PREVENTS_RX_MSB
#define MAC_PCU_MISC_MODE_BT_ANT_PREVENTS_RX_LSB 		 RXPCU_MISC_MODE_BT_ANT_PREVENTS_RX_LSB
#define MAC_PCU_MISC_MODE_BT_ANT_PREVENTS_RX_MASK 		 RXPCU_MISC_MODE_BT_ANT_PREVENTS_RX_MASK
#define MAC_PCU_MISC_MODE_BT_ANT_PREVENTS_RX_GET(x) 		 RXPCU_MISC_MODE_BT_ANT_PREVENTS_RX_GET(x)
#define MAC_PCU_MISC_MODE_BT_ANT_PREVENTS_RX_SET(x) 		 RXPCU_MISC_MODE_BT_ANT_PREVENTS_RX_SET(x)
#define MAC_PCU_MISC_MODE_BT_ANT_PREVENTS_RX_RESET 		 RXPCU_MISC_MODE_BT_ANT_PREVENTS_RX_RESET
#define MAC_PCU_MISC_MODE_FORCE_QUIET_COLLISION_MSB 		 RXPCU_MISC_MODE_FORCE_QUIET_COLLISION_MSB
#define MAC_PCU_MISC_MODE_FORCE_QUIET_COLLISION_LSB 		 RXPCU_MISC_MODE_FORCE_QUIET_COLLISION_LSB
#define MAC_PCU_MISC_MODE_FORCE_QUIET_COLLISION_MASK 		 RXPCU_MISC_MODE_FORCE_QUIET_COLLISION_MASK
#define MAC_PCU_MISC_MODE_FORCE_QUIET_COLLISION_GET(x) 		 RXPCU_MISC_MODE_FORCE_QUIET_COLLISION_GET(x)
#define MAC_PCU_MISC_MODE_FORCE_QUIET_COLLISION_SET(x) 		 RXPCU_MISC_MODE_FORCE_QUIET_COLLISION_SET(x)
#define MAC_PCU_MISC_MODE_FORCE_QUIET_COLLISION_RESET 		 RXPCU_MISC_MODE_FORCE_QUIET_COLLISION_RESET
#define MAC_PCU_MISC_MODE_MISS_BEACON_IN_SLEEP_MSB 		 RXPCU_MISC_MODE_MISS_BEACON_IN_SLEEP_MSB
#define MAC_PCU_MISC_MODE_MISS_BEACON_IN_SLEEP_LSB 		 RXPCU_MISC_MODE_MISS_BEACON_IN_SLEEP_LSB
#define MAC_PCU_MISC_MODE_MISS_BEACON_IN_SLEEP_MASK 		 RXPCU_MISC_MODE_MISS_BEACON_IN_SLEEP_MASK
#define MAC_PCU_MISC_MODE_MISS_BEACON_IN_SLEEP_GET(x) 		 RXPCU_MISC_MODE_MISS_BEACON_IN_SLEEP_GET(x)
#define MAC_PCU_MISC_MODE_MISS_BEACON_IN_SLEEP_SET(x) 		 RXPCU_MISC_MODE_MISS_BEACON_IN_SLEEP_SET(x)
#define MAC_PCU_MISC_MODE_MISS_BEACON_IN_SLEEP_RESET 		 RXPCU_MISC_MODE_MISS_BEACON_IN_SLEEP_RESET
#define MAC_PCU_MISC_MODE_TXOP_TBTT_LIMIT_ENABLE_MSB 		 RXPCU_MISC_MODE_TXOP_TBTT_LIMIT_ENABLE_MSB
#define MAC_PCU_MISC_MODE_TXOP_TBTT_LIMIT_ENABLE_LSB 		 RXPCU_MISC_MODE_TXOP_TBTT_LIMIT_ENABLE_LSB
#define MAC_PCU_MISC_MODE_TXOP_TBTT_LIMIT_ENABLE_MASK 		 RXPCU_MISC_MODE_TXOP_TBTT_LIMIT_ENABLE_MASK
#define MAC_PCU_MISC_MODE_TXOP_TBTT_LIMIT_ENABLE_GET(x) 		 RXPCU_MISC_MODE_TXOP_TBTT_LIMIT_ENABLE_GET(x)
#define MAC_PCU_MISC_MODE_TXOP_TBTT_LIMIT_ENABLE_SET(x) 		 RXPCU_MISC_MODE_TXOP_TBTT_LIMIT_ENABLE_SET(x)
#define MAC_PCU_MISC_MODE_TXOP_TBTT_LIMIT_ENABLE_RESET 		 RXPCU_MISC_MODE_TXOP_TBTT_LIMIT_ENABLE_RESET
#define MAC_PCU_MISC_MODE_KC_RX_ANT_UPDATE_MSB 		 RXPCU_MISC_MODE_KC_RX_ANT_UPDATE_MSB
#define MAC_PCU_MISC_MODE_KC_RX_ANT_UPDATE_LSB 		 RXPCU_MISC_MODE_KC_RX_ANT_UPDATE_LSB
#define MAC_PCU_MISC_MODE_KC_RX_ANT_UPDATE_MASK 		 RXPCU_MISC_MODE_KC_RX_ANT_UPDATE_MASK
#define MAC_PCU_MISC_MODE_KC_RX_ANT_UPDATE_GET(x) 		 RXPCU_MISC_MODE_KC_RX_ANT_UPDATE_GET(x)
#define MAC_PCU_MISC_MODE_KC_RX_ANT_UPDATE_SET(x) 		 RXPCU_MISC_MODE_KC_RX_ANT_UPDATE_SET(x)
#define MAC_PCU_MISC_MODE_KC_RX_ANT_UPDATE_RESET 		 RXPCU_MISC_MODE_KC_RX_ANT_UPDATE_RESET
#define MAC_PCU_MISC_MODE_DEBUG_MODE_SIFS_MSB 		 RXPCU_MISC_MODE_DEBUG_MODE_SIFS_MSB
#define MAC_PCU_MISC_MODE_DEBUG_MODE_SIFS_LSB 		 RXPCU_MISC_MODE_DEBUG_MODE_SIFS_LSB
#define MAC_PCU_MISC_MODE_DEBUG_MODE_SIFS_MASK 		 RXPCU_MISC_MODE_DEBUG_MODE_SIFS_MASK
#define MAC_PCU_MISC_MODE_DEBUG_MODE_SIFS_GET(x) 		 RXPCU_MISC_MODE_DEBUG_MODE_SIFS_GET(x)
#define MAC_PCU_MISC_MODE_DEBUG_MODE_SIFS_SET(x) 		 RXPCU_MISC_MODE_DEBUG_MODE_SIFS_SET(x)
#define MAC_PCU_MISC_MODE_DEBUG_MODE_SIFS_RESET 		 RXPCU_MISC_MODE_DEBUG_MODE_SIFS_RESET
#define MAC_PCU_MISC_MODE_DEBUG_MODE_BA_BITMAP_MSB 		 RXPCU_MISC_MODE_DEBUG_MODE_BA_BITMAP_MSB
#define MAC_PCU_MISC_MODE_DEBUG_MODE_BA_BITMAP_LSB 		 RXPCU_MISC_MODE_DEBUG_MODE_BA_BITMAP_LSB
#define MAC_PCU_MISC_MODE_DEBUG_MODE_BA_BITMAP_MASK 		 RXPCU_MISC_MODE_DEBUG_MODE_BA_BITMAP_MASK
#define MAC_PCU_MISC_MODE_DEBUG_MODE_BA_BITMAP_GET(x) 		 RXPCU_MISC_MODE_DEBUG_MODE_BA_BITMAP_GET(x)
#define MAC_PCU_MISC_MODE_DEBUG_MODE_BA_BITMAP_SET(x) 		 RXPCU_MISC_MODE_DEBUG_MODE_BA_BITMAP_SET(x)
#define MAC_PCU_MISC_MODE_DEBUG_MODE_BA_BITMAP_RESET 		 RXPCU_MISC_MODE_DEBUG_MODE_BA_BITMAP_RESET
#define MAC_PCU_MISC_MODE_RCV_DELAY_SOUNDING_IM_TXBF_MSB 		 RXPCU_MISC_MODE_RCV_DELAY_SOUNDING_IM_TXBF_MSB
#define MAC_PCU_MISC_MODE_RCV_DELAY_SOUNDING_IM_TXBF_LSB 		 RXPCU_MISC_MODE_RCV_DELAY_SOUNDING_IM_TXBF_LSB
#define MAC_PCU_MISC_MODE_RCV_DELAY_SOUNDING_IM_TXBF_MASK 		 RXPCU_MISC_MODE_RCV_DELAY_SOUNDING_IM_TXBF_MASK
#define MAC_PCU_MISC_MODE_RCV_DELAY_SOUNDING_IM_TXBF_GET(x) 		 RXPCU_MISC_MODE_RCV_DELAY_SOUNDING_IM_TXBF_GET(x)
#define MAC_PCU_MISC_MODE_RCV_DELAY_SOUNDING_IM_TXBF_SET(x) 		 RXPCU_MISC_MODE_RCV_DELAY_SOUNDING_IM_TXBF_SET(x)
#define MAC_PCU_MISC_MODE_RCV_DELAY_SOUNDING_IM_TXBF_RESET 		 RXPCU_MISC_MODE_RCV_DELAY_SOUNDING_IM_TXBF_RESET
#define MAC_PCU_MISC_MODE_RXSM2SVD_PRE_RST_MSB 		 RXPCU_MISC_MODE_RXSM2SVD_PRE_RST_MSB
#define MAC_PCU_MISC_MODE_RXSM2SVD_PRE_RST_LSB 		 RXPCU_MISC_MODE_RXSM2SVD_PRE_RST_LSB
#define MAC_PCU_MISC_MODE_RXSM2SVD_PRE_RST_MASK 		 RXPCU_MISC_MODE_RXSM2SVD_PRE_RST_MASK
#define MAC_PCU_MISC_MODE_RXSM2SVD_PRE_RST_GET(x) 		 RXPCU_MISC_MODE_RXSM2SVD_PRE_RST_GET(x)
#define MAC_PCU_MISC_MODE_RXSM2SVD_PRE_RST_SET(x) 		 RXPCU_MISC_MODE_RXSM2SVD_PRE_RST_SET(x)
#define MAC_PCU_MISC_MODE_RXSM2SVD_PRE_RST_RESET 		 RXPCU_MISC_MODE_RXSM2SVD_PRE_RST_RESET
#define MAC_PCU_MISC_MODE_CCK_SIFS_MODE_MSB 		 RXPCU_MISC_MODE_CCK_SIFS_MODE_MSB
#define MAC_PCU_MISC_MODE_CCK_SIFS_MODE_LSB 		 RXPCU_MISC_MODE_CCK_SIFS_MODE_LSB
#define MAC_PCU_MISC_MODE_CCK_SIFS_MODE_MASK 		 RXPCU_MISC_MODE_CCK_SIFS_MODE_MASK
#define MAC_PCU_MISC_MODE_CCK_SIFS_MODE_GET(x) 		 RXPCU_MISC_MODE_CCK_SIFS_MODE_GET(x)
#define MAC_PCU_MISC_MODE_CCK_SIFS_MODE_SET(x) 		 RXPCU_MISC_MODE_CCK_SIFS_MODE_SET(x)
#define MAC_PCU_MISC_MODE_CCK_SIFS_MODE_RESET 		 RXPCU_MISC_MODE_CCK_SIFS_MODE_RESET
#define MAC_PCU_MISC_MODE_TX_ADD_TSF_MSB 		 RXPCU_MISC_MODE_TX_ADD_TSF_MSB
#define MAC_PCU_MISC_MODE_TX_ADD_TSF_LSB 		 RXPCU_MISC_MODE_TX_ADD_TSF_LSB
#define MAC_PCU_MISC_MODE_TX_ADD_TSF_MASK 		 RXPCU_MISC_MODE_TX_ADD_TSF_MASK
#define MAC_PCU_MISC_MODE_TX_ADD_TSF_GET(x) 		 RXPCU_MISC_MODE_TX_ADD_TSF_GET(x)
#define MAC_PCU_MISC_MODE_TX_ADD_TSF_SET(x) 		 RXPCU_MISC_MODE_TX_ADD_TSF_SET(x)
#define MAC_PCU_MISC_MODE_TX_ADD_TSF_RESET 		 RXPCU_MISC_MODE_TX_ADD_TSF_RESET
#define MAC_PCU_MISC_MODE_MIC_NEW_LOCATION_ENABLE_MSB 		 RXPCU_MISC_MODE_MIC_NEW_LOCATION_ENABLE_MSB
#define MAC_PCU_MISC_MODE_MIC_NEW_LOCATION_ENABLE_LSB 		 RXPCU_MISC_MODE_MIC_NEW_LOCATION_ENABLE_LSB
#define MAC_PCU_MISC_MODE_MIC_NEW_LOCATION_ENABLE_MASK 		 RXPCU_MISC_MODE_MIC_NEW_LOCATION_ENABLE_MASK
#define MAC_PCU_MISC_MODE_MIC_NEW_LOCATION_ENABLE_GET(x) 		 RXPCU_MISC_MODE_MIC_NEW_LOCATION_ENABLE_GET(x)
#define MAC_PCU_MISC_MODE_MIC_NEW_LOCATION_ENABLE_SET(x) 		 RXPCU_MISC_MODE_MIC_NEW_LOCATION_ENABLE_SET(x)
#define MAC_PCU_MISC_MODE_MIC_NEW_LOCATION_ENABLE_RESET 		 RXPCU_MISC_MODE_MIC_NEW_LOCATION_ENABLE_RESET
#define MAC_PCU_MISC_MODE_DEBUG_MODE_AD_MSB 		 RXPCU_MISC_MODE_DEBUG_MODE_AD_MSB
#define MAC_PCU_MISC_MODE_DEBUG_MODE_AD_LSB 		 RXPCU_MISC_MODE_DEBUG_MODE_AD_LSB
#define MAC_PCU_MISC_MODE_DEBUG_MODE_AD_MASK 		 RXPCU_MISC_MODE_DEBUG_MODE_AD_MASK
#define MAC_PCU_MISC_MODE_DEBUG_MODE_AD_GET(x) 		 RXPCU_MISC_MODE_DEBUG_MODE_AD_GET(x)
#define MAC_PCU_MISC_MODE_DEBUG_MODE_AD_SET(x) 		 RXPCU_MISC_MODE_DEBUG_MODE_AD_SET(x)
#define MAC_PCU_MISC_MODE_DEBUG_MODE_AD_RESET 		 RXPCU_MISC_MODE_DEBUG_MODE_AD_RESET
#define MAC_PCU_MISC_MODE_BSSID_MATCH_FORCE_MSB 		 RXPCU_MISC_MODE_BSSID_MATCH_FORCE_MSB
#define MAC_PCU_MISC_MODE_BSSID_MATCH_FORCE_LSB 		 RXPCU_MISC_MODE_BSSID_MATCH_FORCE_LSB
#define MAC_PCU_MISC_MODE_BSSID_MATCH_FORCE_MASK 		 RXPCU_MISC_MODE_BSSID_MATCH_FORCE_MASK
#define MAC_PCU_MISC_MODE_BSSID_MATCH_FORCE_GET(x) 		 RXPCU_MISC_MODE_BSSID_MATCH_FORCE_GET(x)
#define MAC_PCU_MISC_MODE_BSSID_MATCH_FORCE_SET(x) 		 RXPCU_MISC_MODE_BSSID_MATCH_FORCE_SET(x)
#define MAC_PCU_MISC_MODE_BSSID_MATCH_FORCE_RESET 		 RXPCU_MISC_MODE_BSSID_MATCH_FORCE_RESET
#define MAC_PCU_MISC_MODE_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_MISC_MODE_ADDRESS
// SW modifiable bits
#define MAC_PCU_MISC_MODE_SW_MASK 		 RXPCU_MISC_MODE_SW_MASK
// bits defined at reset
#define MAC_PCU_MISC_MODE_RSTMASK 		 RXPCU_MISC_MODE_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_MISC_MODE_RESET 		 RXPCU_MISC_MODE_RESET

// 32'h8124 (MAC_PCU_FILTER_OFDM_CNT)
#define MAC_PCU_FILTER_OFDM_CNT_VALUE_MSB 		 RXPCU_FILTER_OFDM_CNT_VALUE_MSB
#define MAC_PCU_FILTER_OFDM_CNT_VALUE_LSB 		 RXPCU_FILTER_OFDM_CNT_VALUE_LSB
#define MAC_PCU_FILTER_OFDM_CNT_VALUE_MASK 		 RXPCU_FILTER_OFDM_CNT_VALUE_MASK
#define MAC_PCU_FILTER_OFDM_CNT_VALUE_GET(x) 		 RXPCU_FILTER_OFDM_CNT_VALUE_GET(x)
#define MAC_PCU_FILTER_OFDM_CNT_VALUE_SET(x) 		 RXPCU_FILTER_OFDM_CNT_VALUE_SET(x)
#define MAC_PCU_FILTER_OFDM_CNT_VALUE_RESET 		 RXPCU_FILTER_OFDM_CNT_VALUE_RESET
#define MAC_PCU_FILTER_OFDM_CNT_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_FILTER_OFDM_CNT_ADDRESS
// SW modifiable bits
#define MAC_PCU_FILTER_OFDM_CNT_SW_MASK 		 RXPCU_FILTER_OFDM_CNT_SW_MASK
// bits defined at reset
#define MAC_PCU_FILTER_OFDM_CNT_RSTMASK 		 RXPCU_FILTER_OFDM_CNT_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_FILTER_OFDM_CNT_RESET 		 RXPCU_FILTER_OFDM_CNT_RESET

// 32'h8128 (MAC_PCU_FILTER_CCK_CNT)
#define MAC_PCU_FILTER_CCK_CNT_VALUE_MSB 		 RXPCU_FILTER_CCK_CNT_VALUE_MSB
#define MAC_PCU_FILTER_CCK_CNT_VALUE_LSB 		 RXPCU_FILTER_CCK_CNT_VALUE_LSB
#define MAC_PCU_FILTER_CCK_CNT_VALUE_MASK 		 RXPCU_FILTER_CCK_CNT_VALUE_MASK
#define MAC_PCU_FILTER_CCK_CNT_VALUE_GET(x) 		 RXPCU_FILTER_CCK_CNT_VALUE_GET(x)
#define MAC_PCU_FILTER_CCK_CNT_VALUE_SET(x) 		 RXPCU_FILTER_CCK_CNT_VALUE_SET(x)
#define MAC_PCU_FILTER_CCK_CNT_VALUE_RESET 		 RXPCU_FILTER_CCK_CNT_VALUE_RESET
#define MAC_PCU_FILTER_CCK_CNT_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_FILTER_CCK_CNT_ADDRESS
// SW modifiable bits
#define MAC_PCU_FILTER_CCK_CNT_SW_MASK 		 RXPCU_FILTER_CCK_CNT_SW_MASK
// bits defined at reset
#define MAC_PCU_FILTER_CCK_CNT_RSTMASK 		 RXPCU_FILTER_CCK_CNT_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_FILTER_CCK_CNT_RESET 		 RXPCU_FILTER_CCK_CNT_RESET

// 32'h812c (MAC_PCU_PHY_ERR_CNT_1)
#define MAC_PCU_PHY_ERR_CNT_1_VALUE_MSB 		 RXPCU_PHY_ERR_CNT_1_VALUE_MSB
#define MAC_PCU_PHY_ERR_CNT_1_VALUE_LSB 		 RXPCU_PHY_ERR_CNT_1_VALUE_LSB
#define MAC_PCU_PHY_ERR_CNT_1_VALUE_MASK 		 RXPCU_PHY_ERR_CNT_1_VALUE_MASK
#define MAC_PCU_PHY_ERR_CNT_1_VALUE_GET(x) 		 RXPCU_PHY_ERR_CNT_1_VALUE_GET(x)
#define MAC_PCU_PHY_ERR_CNT_1_VALUE_SET(x) 		 RXPCU_PHY_ERR_CNT_1_VALUE_SET(x)
#define MAC_PCU_PHY_ERR_CNT_1_VALUE_RESET 		 RXPCU_PHY_ERR_CNT_1_VALUE_RESET
#define MAC_PCU_PHY_ERR_CNT_1_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_PHY_ERR_CNT_1_ADDRESS
// SW modifiable bits
#define MAC_PCU_PHY_ERR_CNT_1_SW_MASK 		 RXPCU_PHY_ERR_CNT_1_SW_MASK
// bits defined at reset
#define MAC_PCU_PHY_ERR_CNT_1_RSTMASK 		 RXPCU_PHY_ERR_CNT_1_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_PHY_ERR_CNT_1_RESET 		 RXPCU_PHY_ERR_CNT_1_RESET

// 32'h8130 (MAC_PCU_PHY_ERR_CNT_1_MASK)
#define MAC_PCU_PHY_ERR_CNT_1_MASK_VALUE_MSB 		 RXPCU_PHY_ERR_CNT_1_MASK_VALUE_MSB
#define MAC_PCU_PHY_ERR_CNT_1_MASK_VALUE_LSB 		 RXPCU_PHY_ERR_CNT_1_MASK_VALUE_LSB
#define MAC_PCU_PHY_ERR_CNT_1_MASK_VALUE_MASK 		 RXPCU_PHY_ERR_CNT_1_MASK_VALUE_MASK
#define MAC_PCU_PHY_ERR_CNT_1_MASK_VALUE_GET(x) 		 RXPCU_PHY_ERR_CNT_1_MASK_VALUE_GET(x)
#define MAC_PCU_PHY_ERR_CNT_1_MASK_VALUE_SET(x) 		 RXPCU_PHY_ERR_CNT_1_MASK_VALUE_SET(x)
#define MAC_PCU_PHY_ERR_CNT_1_MASK_VALUE_RESET 		 RXPCU_PHY_ERR_CNT_1_MASK_VALUE_RESET
#define MAC_PCU_PHY_ERR_CNT_1_MASK_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_PHY_ERR_CNT_1_MASK_ADDRESS
#define MAC_PCU_PHY_ERR_CNT_1_MASK_OFFSET 		 RXPCU_PHY_ERR_CNT_1_MASK_OFFSET
// SW modifiable bits
#define MAC_PCU_PHY_ERR_CNT_1_MASK_SW_MASK 		 RXPCU_PHY_ERR_CNT_1_MASK_SW_MASK
// bits defined at reset
#define MAC_PCU_PHY_ERR_CNT_1_MASK_RSTMASK 		 RXPCU_PHY_ERR_CNT_1_MASK_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_PHY_ERR_CNT_1_MASK_RESET 		 RXPCU_PHY_ERR_CNT_1_MASK_RESET

// 32'h8134 (MAC_PCU_PHY_ERR_CNT_2)
#define MAC_PCU_PHY_ERR_CNT_2_VALUE_MSB 		 RXPCU_PHY_ERR_CNT_2_VALUE_MSB
#define MAC_PCU_PHY_ERR_CNT_2_VALUE_LSB 		 RXPCU_PHY_ERR_CNT_2_VALUE_LSB
#define MAC_PCU_PHY_ERR_CNT_2_VALUE_MASK 		 RXPCU_PHY_ERR_CNT_2_VALUE_MASK
#define MAC_PCU_PHY_ERR_CNT_2_VALUE_GET(x) 		 RXPCU_PHY_ERR_CNT_2_VALUE_GET(x)
#define MAC_PCU_PHY_ERR_CNT_2_VALUE_SET(x) 		 RXPCU_PHY_ERR_CNT_2_VALUE_SET(x)
#define MAC_PCU_PHY_ERR_CNT_2_VALUE_RESET 		 RXPCU_PHY_ERR_CNT_2_VALUE_RESET
#define MAC_PCU_PHY_ERR_CNT_2_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_PHY_ERR_CNT_2_ADDRESS
// SW modifiable bits
#define MAC_PCU_PHY_ERR_CNT_2_SW_MASK 		 RXPCU_PHY_ERR_CNT_2_SW_MASK
// bits defined at reset
#define MAC_PCU_PHY_ERR_CNT_2_RSTMASK 		 RXPCU_PHY_ERR_CNT_2_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_PHY_ERR_CNT_2_RESET 		 RXPCU_PHY_ERR_CNT_2_RESET

// 32'h8138 (MAC_PCU_PHY_ERR_CNT_2_MASK)
#define MAC_PCU_PHY_ERR_CNT_2_MASK_VALUE_MSB 		 RXPCU_PHY_ERR_CNT_2_MASK_VALUE_MSB
#define MAC_PCU_PHY_ERR_CNT_2_MASK_VALUE_LSB 		 RXPCU_PHY_ERR_CNT_2_MASK_VALUE_LSB
#define MAC_PCU_PHY_ERR_CNT_2_MASK_VALUE_MASK 		 RXPCU_PHY_ERR_CNT_2_MASK_VALUE_MASK
#define MAC_PCU_PHY_ERR_CNT_2_MASK_VALUE_GET(x) 		 RXPCU_PHY_ERR_CNT_2_MASK_VALUE_GET(x)
#define MAC_PCU_PHY_ERR_CNT_2_MASK_VALUE_SET(x) 		 RXPCU_PHY_ERR_CNT_2_MASK_VALUE_SET(x)
#define MAC_PCU_PHY_ERR_CNT_2_MASK_VALUE_RESET 		 RXPCU_PHY_ERR_CNT_2_MASK_VALUE_RESET
#define MAC_PCU_PHY_ERR_CNT_2_MASK_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_PHY_ERR_CNT_2_MASK_ADDRESS
// SW modifiable bits
#define MAC_PCU_PHY_ERR_CNT_2_MASK_SW_MASK 		 RXPCU_PHY_ERR_CNT_2_MASK_SW_MASK
// bits defined at reset
#define MAC_PCU_PHY_ERR_CNT_2_MASK_RSTMASK 		 RXPCU_PHY_ERR_CNT_2_MASK_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_PHY_ERR_CNT_2_MASK_RESET 		 RXPCU_PHY_ERR_CNT_2_MASK_RESET

// 32'h8144 (MAC_PCU_PHY_ERROR_EIFS_MASK)
#define MAC_PCU_PHY_ERROR_EIFS_MASK_VALUE_MSB 		 RXPCU_PHY_ERROR_EIFS_MASK_VALUE_MSB
#define MAC_PCU_PHY_ERROR_EIFS_MASK_VALUE_LSB 		 RXPCU_PHY_ERROR_EIFS_MASK_VALUE_LSB
#define MAC_PCU_PHY_ERROR_EIFS_MASK_VALUE_MASK 		 RXPCU_PHY_ERROR_EIFS_MASK_VALUE_MASK
#define MAC_PCU_PHY_ERROR_EIFS_MASK_VALUE_GET(x) 		 RXPCU_PHY_ERROR_EIFS_MASK_VALUE_GET(x)
#define MAC_PCU_PHY_ERROR_EIFS_MASK_VALUE_SET(x) 		 RXPCU_PHY_ERROR_EIFS_MASK_VALUE_SET(x)
#define MAC_PCU_PHY_ERROR_EIFS_MASK_VALUE_RESET 		 RXPCU_PHY_ERROR_EIFS_MASK_VALUE_RESET
#define MAC_PCU_PHY_ERROR_EIFS_MASK_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_PHY_ERROR_EIFS_MASK_ADDRESS
// SW modifiable bits
#define MAC_PCU_PHY_ERROR_EIFS_MASK_SW_MASK 		 RXPCU_PHY_ERROR_EIFS_MASK_SW_MASK
// bits defined at reset
#define MAC_PCU_PHY_ERROR_EIFS_MASK_RSTMASK 		 RXPCU_PHY_ERROR_EIFS_MASK_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_PHY_ERROR_EIFS_MASK_RESET 		 RXPCU_PHY_ERROR_EIFS_MASK_RESET

// 32'h8168 (MAC_PCU_PHY_ERR_CNT_3)
#define MAC_PCU_PHY_ERR_CNT_3_VALUE_MSB 		 RXPCU_PHY_ERR_CNT_3_VALUE_MSB
#define MAC_PCU_PHY_ERR_CNT_3_VALUE_LSB 		 RXPCU_PHY_ERR_CNT_3_VALUE_LSB
#define MAC_PCU_PHY_ERR_CNT_3_VALUE_MASK 		 RXPCU_PHY_ERR_CNT_3_VALUE_MASK
#define MAC_PCU_PHY_ERR_CNT_3_VALUE_GET(x) 		 RXPCU_PHY_ERR_CNT_3_VALUE_GET(x)
#define MAC_PCU_PHY_ERR_CNT_3_VALUE_SET(x) 		 RXPCU_PHY_ERR_CNT_3_VALUE_SET(x)
#define MAC_PCU_PHY_ERR_CNT_3_VALUE_RESET 		 RXPCU_PHY_ERR_CNT_3_VALUE_RESET
#define MAC_PCU_PHY_ERR_CNT_3_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_PHY_ERR_CNT_3_ADDRESS
// SW modifiable bits
#define MAC_PCU_PHY_ERR_CNT_3_SW_MASK 		 RXPCU_PHY_ERR_CNT_3_SW_MASK
// bits defined at reset
#define MAC_PCU_PHY_ERR_CNT_3_RSTMASK 		 RXPCU_PHY_ERR_CNT_3_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_PHY_ERR_CNT_3_RESET 		 RXPCU_PHY_ERR_CNT_3_RESET

// 32'h816c (MAC_PCU_PHY_ERR_CNT_3_MASK)
#define MAC_PCU_PHY_ERR_CNT_3_MASK_VALUE_MSB 		 RXPCU_PHY_ERR_CNT_3_MASK_VALUE_MSB
#define MAC_PCU_PHY_ERR_CNT_3_MASK_VALUE_LSB 		 RXPCU_PHY_ERR_CNT_3_MASK_VALUE_LSB
#define MAC_PCU_PHY_ERR_CNT_3_MASK_VALUE_MASK 		 RXPCU_PHY_ERR_CNT_3_MASK_VALUE_MASK
#define MAC_PCU_PHY_ERR_CNT_3_MASK_VALUE_GET(x) 		 RXPCU_PHY_ERR_CNT_3_MASK_VALUE_GET(x)
#define MAC_PCU_PHY_ERR_CNT_3_MASK_VALUE_SET(x) 		 RXPCU_PHY_ERR_CNT_3_MASK_VALUE_SET(x)
#define MAC_PCU_PHY_ERR_CNT_3_MASK_VALUE_RESET 		 RXPCU_PHY_ERR_CNT_3_MASK_VALUE_RESET
#define MAC_PCU_PHY_ERR_CNT_3_MASK_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_PHY_ERR_CNT_3_MASK_ADDRESS
// SW modifiable bits
#define MAC_PCU_PHY_ERR_CNT_3_MASK_SW_MASK 		 RXPCU_PHY_ERR_CNT_3_MASK_SW_MASK
// bits defined at reset
#define MAC_PCU_PHY_ERR_CNT_3_MASK_RSTMASK 		 RXPCU_PHY_ERR_CNT_3_MASK_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_PHY_ERR_CNT_3_MASK_RESET 		 RXPCU_PHY_ERR_CNT_3_MASK_RESET

// 32'h8170 (MAC_PCU_BLUETOOTH_MODE)
#define MAC_PCU_BLUETOOTH_MODE_FIRST_SLOT_TIME_MSB 		 PTA_COEX_BLUETOOTH_MODE_FIRST_SLOT_TIME_MSB
#define MAC_PCU_BLUETOOTH_MODE_FIRST_SLOT_TIME_LSB 		 PTA_COEX_BLUETOOTH_MODE_FIRST_SLOT_TIME_LSB
#define MAC_PCU_BLUETOOTH_MODE_FIRST_SLOT_TIME_MASK 		 PTA_COEX_BLUETOOTH_MODE_FIRST_SLOT_TIME_MASK
#define MAC_PCU_BLUETOOTH_MODE_FIRST_SLOT_TIME_GET(x) 		 PTA_COEX_BLUETOOTH_MODE_FIRST_SLOT_TIME_GET(x)
#define MAC_PCU_BLUETOOTH_MODE_FIRST_SLOT_TIME_SET(x) 		 PTA_COEX_BLUETOOTH_MODE_FIRST_SLOT_TIME_SET(x)
#define MAC_PCU_BLUETOOTH_MODE_FIRST_SLOT_TIME_RESET 		 PTA_COEX_BLUETOOTH_MODE_FIRST_SLOT_TIME_RESET
#define MAC_PCU_BLUETOOTH_MODE_PRIORITY_TIME_MSB 		 PTA_COEX_BLUETOOTH_MODE_PRIORITY_TIME_MSB
#define MAC_PCU_BLUETOOTH_MODE_PRIORITY_TIME_LSB 		 PTA_COEX_BLUETOOTH_MODE_PRIORITY_TIME_LSB
#define MAC_PCU_BLUETOOTH_MODE_PRIORITY_TIME_MASK 		 PTA_COEX_BLUETOOTH_MODE_PRIORITY_TIME_MASK
#define MAC_PCU_BLUETOOTH_MODE_PRIORITY_TIME_GET(x) 		 PTA_COEX_BLUETOOTH_MODE_PRIORITY_TIME_GET(x)
#define MAC_PCU_BLUETOOTH_MODE_PRIORITY_TIME_SET(x) 		 PTA_COEX_BLUETOOTH_MODE_PRIORITY_TIME_SET(x)
#define MAC_PCU_BLUETOOTH_MODE_PRIORITY_TIME_RESET 		 PTA_COEX_BLUETOOTH_MODE_PRIORITY_TIME_RESET
#define MAC_PCU_BLUETOOTH_MODE_RX_CLEAR_POLARITY_MSB 		 PTA_COEX_BLUETOOTH_MODE_RX_CLEAR_POLARITY_MSB
#define MAC_PCU_BLUETOOTH_MODE_RX_CLEAR_POLARITY_LSB 		 PTA_COEX_BLUETOOTH_MODE_RX_CLEAR_POLARITY_LSB
#define MAC_PCU_BLUETOOTH_MODE_RX_CLEAR_POLARITY_MASK 		 PTA_COEX_BLUETOOTH_MODE_RX_CLEAR_POLARITY_MASK
#define MAC_PCU_BLUETOOTH_MODE_RX_CLEAR_POLARITY_GET(x) 		 PTA_COEX_BLUETOOTH_MODE_RX_CLEAR_POLARITY_GET(x)
#define MAC_PCU_BLUETOOTH_MODE_RX_CLEAR_POLARITY_SET(x) 		 PTA_COEX_BLUETOOTH_MODE_RX_CLEAR_POLARITY_SET(x)
#define MAC_PCU_BLUETOOTH_MODE_RX_CLEAR_POLARITY_RESET 		 PTA_COEX_BLUETOOTH_MODE_RX_CLEAR_POLARITY_RESET
#define MAC_PCU_BLUETOOTH_MODE_QCU_THRESH_MSB 		 PTA_COEX_BLUETOOTH_MODE_QCU_THRESH_MSB
#define MAC_PCU_BLUETOOTH_MODE_QCU_THRESH_LSB 		 PTA_COEX_BLUETOOTH_MODE_QCU_THRESH_LSB
#define MAC_PCU_BLUETOOTH_MODE_QCU_THRESH_MASK 		 PTA_COEX_BLUETOOTH_MODE_QCU_THRESH_MASK
#define MAC_PCU_BLUETOOTH_MODE_QCU_THRESH_GET(x) 		 PTA_COEX_BLUETOOTH_MODE_QCU_THRESH_GET(x)
#define MAC_PCU_BLUETOOTH_MODE_QCU_THRESH_SET(x) 		 PTA_COEX_BLUETOOTH_MODE_QCU_THRESH_SET(x)
#define MAC_PCU_BLUETOOTH_MODE_QCU_THRESH_RESET 		 PTA_COEX_BLUETOOTH_MODE_QCU_THRESH_RESET
#define MAC_PCU_BLUETOOTH_MODE_QUIET_MSB 		 PTA_COEX_BLUETOOTH_MODE_QUIET_MSB
#define MAC_PCU_BLUETOOTH_MODE_QUIET_LSB 		 PTA_COEX_BLUETOOTH_MODE_QUIET_LSB
#define MAC_PCU_BLUETOOTH_MODE_QUIET_MASK 		 PTA_COEX_BLUETOOTH_MODE_QUIET_MASK
#define MAC_PCU_BLUETOOTH_MODE_QUIET_GET(x) 		 PTA_COEX_BLUETOOTH_MODE_QUIET_GET(x)
#define MAC_PCU_BLUETOOTH_MODE_QUIET_SET(x) 		 PTA_COEX_BLUETOOTH_MODE_QUIET_SET(x)
#define MAC_PCU_BLUETOOTH_MODE_QUIET_RESET 		 PTA_COEX_BLUETOOTH_MODE_QUIET_RESET
#define MAC_PCU_BLUETOOTH_MODE_MODE_MSB 		 PTA_COEX_BLUETOOTH_MODE_MODE_MSB
#define MAC_PCU_BLUETOOTH_MODE_MODE_LSB 		 PTA_COEX_BLUETOOTH_MODE_MODE_LSB
#define MAC_PCU_BLUETOOTH_MODE_MODE_MASK 		 PTA_COEX_BLUETOOTH_MODE_MODE_MASK
#define MAC_PCU_BLUETOOTH_MODE_MODE_GET(x) 		 PTA_COEX_BLUETOOTH_MODE_MODE_GET(x)
#define MAC_PCU_BLUETOOTH_MODE_MODE_SET(x) 		 PTA_COEX_BLUETOOTH_MODE_MODE_SET(x)
#define MAC_PCU_BLUETOOTH_MODE_MODE_RESET 		 PTA_COEX_BLUETOOTH_MODE_MODE_RESET
#define MAC_PCU_BLUETOOTH_MODE_TX_FRAME_EXTEND_MSB 		 PTA_COEX_BLUETOOTH_MODE_TX_FRAME_EXTEND_MSB
#define MAC_PCU_BLUETOOTH_MODE_TX_FRAME_EXTEND_LSB 		 PTA_COEX_BLUETOOTH_MODE_TX_FRAME_EXTEND_LSB
#define MAC_PCU_BLUETOOTH_MODE_TX_FRAME_EXTEND_MASK 		 PTA_COEX_BLUETOOTH_MODE_TX_FRAME_EXTEND_MASK
#define MAC_PCU_BLUETOOTH_MODE_TX_FRAME_EXTEND_GET(x) 		 PTA_COEX_BLUETOOTH_MODE_TX_FRAME_EXTEND_GET(x)
#define MAC_PCU_BLUETOOTH_MODE_TX_FRAME_EXTEND_SET(x) 		 PTA_COEX_BLUETOOTH_MODE_TX_FRAME_EXTEND_SET(x)
#define MAC_PCU_BLUETOOTH_MODE_TX_FRAME_EXTEND_RESET 		 PTA_COEX_BLUETOOTH_MODE_TX_FRAME_EXTEND_RESET
#define MAC_PCU_BLUETOOTH_MODE_TX_STATE_EXTEND_MSB 		 PTA_COEX_BLUETOOTH_MODE_TX_STATE_EXTEND_MSB
#define MAC_PCU_BLUETOOTH_MODE_TX_STATE_EXTEND_LSB 		 PTA_COEX_BLUETOOTH_MODE_TX_STATE_EXTEND_LSB
#define MAC_PCU_BLUETOOTH_MODE_TX_STATE_EXTEND_MASK 		 PTA_COEX_BLUETOOTH_MODE_TX_STATE_EXTEND_MASK
#define MAC_PCU_BLUETOOTH_MODE_TX_STATE_EXTEND_GET(x) 		 PTA_COEX_BLUETOOTH_MODE_TX_STATE_EXTEND_GET(x)
#define MAC_PCU_BLUETOOTH_MODE_TX_STATE_EXTEND_SET(x) 		 PTA_COEX_BLUETOOTH_MODE_TX_STATE_EXTEND_SET(x)
#define MAC_PCU_BLUETOOTH_MODE_TX_STATE_EXTEND_RESET 		 PTA_COEX_BLUETOOTH_MODE_TX_STATE_EXTEND_RESET
#define MAC_PCU_BLUETOOTH_MODE_TIME_EXTEND_MSB 		 PTA_COEX_BLUETOOTH_MODE_TIME_EXTEND_MSB
#define MAC_PCU_BLUETOOTH_MODE_TIME_EXTEND_LSB 		 PTA_COEX_BLUETOOTH_MODE_TIME_EXTEND_LSB
#define MAC_PCU_BLUETOOTH_MODE_TIME_EXTEND_MASK 		 PTA_COEX_BLUETOOTH_MODE_TIME_EXTEND_MASK
#define MAC_PCU_BLUETOOTH_MODE_TIME_EXTEND_GET(x) 		 PTA_COEX_BLUETOOTH_MODE_TIME_EXTEND_GET(x)
#define MAC_PCU_BLUETOOTH_MODE_TIME_EXTEND_SET(x) 		 PTA_COEX_BLUETOOTH_MODE_TIME_EXTEND_SET(x)
#define MAC_PCU_BLUETOOTH_MODE_TIME_EXTEND_RESET 		 PTA_COEX_BLUETOOTH_MODE_TIME_EXTEND_RESET
#define MAC_PCU_BLUETOOTH_MODE_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BLUETOOTH_MODE_ADDRESS
// SW modifiable bits
#define MAC_PCU_BLUETOOTH_MODE_SW_MASK 		 PTA_COEX_BLUETOOTH_MODE_SW_MASK
// bits defined at reset
#define MAC_PCU_BLUETOOTH_MODE_RSTMASK 		 PTA_COEX_BLUETOOTH_MODE_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BLUETOOTH_MODE_RESET 		 PTA_COEX_BLUETOOTH_MODE_RESET

// 32'h8178 (MAC_PCU_HCF_TIMEOUT)
#define MAC_PCU_HCF_TIMEOUT_VALUE_MSB 		 WIFI_TIMERS_HCF_TIMEOUT_VALUE_MSB
#define MAC_PCU_HCF_TIMEOUT_VALUE_LSB 		 WIFI_TIMERS_HCF_TIMEOUT_VALUE_LSB
#define MAC_PCU_HCF_TIMEOUT_VALUE_MASK 		 WIFI_TIMERS_HCF_TIMEOUT_VALUE_MASK
#define MAC_PCU_HCF_TIMEOUT_VALUE_GET(x) 		 WIFI_TIMERS_HCF_TIMEOUT_VALUE_GET(x)
#define MAC_PCU_HCF_TIMEOUT_VALUE_SET(x) 		 WIFI_TIMERS_HCF_TIMEOUT_VALUE_SET(x)
#define MAC_PCU_HCF_TIMEOUT_VALUE_RESET 		 WIFI_TIMERS_HCF_TIMEOUT_VALUE_RESET
#define MAC_PCU_HCF_TIMEOUT_ADDRESS 		 WIFI_TIMERS_BASE_ADDRESS+WIFI_TIMERS_HCF_TIMEOUT_ADDRESS
// SW modifiable bits
#define MAC_PCU_HCF_TIMEOUT_SW_MASK 		 WIFI_TIMERS_HCF_TIMEOUT_SW_MASK
// bits defined at reset
#define MAC_PCU_HCF_TIMEOUT_RSTMASK 		 WIFI_TIMERS_HCF_TIMEOUT_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_HCF_TIMEOUT_RESET 		 WIFI_TIMERS_HCF_TIMEOUT_RESET

// 32'h817c (MAC_PCU_BLUETOOTH_MODE2)
#define MAC_PCU_BLUETOOTH_MODE2_PHY_ERR_BT_COLL_ENABLE_MSB 		 PTA_COEX_BLUETOOTH_MODE2_PHY_ERR_BT_COLL_ENABLE_MSB
#define MAC_PCU_BLUETOOTH_MODE2_PHY_ERR_BT_COLL_ENABLE_LSB 		 PTA_COEX_BLUETOOTH_MODE2_PHY_ERR_BT_COLL_ENABLE_LSB
#define MAC_PCU_BLUETOOTH_MODE2_PHY_ERR_BT_COLL_ENABLE_MASK 		 PTA_COEX_BLUETOOTH_MODE2_PHY_ERR_BT_COLL_ENABLE_MASK
#define MAC_PCU_BLUETOOTH_MODE2_PHY_ERR_BT_COLL_ENABLE_GET(x) 		 PTA_COEX_BLUETOOTH_MODE2_PHY_ERR_BT_COLL_ENABLE_GET(x)
#define MAC_PCU_BLUETOOTH_MODE2_PHY_ERR_BT_COLL_ENABLE_SET(x) 		 PTA_COEX_BLUETOOTH_MODE2_PHY_ERR_BT_COLL_ENABLE_SET(x)
#define MAC_PCU_BLUETOOTH_MODE2_PHY_ERR_BT_COLL_ENABLE_RESET 		 PTA_COEX_BLUETOOTH_MODE2_PHY_ERR_BT_COLL_ENABLE_RESET
#define MAC_PCU_BLUETOOTH_MODE2_INTERRUPT_ENABLE_MSB 		 PTA_COEX_BLUETOOTH_MODE2_INTERRUPT_ENABLE_MSB
#define MAC_PCU_BLUETOOTH_MODE2_INTERRUPT_ENABLE_LSB 		 PTA_COEX_BLUETOOTH_MODE2_INTERRUPT_ENABLE_LSB
#define MAC_PCU_BLUETOOTH_MODE2_INTERRUPT_ENABLE_MASK 		 PTA_COEX_BLUETOOTH_MODE2_INTERRUPT_ENABLE_MASK
#define MAC_PCU_BLUETOOTH_MODE2_INTERRUPT_ENABLE_GET(x) 		 PTA_COEX_BLUETOOTH_MODE2_INTERRUPT_ENABLE_GET(x)
#define MAC_PCU_BLUETOOTH_MODE2_INTERRUPT_ENABLE_SET(x) 		 PTA_COEX_BLUETOOTH_MODE2_INTERRUPT_ENABLE_SET(x)
#define MAC_PCU_BLUETOOTH_MODE2_INTERRUPT_ENABLE_RESET 		 PTA_COEX_BLUETOOTH_MODE2_INTERRUPT_ENABLE_RESET
#define MAC_PCU_BLUETOOTH_MODE2_TSF_BT_PRIORITY_CTRL_MSB 		 PTA_COEX_BLUETOOTH_MODE2_TSF_BT_PRIORITY_CTRL_MSB
#define MAC_PCU_BLUETOOTH_MODE2_TSF_BT_PRIORITY_CTRL_LSB 		 PTA_COEX_BLUETOOTH_MODE2_TSF_BT_PRIORITY_CTRL_LSB
#define MAC_PCU_BLUETOOTH_MODE2_TSF_BT_PRIORITY_CTRL_MASK 		 PTA_COEX_BLUETOOTH_MODE2_TSF_BT_PRIORITY_CTRL_MASK
#define MAC_PCU_BLUETOOTH_MODE2_TSF_BT_PRIORITY_CTRL_GET(x) 		 PTA_COEX_BLUETOOTH_MODE2_TSF_BT_PRIORITY_CTRL_GET(x)
#define MAC_PCU_BLUETOOTH_MODE2_TSF_BT_PRIORITY_CTRL_SET(x) 		 PTA_COEX_BLUETOOTH_MODE2_TSF_BT_PRIORITY_CTRL_SET(x)
#define MAC_PCU_BLUETOOTH_MODE2_TSF_BT_PRIORITY_CTRL_RESET 		 PTA_COEX_BLUETOOTH_MODE2_TSF_BT_PRIORITY_CTRL_RESET
#define MAC_PCU_BLUETOOTH_MODE2_TSF_BT_ACTIVE_CTRL_MSB 		 PTA_COEX_BLUETOOTH_MODE2_TSF_BT_ACTIVE_CTRL_MSB
#define MAC_PCU_BLUETOOTH_MODE2_TSF_BT_ACTIVE_CTRL_LSB 		 PTA_COEX_BLUETOOTH_MODE2_TSF_BT_ACTIVE_CTRL_LSB
#define MAC_PCU_BLUETOOTH_MODE2_TSF_BT_ACTIVE_CTRL_MASK 		 PTA_COEX_BLUETOOTH_MODE2_TSF_BT_ACTIVE_CTRL_MASK
#define MAC_PCU_BLUETOOTH_MODE2_TSF_BT_ACTIVE_CTRL_GET(x) 		 PTA_COEX_BLUETOOTH_MODE2_TSF_BT_ACTIVE_CTRL_GET(x)
#define MAC_PCU_BLUETOOTH_MODE2_TSF_BT_ACTIVE_CTRL_SET(x) 		 PTA_COEX_BLUETOOTH_MODE2_TSF_BT_ACTIVE_CTRL_SET(x)
#define MAC_PCU_BLUETOOTH_MODE2_TSF_BT_ACTIVE_CTRL_RESET 		 PTA_COEX_BLUETOOTH_MODE2_TSF_BT_ACTIVE_CTRL_RESET
#define MAC_PCU_BLUETOOTH_MODE2_RS_DISCARD_EXTEND_MSB 		 PTA_COEX_BLUETOOTH_MODE2_RS_DISCARD_EXTEND_MSB
#define MAC_PCU_BLUETOOTH_MODE2_RS_DISCARD_EXTEND_LSB 		 PTA_COEX_BLUETOOTH_MODE2_RS_DISCARD_EXTEND_LSB
#define MAC_PCU_BLUETOOTH_MODE2_RS_DISCARD_EXTEND_MASK 		 PTA_COEX_BLUETOOTH_MODE2_RS_DISCARD_EXTEND_MASK
#define MAC_PCU_BLUETOOTH_MODE2_RS_DISCARD_EXTEND_GET(x) 		 PTA_COEX_BLUETOOTH_MODE2_RS_DISCARD_EXTEND_GET(x)
#define MAC_PCU_BLUETOOTH_MODE2_RS_DISCARD_EXTEND_SET(x) 		 PTA_COEX_BLUETOOTH_MODE2_RS_DISCARD_EXTEND_SET(x)
#define MAC_PCU_BLUETOOTH_MODE2_RS_DISCARD_EXTEND_RESET 		 PTA_COEX_BLUETOOTH_MODE2_RS_DISCARD_EXTEND_RESET
#define MAC_PCU_BLUETOOTH_MODE2_WL_TXRX_SEPARATE_MSB 		 PTA_COEX_BLUETOOTH_MODE2_WL_TXRX_SEPARATE_MSB
#define MAC_PCU_BLUETOOTH_MODE2_WL_TXRX_SEPARATE_LSB 		 PTA_COEX_BLUETOOTH_MODE2_WL_TXRX_SEPARATE_LSB
#define MAC_PCU_BLUETOOTH_MODE2_WL_TXRX_SEPARATE_MASK 		 PTA_COEX_BLUETOOTH_MODE2_WL_TXRX_SEPARATE_MASK
#define MAC_PCU_BLUETOOTH_MODE2_WL_TXRX_SEPARATE_GET(x) 		 PTA_COEX_BLUETOOTH_MODE2_WL_TXRX_SEPARATE_GET(x)
#define MAC_PCU_BLUETOOTH_MODE2_WL_TXRX_SEPARATE_SET(x) 		 PTA_COEX_BLUETOOTH_MODE2_WL_TXRX_SEPARATE_SET(x)
#define MAC_PCU_BLUETOOTH_MODE2_WL_TXRX_SEPARATE_RESET 		 PTA_COEX_BLUETOOTH_MODE2_WL_TXRX_SEPARATE_RESET
#define MAC_PCU_BLUETOOTH_MODE2_WL_ACTIVE_MODE_MSB 		 PTA_COEX_BLUETOOTH_MODE2_WL_ACTIVE_MODE_MSB
#define MAC_PCU_BLUETOOTH_MODE2_WL_ACTIVE_MODE_LSB 		 PTA_COEX_BLUETOOTH_MODE2_WL_ACTIVE_MODE_LSB
#define MAC_PCU_BLUETOOTH_MODE2_WL_ACTIVE_MODE_MASK 		 PTA_COEX_BLUETOOTH_MODE2_WL_ACTIVE_MODE_MASK
#define MAC_PCU_BLUETOOTH_MODE2_WL_ACTIVE_MODE_GET(x) 		 PTA_COEX_BLUETOOTH_MODE2_WL_ACTIVE_MODE_GET(x)
#define MAC_PCU_BLUETOOTH_MODE2_WL_ACTIVE_MODE_SET(x) 		 PTA_COEX_BLUETOOTH_MODE2_WL_ACTIVE_MODE_SET(x)
#define MAC_PCU_BLUETOOTH_MODE2_WL_ACTIVE_MODE_RESET 		 PTA_COEX_BLUETOOTH_MODE2_WL_ACTIVE_MODE_RESET
#define MAC_PCU_BLUETOOTH_MODE2_QUIET_2_WIRE_MSB 		 PTA_COEX_BLUETOOTH_MODE2_QUIET_2_WIRE_MSB
#define MAC_PCU_BLUETOOTH_MODE2_QUIET_2_WIRE_LSB 		 PTA_COEX_BLUETOOTH_MODE2_QUIET_2_WIRE_LSB
#define MAC_PCU_BLUETOOTH_MODE2_QUIET_2_WIRE_MASK 		 PTA_COEX_BLUETOOTH_MODE2_QUIET_2_WIRE_MASK
#define MAC_PCU_BLUETOOTH_MODE2_QUIET_2_WIRE_GET(x) 		 PTA_COEX_BLUETOOTH_MODE2_QUIET_2_WIRE_GET(x)
#define MAC_PCU_BLUETOOTH_MODE2_QUIET_2_WIRE_SET(x) 		 PTA_COEX_BLUETOOTH_MODE2_QUIET_2_WIRE_SET(x)
#define MAC_PCU_BLUETOOTH_MODE2_QUIET_2_WIRE_RESET 		 PTA_COEX_BLUETOOTH_MODE2_QUIET_2_WIRE_RESET
#define MAC_PCU_BLUETOOTH_MODE2_DISABLE_BT_ANT_MSB 		 PTA_COEX_BLUETOOTH_MODE2_DISABLE_BT_ANT_MSB
#define MAC_PCU_BLUETOOTH_MODE2_DISABLE_BT_ANT_LSB 		 PTA_COEX_BLUETOOTH_MODE2_DISABLE_BT_ANT_LSB
#define MAC_PCU_BLUETOOTH_MODE2_DISABLE_BT_ANT_MASK 		 PTA_COEX_BLUETOOTH_MODE2_DISABLE_BT_ANT_MASK
#define MAC_PCU_BLUETOOTH_MODE2_DISABLE_BT_ANT_GET(x) 		 PTA_COEX_BLUETOOTH_MODE2_DISABLE_BT_ANT_GET(x)
#define MAC_PCU_BLUETOOTH_MODE2_DISABLE_BT_ANT_SET(x) 		 PTA_COEX_BLUETOOTH_MODE2_DISABLE_BT_ANT_SET(x)
#define MAC_PCU_BLUETOOTH_MODE2_DISABLE_BT_ANT_RESET 		 PTA_COEX_BLUETOOTH_MODE2_DISABLE_BT_ANT_RESET
#define MAC_PCU_BLUETOOTH_MODE2_PROTECT_BT_AFTER_WAKEUP_MSB 		 PTA_COEX_BLUETOOTH_MODE2_PROTECT_BT_AFTER_WAKEUP_MSB
#define MAC_PCU_BLUETOOTH_MODE2_PROTECT_BT_AFTER_WAKEUP_LSB 		 PTA_COEX_BLUETOOTH_MODE2_PROTECT_BT_AFTER_WAKEUP_LSB
#define MAC_PCU_BLUETOOTH_MODE2_PROTECT_BT_AFTER_WAKEUP_MASK 		 PTA_COEX_BLUETOOTH_MODE2_PROTECT_BT_AFTER_WAKEUP_MASK
#define MAC_PCU_BLUETOOTH_MODE2_PROTECT_BT_AFTER_WAKEUP_GET(x) 		 PTA_COEX_BLUETOOTH_MODE2_PROTECT_BT_AFTER_WAKEUP_GET(x)
#define MAC_PCU_BLUETOOTH_MODE2_PROTECT_BT_AFTER_WAKEUP_SET(x) 		 PTA_COEX_BLUETOOTH_MODE2_PROTECT_BT_AFTER_WAKEUP_SET(x)
#define MAC_PCU_BLUETOOTH_MODE2_PROTECT_BT_AFTER_WAKEUP_RESET 		 PTA_COEX_BLUETOOTH_MODE2_PROTECT_BT_AFTER_WAKEUP_RESET
#define MAC_PCU_BLUETOOTH_MODE2_SLEEP_ALLOW_BT_ACCESS_MSB 		 PTA_COEX_BLUETOOTH_MODE2_SLEEP_ALLOW_BT_ACCESS_MSB
#define MAC_PCU_BLUETOOTH_MODE2_SLEEP_ALLOW_BT_ACCESS_LSB 		 PTA_COEX_BLUETOOTH_MODE2_SLEEP_ALLOW_BT_ACCESS_LSB
#define MAC_PCU_BLUETOOTH_MODE2_SLEEP_ALLOW_BT_ACCESS_MASK 		 PTA_COEX_BLUETOOTH_MODE2_SLEEP_ALLOW_BT_ACCESS_MASK
#define MAC_PCU_BLUETOOTH_MODE2_SLEEP_ALLOW_BT_ACCESS_GET(x) 		 PTA_COEX_BLUETOOTH_MODE2_SLEEP_ALLOW_BT_ACCESS_GET(x)
#define MAC_PCU_BLUETOOTH_MODE2_SLEEP_ALLOW_BT_ACCESS_SET(x) 		 PTA_COEX_BLUETOOTH_MODE2_SLEEP_ALLOW_BT_ACCESS_SET(x)
#define MAC_PCU_BLUETOOTH_MODE2_SLEEP_ALLOW_BT_ACCESS_RESET 		 PTA_COEX_BLUETOOTH_MODE2_SLEEP_ALLOW_BT_ACCESS_RESET
#define MAC_PCU_BLUETOOTH_MODE2_HOLD_RX_CLEAR_MSB 		 PTA_COEX_BLUETOOTH_MODE2_HOLD_RX_CLEAR_MSB
#define MAC_PCU_BLUETOOTH_MODE2_HOLD_RX_CLEAR_LSB 		 PTA_COEX_BLUETOOTH_MODE2_HOLD_RX_CLEAR_LSB
#define MAC_PCU_BLUETOOTH_MODE2_HOLD_RX_CLEAR_MASK 		 PTA_COEX_BLUETOOTH_MODE2_HOLD_RX_CLEAR_MASK
#define MAC_PCU_BLUETOOTH_MODE2_HOLD_RX_CLEAR_GET(x) 		 PTA_COEX_BLUETOOTH_MODE2_HOLD_RX_CLEAR_GET(x)
#define MAC_PCU_BLUETOOTH_MODE2_HOLD_RX_CLEAR_SET(x) 		 PTA_COEX_BLUETOOTH_MODE2_HOLD_RX_CLEAR_SET(x)
#define MAC_PCU_BLUETOOTH_MODE2_HOLD_RX_CLEAR_RESET 		 PTA_COEX_BLUETOOTH_MODE2_HOLD_RX_CLEAR_RESET
#define MAC_PCU_BLUETOOTH_MODE2_BCN_MISS_CNT_MSB 		 PTA_COEX_BLUETOOTH_MODE2_BCN_MISS_CNT_MSB
#define MAC_PCU_BLUETOOTH_MODE2_BCN_MISS_CNT_LSB 		 PTA_COEX_BLUETOOTH_MODE2_BCN_MISS_CNT_LSB
#define MAC_PCU_BLUETOOTH_MODE2_BCN_MISS_CNT_MASK 		 PTA_COEX_BLUETOOTH_MODE2_BCN_MISS_CNT_MASK
#define MAC_PCU_BLUETOOTH_MODE2_BCN_MISS_CNT_GET(x) 		 PTA_COEX_BLUETOOTH_MODE2_BCN_MISS_CNT_GET(x)
#define MAC_PCU_BLUETOOTH_MODE2_BCN_MISS_CNT_SET(x) 		 PTA_COEX_BLUETOOTH_MODE2_BCN_MISS_CNT_SET(x)
#define MAC_PCU_BLUETOOTH_MODE2_BCN_MISS_CNT_RESET 		 PTA_COEX_BLUETOOTH_MODE2_BCN_MISS_CNT_RESET
#define MAC_PCU_BLUETOOTH_MODE2_BCN_MISS_THRESH_MSB 		 PTA_COEX_BLUETOOTH_MODE2_BCN_MISS_THRESH_MSB
#define MAC_PCU_BLUETOOTH_MODE2_BCN_MISS_THRESH_LSB 		 PTA_COEX_BLUETOOTH_MODE2_BCN_MISS_THRESH_LSB
#define MAC_PCU_BLUETOOTH_MODE2_BCN_MISS_THRESH_MASK 		 PTA_COEX_BLUETOOTH_MODE2_BCN_MISS_THRESH_MASK
#define MAC_PCU_BLUETOOTH_MODE2_BCN_MISS_THRESH_GET(x) 		 PTA_COEX_BLUETOOTH_MODE2_BCN_MISS_THRESH_GET(x)
#define MAC_PCU_BLUETOOTH_MODE2_BCN_MISS_THRESH_SET(x) 		 PTA_COEX_BLUETOOTH_MODE2_BCN_MISS_THRESH_SET(x)
#define MAC_PCU_BLUETOOTH_MODE2_BCN_MISS_THRESH_RESET 		 PTA_COEX_BLUETOOTH_MODE2_BCN_MISS_THRESH_RESET
#define MAC_PCU_BLUETOOTH_MODE2_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BLUETOOTH_MODE2_ADDRESS
// SW modifiable bits
#define MAC_PCU_BLUETOOTH_MODE2_SW_MASK 		 PTA_COEX_BLUETOOTH_MODE2_SW_MASK
// bits defined at reset
#define MAC_PCU_BLUETOOTH_MODE2_RSTMASK 		 PTA_COEX_BLUETOOTH_MODE2_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BLUETOOTH_MODE2_RESET 		 PTA_COEX_BLUETOOTH_MODE2_RESET

// 32'h81c8 (MAC_PCU_BLUETOOTH_TSF_BT_ACTIVE)
#define MAC_PCU_BLUETOOTH_TSF_BT_ACTIVE_VALUE_MSB 		 PTA_COEX_BLUETOOTH_TSF_BT_ACTIVE_VALUE_MSB
#define MAC_PCU_BLUETOOTH_TSF_BT_ACTIVE_VALUE_LSB 		 PTA_COEX_BLUETOOTH_TSF_BT_ACTIVE_VALUE_LSB
#define MAC_PCU_BLUETOOTH_TSF_BT_ACTIVE_VALUE_MASK 		 PTA_COEX_BLUETOOTH_TSF_BT_ACTIVE_VALUE_MASK
#define MAC_PCU_BLUETOOTH_TSF_BT_ACTIVE_VALUE_GET(x) 		 PTA_COEX_BLUETOOTH_TSF_BT_ACTIVE_VALUE_GET(x)
#define MAC_PCU_BLUETOOTH_TSF_BT_ACTIVE_VALUE_SET(x) 		 PTA_COEX_BLUETOOTH_TSF_BT_ACTIVE_VALUE_SET(x)
#define MAC_PCU_BLUETOOTH_TSF_BT_ACTIVE_VALUE_RESET 		 PTA_COEX_BLUETOOTH_TSF_BT_ACTIVE_VALUE_RESET
#define MAC_PCU_BLUETOOTH_TSF_BT_ACTIVE_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BLUETOOTH_TSF_BT_ACTIVE_ADDRESS
#define MAC_PCU_BLUETOOTH_TSF_BT_ACTIVE_OFFSET 		 PTA_COEX_BLUETOOTH_TSF_BT_ACTIVE_OFFSET
// SW modifiable bits
#define MAC_PCU_BLUETOOTH_TSF_BT_ACTIVE_SW_MASK 		 PTA_COEX_BLUETOOTH_TSF_BT_ACTIVE_SW_MASK
// bits defined at reset
#define MAC_PCU_BLUETOOTH_TSF_BT_ACTIVE_RSTMASK 		 PTA_COEX_BLUETOOTH_TSF_BT_ACTIVE_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BLUETOOTH_TSF_BT_ACTIVE_RESET 		 PTA_COEX_BLUETOOTH_TSF_BT_ACTIVE_RESET

// 32'h81cc (MAC_PCU_BLUETOOTH_TSF_BT_PRIORITY)
#define MAC_PCU_BLUETOOTH_TSF_BT_PRIORITY_VALUE_MSB 		 PTA_COEX_BLUETOOTH_TSF_BT_PRIORITY_VALUE_MSB
#define MAC_PCU_BLUETOOTH_TSF_BT_PRIORITY_VALUE_LSB 		 PTA_COEX_BLUETOOTH_TSF_BT_PRIORITY_VALUE_LSB
#define MAC_PCU_BLUETOOTH_TSF_BT_PRIORITY_VALUE_MASK 		 PTA_COEX_BLUETOOTH_TSF_BT_PRIORITY_VALUE_MASK
#define MAC_PCU_BLUETOOTH_TSF_BT_PRIORITY_VALUE_GET(x) 		 PTA_COEX_BLUETOOTH_TSF_BT_PRIORITY_VALUE_GET(x)
#define MAC_PCU_BLUETOOTH_TSF_BT_PRIORITY_VALUE_SET(x) 		 PTA_COEX_BLUETOOTH_TSF_BT_PRIORITY_VALUE_SET(x)
#define MAC_PCU_BLUETOOTH_TSF_BT_PRIORITY_VALUE_RESET 		 PTA_COEX_BLUETOOTH_TSF_BT_PRIORITY_VALUE_RESET
#define MAC_PCU_BLUETOOTH_TSF_BT_PRIORITY_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BLUETOOTH_TSF_BT_PRIORITY_ADDRESS
// SW modifiable bits
#define MAC_PCU_BLUETOOTH_TSF_BT_PRIORITY_SW_MASK 		 PTA_COEX_BLUETOOTH_TSF_BT_PRIORITY_SW_MASK
// bits defined at reset
#define MAC_PCU_BLUETOOTH_TSF_BT_PRIORITY_RSTMASK 		 PTA_COEX_BLUETOOTH_TSF_BT_PRIORITY_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BLUETOOTH_TSF_BT_PRIORITY_RESET 		 PTA_COEX_BLUETOOTH_TSF_BT_PRIORITY_RESET

// 32'h81d0 (MAC_PCU_TXSIFS)
#define MAC_PCU_TXSIFS_ACK_SHIFT_MSB 		 TXPCU_TXSIFS_ACK_SHIFT_MSB
#define MAC_PCU_TXSIFS_ACK_SHIFT_LSB 		 TXPCU_TXSIFS_ACK_SHIFT_LSB
#define MAC_PCU_TXSIFS_ACK_SHIFT_MASK 		 TXPCU_TXSIFS_ACK_SHIFT_MASK
#define MAC_PCU_TXSIFS_ACK_SHIFT_GET(x) 		 TXPCU_TXSIFS_ACK_SHIFT_GET(x)
#define MAC_PCU_TXSIFS_ACK_SHIFT_SET(x) 		 TXPCU_TXSIFS_ACK_SHIFT_SET(x)
#define MAC_PCU_TXSIFS_ACK_SHIFT_RESET 		 TXPCU_TXSIFS_ACK_SHIFT_RESET
#define MAC_PCU_TXSIFS_TX_LATENCY_MSB 		 TXPCU_TXSIFS_TX_LATENCY_MSB
#define MAC_PCU_TXSIFS_TX_LATENCY_LSB 		 TXPCU_TXSIFS_TX_LATENCY_LSB
#define MAC_PCU_TXSIFS_TX_LATENCY_MASK 		 TXPCU_TXSIFS_TX_LATENCY_MASK
#define MAC_PCU_TXSIFS_TX_LATENCY_GET(x) 		 TXPCU_TXSIFS_TX_LATENCY_GET(x)
#define MAC_PCU_TXSIFS_TX_LATENCY_SET(x) 		 TXPCU_TXSIFS_TX_LATENCY_SET(x)
#define MAC_PCU_TXSIFS_TX_LATENCY_RESET 		 TXPCU_TXSIFS_TX_LATENCY_RESET
#define MAC_PCU_TXSIFS_SIFS_TIME_MSB 		 TXPCU_TXSIFS_SIFS_TIME_MSB
#define MAC_PCU_TXSIFS_SIFS_TIME_LSB 		 TXPCU_TXSIFS_SIFS_TIME_LSB
#define MAC_PCU_TXSIFS_SIFS_TIME_MASK 		 TXPCU_TXSIFS_SIFS_TIME_MASK
#define MAC_PCU_TXSIFS_SIFS_TIME_GET(x) 		 TXPCU_TXSIFS_SIFS_TIME_GET(x)
#define MAC_PCU_TXSIFS_SIFS_TIME_SET(x) 		 TXPCU_TXSIFS_SIFS_TIME_SET(x)
#define MAC_PCU_TXSIFS_SIFS_TIME_RESET 		 TXPCU_TXSIFS_SIFS_TIME_RESET
#define MAC_PCU_TXSIFS_ADDRESS 		 MAC_TXPCU_BASE_ADDRESS+TXPCU_TXSIFS_ADDRESS
// SW modifiable bits
#define MAC_PCU_TXSIFS_SW_MASK 		 TXPCU_TXSIFS_SW_MASK
// bits defined at reset
#define MAC_PCU_TXSIFS_RSTMASK 		 TXPCU_TXSIFS_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_TXSIFS_RESET 		 TXPCU_TXSIFS_RESET

// 32'h81d4 (MAC_PCU_BLUETOOTH_MODE3)
#define MAC_PCU_BLUETOOTH_MODE3_BT_PRIORITY_EXTEND_THRES_MSB 		 PTA_COEX_BLUETOOTH_MODE3_BT_PRIORITY_EXTEND_THRES_MSB
#define MAC_PCU_BLUETOOTH_MODE3_BT_PRIORITY_EXTEND_THRES_LSB 		 PTA_COEX_BLUETOOTH_MODE3_BT_PRIORITY_EXTEND_THRES_LSB
#define MAC_PCU_BLUETOOTH_MODE3_BT_PRIORITY_EXTEND_THRES_MASK 		 PTA_COEX_BLUETOOTH_MODE3_BT_PRIORITY_EXTEND_THRES_MASK
#define MAC_PCU_BLUETOOTH_MODE3_BT_PRIORITY_EXTEND_THRES_GET(x) 		 PTA_COEX_BLUETOOTH_MODE3_BT_PRIORITY_EXTEND_THRES_GET(x)
#define MAC_PCU_BLUETOOTH_MODE3_BT_PRIORITY_EXTEND_THRES_SET(x) 		 PTA_COEX_BLUETOOTH_MODE3_BT_PRIORITY_EXTEND_THRES_SET(x)
#define MAC_PCU_BLUETOOTH_MODE3_BT_PRIORITY_EXTEND_THRES_RESET 		 PTA_COEX_BLUETOOTH_MODE3_BT_PRIORITY_EXTEND_THRES_RESET
#define MAC_PCU_BLUETOOTH_MODE3_BT_TX_ON_EN_MSB 		 PTA_COEX_BLUETOOTH_MODE3_BT_TX_ON_EN_MSB
#define MAC_PCU_BLUETOOTH_MODE3_BT_TX_ON_EN_LSB 		 PTA_COEX_BLUETOOTH_MODE3_BT_TX_ON_EN_LSB
#define MAC_PCU_BLUETOOTH_MODE3_BT_TX_ON_EN_MASK 		 PTA_COEX_BLUETOOTH_MODE3_BT_TX_ON_EN_MASK
#define MAC_PCU_BLUETOOTH_MODE3_BT_TX_ON_EN_GET(x) 		 PTA_COEX_BLUETOOTH_MODE3_BT_TX_ON_EN_GET(x)
#define MAC_PCU_BLUETOOTH_MODE3_BT_TX_ON_EN_SET(x) 		 PTA_COEX_BLUETOOTH_MODE3_BT_TX_ON_EN_SET(x)
#define MAC_PCU_BLUETOOTH_MODE3_BT_TX_ON_EN_RESET 		 PTA_COEX_BLUETOOTH_MODE3_BT_TX_ON_EN_RESET
#define MAC_PCU_BLUETOOTH_MODE3_SLOT_SLOP_MSB 		 PTA_COEX_BLUETOOTH_MODE3_SLOT_SLOP_MSB
#define MAC_PCU_BLUETOOTH_MODE3_SLOT_SLOP_LSB 		 PTA_COEX_BLUETOOTH_MODE3_SLOT_SLOP_LSB
#define MAC_PCU_BLUETOOTH_MODE3_SLOT_SLOP_MASK 		 PTA_COEX_BLUETOOTH_MODE3_SLOT_SLOP_MASK
#define MAC_PCU_BLUETOOTH_MODE3_SLOT_SLOP_GET(x) 		 PTA_COEX_BLUETOOTH_MODE3_SLOT_SLOP_GET(x)
#define MAC_PCU_BLUETOOTH_MODE3_SLOT_SLOP_SET(x) 		 PTA_COEX_BLUETOOTH_MODE3_SLOT_SLOP_SET(x)
#define MAC_PCU_BLUETOOTH_MODE3_SLOT_SLOP_RESET 		 PTA_COEX_BLUETOOTH_MODE3_SLOT_SLOP_RESET
#define MAC_PCU_BLUETOOTH_MODE3_DYNAMIC_TOGGLE_WLA_EN_MSB 		 PTA_COEX_BLUETOOTH_MODE3_DYNAMIC_TOGGLE_WLA_EN_MSB
#define MAC_PCU_BLUETOOTH_MODE3_DYNAMIC_TOGGLE_WLA_EN_LSB 		 PTA_COEX_BLUETOOTH_MODE3_DYNAMIC_TOGGLE_WLA_EN_LSB
#define MAC_PCU_BLUETOOTH_MODE3_DYNAMIC_TOGGLE_WLA_EN_MASK 		 PTA_COEX_BLUETOOTH_MODE3_DYNAMIC_TOGGLE_WLA_EN_MASK
#define MAC_PCU_BLUETOOTH_MODE3_DYNAMIC_TOGGLE_WLA_EN_GET(x) 		 PTA_COEX_BLUETOOTH_MODE3_DYNAMIC_TOGGLE_WLA_EN_GET(x)
#define MAC_PCU_BLUETOOTH_MODE3_DYNAMIC_TOGGLE_WLA_EN_SET(x) 		 PTA_COEX_BLUETOOTH_MODE3_DYNAMIC_TOGGLE_WLA_EN_SET(x)
#define MAC_PCU_BLUETOOTH_MODE3_DYNAMIC_TOGGLE_WLA_EN_RESET 		 PTA_COEX_BLUETOOTH_MODE3_DYNAMIC_TOGGLE_WLA_EN_RESET
#define MAC_PCU_BLUETOOTH_MODE3_DYNAMIC_PRI_EN_MSB 		 PTA_COEX_BLUETOOTH_MODE3_DYNAMIC_PRI_EN_MSB
#define MAC_PCU_BLUETOOTH_MODE3_DYNAMIC_PRI_EN_LSB 		 PTA_COEX_BLUETOOTH_MODE3_DYNAMIC_PRI_EN_LSB
#define MAC_PCU_BLUETOOTH_MODE3_DYNAMIC_PRI_EN_MASK 		 PTA_COEX_BLUETOOTH_MODE3_DYNAMIC_PRI_EN_MASK
#define MAC_PCU_BLUETOOTH_MODE3_DYNAMIC_PRI_EN_GET(x) 		 PTA_COEX_BLUETOOTH_MODE3_DYNAMIC_PRI_EN_GET(x)
#define MAC_PCU_BLUETOOTH_MODE3_DYNAMIC_PRI_EN_SET(x) 		 PTA_COEX_BLUETOOTH_MODE3_DYNAMIC_PRI_EN_SET(x)
#define MAC_PCU_BLUETOOTH_MODE3_DYNAMIC_PRI_EN_RESET 		 PTA_COEX_BLUETOOTH_MODE3_DYNAMIC_PRI_EN_RESET
#define MAC_PCU_BLUETOOTH_MODE3_WL_PRIORITY_OFFSET_EN_MSB 		 PTA_COEX_BLUETOOTH_MODE3_WL_PRIORITY_OFFSET_EN_MSB
#define MAC_PCU_BLUETOOTH_MODE3_WL_PRIORITY_OFFSET_EN_LSB 		 PTA_COEX_BLUETOOTH_MODE3_WL_PRIORITY_OFFSET_EN_LSB
#define MAC_PCU_BLUETOOTH_MODE3_WL_PRIORITY_OFFSET_EN_MASK 		 PTA_COEX_BLUETOOTH_MODE3_WL_PRIORITY_OFFSET_EN_MASK
#define MAC_PCU_BLUETOOTH_MODE3_WL_PRIORITY_OFFSET_EN_GET(x) 		 PTA_COEX_BLUETOOTH_MODE3_WL_PRIORITY_OFFSET_EN_GET(x)
#define MAC_PCU_BLUETOOTH_MODE3_WL_PRIORITY_OFFSET_EN_SET(x) 		 PTA_COEX_BLUETOOTH_MODE3_WL_PRIORITY_OFFSET_EN_SET(x)
#define MAC_PCU_BLUETOOTH_MODE3_WL_PRIORITY_OFFSET_EN_RESET 		 PTA_COEX_BLUETOOTH_MODE3_WL_PRIORITY_OFFSET_EN_RESET
#define MAC_PCU_BLUETOOTH_MODE3_AGC_SATURATION_CNT_ENABLE_MSB 		 PTA_COEX_BLUETOOTH_MODE3_AGC_SATURATION_CNT_ENABLE_MSB
#define MAC_PCU_BLUETOOTH_MODE3_AGC_SATURATION_CNT_ENABLE_LSB 		 PTA_COEX_BLUETOOTH_MODE3_AGC_SATURATION_CNT_ENABLE_LSB
#define MAC_PCU_BLUETOOTH_MODE3_AGC_SATURATION_CNT_ENABLE_MASK 		 PTA_COEX_BLUETOOTH_MODE3_AGC_SATURATION_CNT_ENABLE_MASK
#define MAC_PCU_BLUETOOTH_MODE3_AGC_SATURATION_CNT_ENABLE_GET(x) 		 PTA_COEX_BLUETOOTH_MODE3_AGC_SATURATION_CNT_ENABLE_GET(x)
#define MAC_PCU_BLUETOOTH_MODE3_AGC_SATURATION_CNT_ENABLE_SET(x) 		 PTA_COEX_BLUETOOTH_MODE3_AGC_SATURATION_CNT_ENABLE_SET(x)
#define MAC_PCU_BLUETOOTH_MODE3_AGC_SATURATION_CNT_ENABLE_RESET 		 PTA_COEX_BLUETOOTH_MODE3_AGC_SATURATION_CNT_ENABLE_RESET
#define MAC_PCU_BLUETOOTH_MODE3_ALLOW_CONCURRENT_ACCESS_MSB 		 PTA_COEX_BLUETOOTH_MODE3_ALLOW_CONCURRENT_ACCESS_MSB
#define MAC_PCU_BLUETOOTH_MODE3_ALLOW_CONCURRENT_ACCESS_LSB 		 PTA_COEX_BLUETOOTH_MODE3_ALLOW_CONCURRENT_ACCESS_LSB
#define MAC_PCU_BLUETOOTH_MODE3_ALLOW_CONCURRENT_ACCESS_MASK 		 PTA_COEX_BLUETOOTH_MODE3_ALLOW_CONCURRENT_ACCESS_MASK
#define MAC_PCU_BLUETOOTH_MODE3_ALLOW_CONCURRENT_ACCESS_GET(x) 		 PTA_COEX_BLUETOOTH_MODE3_ALLOW_CONCURRENT_ACCESS_GET(x)
#define MAC_PCU_BLUETOOTH_MODE3_ALLOW_CONCURRENT_ACCESS_SET(x) 		 PTA_COEX_BLUETOOTH_MODE3_ALLOW_CONCURRENT_ACCESS_SET(x)
#define MAC_PCU_BLUETOOTH_MODE3_ALLOW_CONCURRENT_ACCESS_RESET 		 PTA_COEX_BLUETOOTH_MODE3_ALLOW_CONCURRENT_ACCESS_RESET
#define MAC_PCU_BLUETOOTH_MODE3_WL_QC_TIME_MSB 		 PTA_COEX_BLUETOOTH_MODE3_WL_QC_TIME_MSB
#define MAC_PCU_BLUETOOTH_MODE3_WL_QC_TIME_LSB 		 PTA_COEX_BLUETOOTH_MODE3_WL_QC_TIME_LSB
#define MAC_PCU_BLUETOOTH_MODE3_WL_QC_TIME_MASK 		 PTA_COEX_BLUETOOTH_MODE3_WL_QC_TIME_MASK
#define MAC_PCU_BLUETOOTH_MODE3_WL_QC_TIME_GET(x) 		 PTA_COEX_BLUETOOTH_MODE3_WL_QC_TIME_GET(x)
#define MAC_PCU_BLUETOOTH_MODE3_WL_QC_TIME_SET(x) 		 PTA_COEX_BLUETOOTH_MODE3_WL_QC_TIME_SET(x)
#define MAC_PCU_BLUETOOTH_MODE3_WL_QC_TIME_RESET 		 PTA_COEX_BLUETOOTH_MODE3_WL_QC_TIME_RESET
#define MAC_PCU_BLUETOOTH_MODE3_WL_ACTIVE_TIME_MSB 		 PTA_COEX_BLUETOOTH_MODE3_WL_ACTIVE_TIME_MSB
#define MAC_PCU_BLUETOOTH_MODE3_WL_ACTIVE_TIME_LSB 		 PTA_COEX_BLUETOOTH_MODE3_WL_ACTIVE_TIME_LSB
#define MAC_PCU_BLUETOOTH_MODE3_WL_ACTIVE_TIME_MASK 		 PTA_COEX_BLUETOOTH_MODE3_WL_ACTIVE_TIME_MASK
#define MAC_PCU_BLUETOOTH_MODE3_WL_ACTIVE_TIME_GET(x) 		 PTA_COEX_BLUETOOTH_MODE3_WL_ACTIVE_TIME_GET(x)
#define MAC_PCU_BLUETOOTH_MODE3_WL_ACTIVE_TIME_SET(x) 		 PTA_COEX_BLUETOOTH_MODE3_WL_ACTIVE_TIME_SET(x)
#define MAC_PCU_BLUETOOTH_MODE3_WL_ACTIVE_TIME_RESET 		 PTA_COEX_BLUETOOTH_MODE3_WL_ACTIVE_TIME_RESET
#define MAC_PCU_BLUETOOTH_MODE3_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BLUETOOTH_MODE3_ADDRESS
// SW modifiable bits
#define MAC_PCU_BLUETOOTH_MODE3_SW_MASK 		 PTA_COEX_BLUETOOTH_MODE3_SW_MASK
// bits defined at reset
#define MAC_PCU_BLUETOOTH_MODE3_RSTMASK 		 PTA_COEX_BLUETOOTH_MODE3_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BLUETOOTH_MODE3_RESET 		 PTA_COEX_BLUETOOTH_MODE3_RESET

// 32'h81d8 (MAC_PCU_BLUETOOTH_MODE4)
#define MAC_PCU_BLUETOOTH_MODE4_BT_PRIORITY_EXTEND_MSB 		 PTA_COEX_BLUETOOTH_MODE4_BT_PRIORITY_EXTEND_MSB
#define MAC_PCU_BLUETOOTH_MODE4_BT_PRIORITY_EXTEND_LSB 		 PTA_COEX_BLUETOOTH_MODE4_BT_PRIORITY_EXTEND_LSB
#define MAC_PCU_BLUETOOTH_MODE4_BT_PRIORITY_EXTEND_MASK 		 PTA_COEX_BLUETOOTH_MODE4_BT_PRIORITY_EXTEND_MASK
#define MAC_PCU_BLUETOOTH_MODE4_BT_PRIORITY_EXTEND_GET(x) 		 PTA_COEX_BLUETOOTH_MODE4_BT_PRIORITY_EXTEND_GET(x)
#define MAC_PCU_BLUETOOTH_MODE4_BT_PRIORITY_EXTEND_SET(x) 		 PTA_COEX_BLUETOOTH_MODE4_BT_PRIORITY_EXTEND_SET(x)
#define MAC_PCU_BLUETOOTH_MODE4_BT_PRIORITY_EXTEND_RESET 		 PTA_COEX_BLUETOOTH_MODE4_BT_PRIORITY_EXTEND_RESET
#define MAC_PCU_BLUETOOTH_MODE4_BT_ACTIVE_EXTEND_MSB 		 PTA_COEX_BLUETOOTH_MODE4_BT_ACTIVE_EXTEND_MSB
#define MAC_PCU_BLUETOOTH_MODE4_BT_ACTIVE_EXTEND_LSB 		 PTA_COEX_BLUETOOTH_MODE4_BT_ACTIVE_EXTEND_LSB
#define MAC_PCU_BLUETOOTH_MODE4_BT_ACTIVE_EXTEND_MASK 		 PTA_COEX_BLUETOOTH_MODE4_BT_ACTIVE_EXTEND_MASK
#define MAC_PCU_BLUETOOTH_MODE4_BT_ACTIVE_EXTEND_GET(x) 		 PTA_COEX_BLUETOOTH_MODE4_BT_ACTIVE_EXTEND_GET(x)
#define MAC_PCU_BLUETOOTH_MODE4_BT_ACTIVE_EXTEND_SET(x) 		 PTA_COEX_BLUETOOTH_MODE4_BT_ACTIVE_EXTEND_SET(x)
#define MAC_PCU_BLUETOOTH_MODE4_BT_ACTIVE_EXTEND_RESET 		 PTA_COEX_BLUETOOTH_MODE4_BT_ACTIVE_EXTEND_RESET
#define MAC_PCU_BLUETOOTH_MODE4_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BLUETOOTH_MODE4_ADDRESS
// SW modifiable bits
#define MAC_PCU_BLUETOOTH_MODE4_SW_MASK 		 PTA_COEX_BLUETOOTH_MODE4_SW_MASK
// bits defined at reset
#define MAC_PCU_BLUETOOTH_MODE4_RSTMASK 		 PTA_COEX_BLUETOOTH_MODE4_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BLUETOOTH_MODE4_RESET 		 PTA_COEX_BLUETOOTH_MODE4_RESET

// 32'h81dc (MAC_PCU_BLUETOOTH_MODE5)
#define MAC_PCU_BLUETOOTH_MODE5_FORCE_RX_CLEAR_VAL_MSB 		 PTA_COEX_BLUETOOTH_MODE5_FORCE_RX_CLEAR_VAL_MSB
#define MAC_PCU_BLUETOOTH_MODE5_FORCE_RX_CLEAR_VAL_LSB 		 PTA_COEX_BLUETOOTH_MODE5_FORCE_RX_CLEAR_VAL_LSB
#define MAC_PCU_BLUETOOTH_MODE5_FORCE_RX_CLEAR_VAL_MASK 		 PTA_COEX_BLUETOOTH_MODE5_FORCE_RX_CLEAR_VAL_MASK
#define MAC_PCU_BLUETOOTH_MODE5_FORCE_RX_CLEAR_VAL_GET(x) 		 PTA_COEX_BLUETOOTH_MODE5_FORCE_RX_CLEAR_VAL_GET(x)
#define MAC_PCU_BLUETOOTH_MODE5_FORCE_RX_CLEAR_VAL_SET(x) 		 PTA_COEX_BLUETOOTH_MODE5_FORCE_RX_CLEAR_VAL_SET(x)
#define MAC_PCU_BLUETOOTH_MODE5_FORCE_RX_CLEAR_VAL_RESET 		 PTA_COEX_BLUETOOTH_MODE5_FORCE_RX_CLEAR_VAL_RESET
#define MAC_PCU_BLUETOOTH_MODE5_FORCE_RX_CLEAR_EN_MSB 		 PTA_COEX_BLUETOOTH_MODE5_FORCE_RX_CLEAR_EN_MSB
#define MAC_PCU_BLUETOOTH_MODE5_FORCE_RX_CLEAR_EN_LSB 		 PTA_COEX_BLUETOOTH_MODE5_FORCE_RX_CLEAR_EN_LSB
#define MAC_PCU_BLUETOOTH_MODE5_FORCE_RX_CLEAR_EN_MASK 		 PTA_COEX_BLUETOOTH_MODE5_FORCE_RX_CLEAR_EN_MASK
#define MAC_PCU_BLUETOOTH_MODE5_FORCE_RX_CLEAR_EN_GET(x) 		 PTA_COEX_BLUETOOTH_MODE5_FORCE_RX_CLEAR_EN_GET(x)
#define MAC_PCU_BLUETOOTH_MODE5_FORCE_RX_CLEAR_EN_SET(x) 		 PTA_COEX_BLUETOOTH_MODE5_FORCE_RX_CLEAR_EN_SET(x)
#define MAC_PCU_BLUETOOTH_MODE5_FORCE_RX_CLEAR_EN_RESET 		 PTA_COEX_BLUETOOTH_MODE5_FORCE_RX_CLEAR_EN_RESET
#define MAC_PCU_BLUETOOTH_MODE5_USE_D2_SLEEP_MSB 		 PTA_COEX_BLUETOOTH_MODE5_USE_D2_SLEEP_MSB
#define MAC_PCU_BLUETOOTH_MODE5_USE_D2_SLEEP_LSB 		 PTA_COEX_BLUETOOTH_MODE5_USE_D2_SLEEP_LSB
#define MAC_PCU_BLUETOOTH_MODE5_USE_D2_SLEEP_MASK 		 PTA_COEX_BLUETOOTH_MODE5_USE_D2_SLEEP_MASK
#define MAC_PCU_BLUETOOTH_MODE5_USE_D2_SLEEP_GET(x) 		 PTA_COEX_BLUETOOTH_MODE5_USE_D2_SLEEP_GET(x)
#define MAC_PCU_BLUETOOTH_MODE5_USE_D2_SLEEP_SET(x) 		 PTA_COEX_BLUETOOTH_MODE5_USE_D2_SLEEP_SET(x)
#define MAC_PCU_BLUETOOTH_MODE5_USE_D2_SLEEP_RESET 		 PTA_COEX_BLUETOOTH_MODE5_USE_D2_SLEEP_RESET
#define MAC_PCU_BLUETOOTH_MODE5_USE_BTP_EXT_MSB 		 PTA_COEX_BLUETOOTH_MODE5_USE_BTP_EXT_MSB
#define MAC_PCU_BLUETOOTH_MODE5_USE_BTP_EXT_LSB 		 PTA_COEX_BLUETOOTH_MODE5_USE_BTP_EXT_LSB
#define MAC_PCU_BLUETOOTH_MODE5_USE_BTP_EXT_MASK 		 PTA_COEX_BLUETOOTH_MODE5_USE_BTP_EXT_MASK
#define MAC_PCU_BLUETOOTH_MODE5_USE_BTP_EXT_GET(x) 		 PTA_COEX_BLUETOOTH_MODE5_USE_BTP_EXT_GET(x)
#define MAC_PCU_BLUETOOTH_MODE5_USE_BTP_EXT_SET(x) 		 PTA_COEX_BLUETOOTH_MODE5_USE_BTP_EXT_SET(x)
#define MAC_PCU_BLUETOOTH_MODE5_USE_BTP_EXT_RESET 		 PTA_COEX_BLUETOOTH_MODE5_USE_BTP_EXT_RESET
#define MAC_PCU_BLUETOOTH_MODE5_SHARED_RX_MSB 		 PTA_COEX_BLUETOOTH_MODE5_SHARED_RX_MSB
#define MAC_PCU_BLUETOOTH_MODE5_SHARED_RX_LSB 		 PTA_COEX_BLUETOOTH_MODE5_SHARED_RX_LSB
#define MAC_PCU_BLUETOOTH_MODE5_SHARED_RX_MASK 		 PTA_COEX_BLUETOOTH_MODE5_SHARED_RX_MASK
#define MAC_PCU_BLUETOOTH_MODE5_SHARED_RX_GET(x) 		 PTA_COEX_BLUETOOTH_MODE5_SHARED_RX_GET(x)
#define MAC_PCU_BLUETOOTH_MODE5_SHARED_RX_SET(x) 		 PTA_COEX_BLUETOOTH_MODE5_SHARED_RX_SET(x)
#define MAC_PCU_BLUETOOTH_MODE5_SHARED_RX_RESET 		 PTA_COEX_BLUETOOTH_MODE5_SHARED_RX_RESET
#define MAC_PCU_BLUETOOTH_MODE5_TIMER_TARGET_MSB 		 PTA_COEX_BLUETOOTH_MODE5_TIMER_TARGET_MSB
#define MAC_PCU_BLUETOOTH_MODE5_TIMER_TARGET_LSB 		 PTA_COEX_BLUETOOTH_MODE5_TIMER_TARGET_LSB
#define MAC_PCU_BLUETOOTH_MODE5_TIMER_TARGET_MASK 		 PTA_COEX_BLUETOOTH_MODE5_TIMER_TARGET_MASK
#define MAC_PCU_BLUETOOTH_MODE5_TIMER_TARGET_GET(x) 		 PTA_COEX_BLUETOOTH_MODE5_TIMER_TARGET_GET(x)
#define MAC_PCU_BLUETOOTH_MODE5_TIMER_TARGET_SET(x) 		 PTA_COEX_BLUETOOTH_MODE5_TIMER_TARGET_SET(x)
#define MAC_PCU_BLUETOOTH_MODE5_TIMER_TARGET_RESET 		 PTA_COEX_BLUETOOTH_MODE5_TIMER_TARGET_RESET
#define MAC_PCU_BLUETOOTH_MODE5_TX_ON_SRC_MSB 		 PTA_COEX_BLUETOOTH_MODE5_TX_ON_SRC_MSB
#define MAC_PCU_BLUETOOTH_MODE5_TX_ON_SRC_LSB 		 PTA_COEX_BLUETOOTH_MODE5_TX_ON_SRC_LSB
#define MAC_PCU_BLUETOOTH_MODE5_TX_ON_SRC_MASK 		 PTA_COEX_BLUETOOTH_MODE5_TX_ON_SRC_MASK
#define MAC_PCU_BLUETOOTH_MODE5_TX_ON_SRC_GET(x) 		 PTA_COEX_BLUETOOTH_MODE5_TX_ON_SRC_GET(x)
#define MAC_PCU_BLUETOOTH_MODE5_TX_ON_SRC_SET(x) 		 PTA_COEX_BLUETOOTH_MODE5_TX_ON_SRC_SET(x)
#define MAC_PCU_BLUETOOTH_MODE5_TX_ON_SRC_RESET 		 PTA_COEX_BLUETOOTH_MODE5_TX_ON_SRC_RESET
#define MAC_PCU_BLUETOOTH_MODE5_MCI_WL_LEVEL_MULT_MSB 		 PTA_COEX_BLUETOOTH_MODE5_MCI_WL_LEVEL_MULT_MSB
#define MAC_PCU_BLUETOOTH_MODE5_MCI_WL_LEVEL_MULT_LSB 		 PTA_COEX_BLUETOOTH_MODE5_MCI_WL_LEVEL_MULT_LSB
#define MAC_PCU_BLUETOOTH_MODE5_MCI_WL_LEVEL_MULT_MASK 		 PTA_COEX_BLUETOOTH_MODE5_MCI_WL_LEVEL_MULT_MASK
#define MAC_PCU_BLUETOOTH_MODE5_MCI_WL_LEVEL_MULT_GET(x) 		 PTA_COEX_BLUETOOTH_MODE5_MCI_WL_LEVEL_MULT_GET(x)
#define MAC_PCU_BLUETOOTH_MODE5_MCI_WL_LEVEL_MULT_SET(x) 		 PTA_COEX_BLUETOOTH_MODE5_MCI_WL_LEVEL_MULT_SET(x)
#define MAC_PCU_BLUETOOTH_MODE5_MCI_WL_LEVEL_MULT_RESET 		 PTA_COEX_BLUETOOTH_MODE5_MCI_WL_LEVEL_MULT_RESET
#define MAC_PCU_BLUETOOTH_MODE5_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BLUETOOTH_MODE5_ADDRESS
// SW modifiable bits
#define MAC_PCU_BLUETOOTH_MODE5_SW_MASK 		 PTA_COEX_BLUETOOTH_MODE5_SW_MASK
// bits defined at reset
#define MAC_PCU_BLUETOOTH_MODE5_RSTMASK 		 PTA_COEX_BLUETOOTH_MODE5_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BLUETOOTH_MODE5_RESET 		 PTA_COEX_BLUETOOTH_MODE5_RESET

// 32'h81e4 (MAC_PCU_BT_BT_ASYNC)
#define MAC_PCU_BT_BT_ASYNC_RXLP_WEIGHT_MSB 		 PTA_COEX_BT_BT_ASYNC_RXLP_WEIGHT_MSB
#define MAC_PCU_BT_BT_ASYNC_RXLP_WEIGHT_MSB 		 PTA_COEX_BT_BT_ASYNC_RXLP_WEIGHT_MSB
#define MAC_PCU_BT_BT_ASYNC_RXLP_WEIGHT_LSB 		 PTA_COEX_BT_BT_ASYNC_RXLP_WEIGHT_LSB
#define MAC_PCU_BT_BT_ASYNC_RXLP_WEIGHT_LSB 		 PTA_COEX_BT_BT_ASYNC_RXLP_WEIGHT_LSB
#define MAC_PCU_BT_BT_ASYNC_RXLP_WEIGHT_MASK 		 PTA_COEX_BT_BT_ASYNC_RXLP_WEIGHT_MASK
#define MAC_PCU_BT_BT_ASYNC_RXLP_WEIGHT_MASK 		 PTA_COEX_BT_BT_ASYNC_RXLP_WEIGHT_MASK
#define MAC_PCU_BT_BT_ASYNC_RXLP_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_ASYNC_RXLP_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_ASYNC_RXLP_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_ASYNC_RXLP_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_ASYNC_RXLP_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_ASYNC_RXLP_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_ASYNC_RXLP_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_ASYNC_RXLP_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_ASYNC_RXLP_WEIGHT_RESET 		 PTA_COEX_BT_BT_ASYNC_RXLP_WEIGHT_RESET
#define MAC_PCU_BT_BT_ASYNC_RXLP_WEIGHT_RESET 		 PTA_COEX_BT_BT_ASYNC_RXLP_WEIGHT_RESET
#define MAC_PCU_BT_BT_ASYNC_RXHP_WEIGHT_MSB 		 PTA_COEX_BT_BT_ASYNC_RXHP_WEIGHT_MSB
#define MAC_PCU_BT_BT_ASYNC_RXHP_WEIGHT_MSB 		 PTA_COEX_BT_BT_ASYNC_RXHP_WEIGHT_MSB
#define MAC_PCU_BT_BT_ASYNC_RXHP_WEIGHT_LSB 		 PTA_COEX_BT_BT_ASYNC_RXHP_WEIGHT_LSB
#define MAC_PCU_BT_BT_ASYNC_RXHP_WEIGHT_LSB 		 PTA_COEX_BT_BT_ASYNC_RXHP_WEIGHT_LSB
#define MAC_PCU_BT_BT_ASYNC_RXHP_WEIGHT_MASK 		 PTA_COEX_BT_BT_ASYNC_RXHP_WEIGHT_MASK
#define MAC_PCU_BT_BT_ASYNC_RXHP_WEIGHT_MASK 		 PTA_COEX_BT_BT_ASYNC_RXHP_WEIGHT_MASK
#define MAC_PCU_BT_BT_ASYNC_RXHP_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_ASYNC_RXHP_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_ASYNC_RXHP_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_ASYNC_RXHP_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_ASYNC_RXHP_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_ASYNC_RXHP_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_ASYNC_RXHP_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_ASYNC_RXHP_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_ASYNC_RXHP_WEIGHT_RESET 		 PTA_COEX_BT_BT_ASYNC_RXHP_WEIGHT_RESET
#define MAC_PCU_BT_BT_ASYNC_RXHP_WEIGHT_RESET 		 PTA_COEX_BT_BT_ASYNC_RXHP_WEIGHT_RESET
#define MAC_PCU_BT_BT_ASYNC_TXLP_WEIGHT_MSB 		 PTA_COEX_BT_BT_ASYNC_TXLP_WEIGHT_MSB
#define MAC_PCU_BT_BT_ASYNC_TXLP_WEIGHT_MSB 		 PTA_COEX_BT_BT_ASYNC_TXLP_WEIGHT_MSB
#define MAC_PCU_BT_BT_ASYNC_TXLP_WEIGHT_LSB 		 PTA_COEX_BT_BT_ASYNC_TXLP_WEIGHT_LSB
#define MAC_PCU_BT_BT_ASYNC_TXLP_WEIGHT_LSB 		 PTA_COEX_BT_BT_ASYNC_TXLP_WEIGHT_LSB
#define MAC_PCU_BT_BT_ASYNC_TXLP_WEIGHT_MASK 		 PTA_COEX_BT_BT_ASYNC_TXLP_WEIGHT_MASK
#define MAC_PCU_BT_BT_ASYNC_TXLP_WEIGHT_MASK 		 PTA_COEX_BT_BT_ASYNC_TXLP_WEIGHT_MASK
#define MAC_PCU_BT_BT_ASYNC_TXLP_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_ASYNC_TXLP_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_ASYNC_TXLP_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_ASYNC_TXLP_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_ASYNC_TXLP_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_ASYNC_TXLP_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_ASYNC_TXLP_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_ASYNC_TXLP_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_ASYNC_TXLP_WEIGHT_RESET 		 PTA_COEX_BT_BT_ASYNC_TXLP_WEIGHT_RESET
#define MAC_PCU_BT_BT_ASYNC_TXLP_WEIGHT_RESET 		 PTA_COEX_BT_BT_ASYNC_TXLP_WEIGHT_RESET
#define MAC_PCU_BT_BT_ASYNC_TXHP_WEIGHT_MSB 		 PTA_COEX_BT_BT_ASYNC_TXHP_WEIGHT_MSB
#define MAC_PCU_BT_BT_ASYNC_TXHP_WEIGHT_MSB 		 PTA_COEX_BT_BT_ASYNC_TXHP_WEIGHT_MSB
#define MAC_PCU_BT_BT_ASYNC_TXHP_WEIGHT_LSB 		 PTA_COEX_BT_BT_ASYNC_TXHP_WEIGHT_LSB
#define MAC_PCU_BT_BT_ASYNC_TXHP_WEIGHT_LSB 		 PTA_COEX_BT_BT_ASYNC_TXHP_WEIGHT_LSB
#define MAC_PCU_BT_BT_ASYNC_TXHP_WEIGHT_MASK 		 PTA_COEX_BT_BT_ASYNC_TXHP_WEIGHT_MASK
#define MAC_PCU_BT_BT_ASYNC_TXHP_WEIGHT_MASK 		 PTA_COEX_BT_BT_ASYNC_TXHP_WEIGHT_MASK
#define MAC_PCU_BT_BT_ASYNC_TXHP_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_ASYNC_TXHP_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_ASYNC_TXHP_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_ASYNC_TXHP_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_ASYNC_TXHP_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_ASYNC_TXHP_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_ASYNC_TXHP_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_ASYNC_TXHP_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_ASYNC_TXHP_WEIGHT_RESET 		 PTA_COEX_BT_BT_ASYNC_TXHP_WEIGHT_RESET
#define MAC_PCU_BT_BT_ASYNC_TXHP_WEIGHT_RESET 		 PTA_COEX_BT_BT_ASYNC_TXHP_WEIGHT_RESET
#define MAC_PCU_BT_BT_ASYNC_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_ASYNC_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_ASYNC_SW_MASK 		 PTA_COEX_BT_BT_ASYNC_SW_MASK
#define MAC_PCU_BT_BT_ASYNC_SW_MASK 		 PTA_COEX_BT_BT_ASYNC_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_ASYNC_RSTMASK 		 PTA_COEX_BT_BT_ASYNC_RSTMASK
#define MAC_PCU_BT_BT_ASYNC_RSTMASK 		 PTA_COEX_BT_BT_ASYNC_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_ASYNC_RESET 		 PTA_COEX_BT_BT_ASYNC_RESET
#define MAC_PCU_BT_BT_ASYNC_RESET 		 PTA_COEX_BT_BT_ASYNC_RESET

// 32'h829c (MAC_PCU_PHY_ERR_CNT_1_MASK_CONT)
#define MAC_PCU_PHY_ERR_CNT_1_MASK_CONT_VALUE_MSB 		 RXPCU_PHY_ERR_CNT_1_MASK_CONT_VALUE_MSB
#define MAC_PCU_PHY_ERR_CNT_1_MASK_CONT_VALUE_LSB 		 RXPCU_PHY_ERR_CNT_1_MASK_CONT_VALUE_LSB
#define MAC_PCU_PHY_ERR_CNT_1_MASK_CONT_VALUE_MASK 		 RXPCU_PHY_ERR_CNT_1_MASK_CONT_VALUE_MASK
#define MAC_PCU_PHY_ERR_CNT_1_MASK_CONT_VALUE_GET(x) 		 RXPCU_PHY_ERR_CNT_1_MASK_CONT_VALUE_GET(x)
#define MAC_PCU_PHY_ERR_CNT_1_MASK_CONT_VALUE_SET(x) 		 RXPCU_PHY_ERR_CNT_1_MASK_CONT_VALUE_SET(x)
#define MAC_PCU_PHY_ERR_CNT_1_MASK_CONT_VALUE_RESET 		 RXPCU_PHY_ERR_CNT_1_MASK_CONT_VALUE_RESET
#define MAC_PCU_PHY_ERR_CNT_1_MASK_CONT_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_PHY_ERR_CNT_1_MASK_CONT_ADDRESS
// SW modifiable bits
#define MAC_PCU_PHY_ERR_CNT_1_MASK_CONT_SW_MASK 		 RXPCU_PHY_ERR_CNT_1_MASK_CONT_SW_MASK
// bits defined at reset
#define MAC_PCU_PHY_ERR_CNT_1_MASK_CONT_RSTMASK 		 RXPCU_PHY_ERR_CNT_1_MASK_CONT_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_PHY_ERR_CNT_1_MASK_CONT_RESET 		 RXPCU_PHY_ERR_CNT_1_MASK_CONT_RESET

// 32'h832c (MAC_PCU_SELF_GEN_ANTENNA_MASK)
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_M_ACK_VALUE_MSB 		 TXPCU_SELF_GEN_ANTENNA_MASK_M_ACK_VALUE_MSB
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_M_ACK_VALUE_LSB 		 TXPCU_SELF_GEN_ANTENNA_MASK_M_ACK_VALUE_LSB
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_M_ACK_VALUE_MASK 		 TXPCU_SELF_GEN_ANTENNA_MASK_M_ACK_VALUE_MASK
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_M_ACK_VALUE_GET(x) 		 TXPCU_SELF_GEN_ANTENNA_MASK_M_ACK_VALUE_GET(x)
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_M_ACK_VALUE_SET(x) 		 TXPCU_SELF_GEN_ANTENNA_MASK_M_ACK_VALUE_SET(x)
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_M_ACK_VALUE_RESET 		 TXPCU_SELF_GEN_ANTENNA_MASK_M_ACK_VALUE_RESET
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_FORCE_CHAIN_0_MSB 		 TXPCU_SELF_GEN_ANTENNA_MASK_FORCE_CHAIN_0_MSB
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_FORCE_CHAIN_0_LSB 		 TXPCU_SELF_GEN_ANTENNA_MASK_FORCE_CHAIN_0_LSB
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_FORCE_CHAIN_0_MASK 		 TXPCU_SELF_GEN_ANTENNA_MASK_FORCE_CHAIN_0_MASK
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_FORCE_CHAIN_0_GET(x) 		 TXPCU_SELF_GEN_ANTENNA_MASK_FORCE_CHAIN_0_GET(x)
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_FORCE_CHAIN_0_SET(x) 		 TXPCU_SELF_GEN_ANTENNA_MASK_FORCE_CHAIN_0_SET(x)
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_FORCE_CHAIN_0_RESET 		 TXPCU_SELF_GEN_ANTENNA_MASK_FORCE_CHAIN_0_RESET
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_ONE_RESP_EN_MSB 		 TXPCU_SELF_GEN_ANTENNA_MASK_ONE_RESP_EN_MSB
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_ONE_RESP_EN_LSB 		 TXPCU_SELF_GEN_ANTENNA_MASK_ONE_RESP_EN_LSB
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_ONE_RESP_EN_MASK 		 TXPCU_SELF_GEN_ANTENNA_MASK_ONE_RESP_EN_MASK
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_ONE_RESP_EN_GET(x) 		 TXPCU_SELF_GEN_ANTENNA_MASK_ONE_RESP_EN_GET(x)
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_ONE_RESP_EN_SET(x) 		 TXPCU_SELF_GEN_ANTENNA_MASK_ONE_RESP_EN_SET(x)
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_ONE_RESP_EN_RESET 		 TXPCU_SELF_GEN_ANTENNA_MASK_ONE_RESP_EN_RESET
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_VALUE_MSB 		 TXPCU_SELF_GEN_ANTENNA_MASK_VALUE_MSB
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_VALUE_LSB 		 TXPCU_SELF_GEN_ANTENNA_MASK_VALUE_LSB
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_VALUE_MASK 		 TXPCU_SELF_GEN_ANTENNA_MASK_VALUE_MASK
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_VALUE_GET(x) 		 TXPCU_SELF_GEN_ANTENNA_MASK_VALUE_GET(x)
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_VALUE_SET(x) 		 TXPCU_SELF_GEN_ANTENNA_MASK_VALUE_SET(x)
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_VALUE_RESET 		 TXPCU_SELF_GEN_ANTENNA_MASK_VALUE_RESET
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_ADDRESS 		 MAC_TXPCU_BASE_ADDRESS+TXPCU_SELF_GEN_ANTENNA_MASK_ADDRESS
// SW modifiable bits
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_SW_MASK 		 TXPCU_SELF_GEN_ANTENNA_MASK_SW_MASK
// bits defined at reset
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_RSTMASK 		 TXPCU_SELF_GEN_ANTENNA_MASK_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_SELF_GEN_ANTENNA_MASK_RESET 		 TXPCU_SELF_GEN_ANTENNA_MASK_RESET

// 32'h8330 (MAC_PCU_BA_BAR_CONTROL)
#define MAC_PCU_BA_BAR_CONTROL_SEARCH_DEPTH_MSB 		 RXPCU_BA_BAR_CONTROL_SEARCH_DEPTH_MSB
#define MAC_PCU_BA_BAR_CONTROL_SEARCH_DEPTH_LSB 		 RXPCU_BA_BAR_CONTROL_SEARCH_DEPTH_LSB
#define MAC_PCU_BA_BAR_CONTROL_SEARCH_DEPTH_MASK 		 RXPCU_BA_BAR_CONTROL_SEARCH_DEPTH_MASK
#define MAC_PCU_BA_BAR_CONTROL_SEARCH_DEPTH_GET(x) 		 RXPCU_BA_BAR_CONTROL_SEARCH_DEPTH_GET(x)
#define MAC_PCU_BA_BAR_CONTROL_SEARCH_DEPTH_SET(x) 		 RXPCU_BA_BAR_CONTROL_SEARCH_DEPTH_SET(x)
#define MAC_PCU_BA_BAR_CONTROL_SEARCH_DEPTH_RESET 		 RXPCU_BA_BAR_CONTROL_SEARCH_DEPTH_RESET
#define MAC_PCU_BA_BAR_CONTROL_UPDATE_BA_BITMAP_QOS_NULL_MSB 		 RXPCU_BA_BAR_CONTROL_UPDATE_BA_BITMAP_QOS_NULL_MSB
#define MAC_PCU_BA_BAR_CONTROL_UPDATE_BA_BITMAP_QOS_NULL_LSB 		 RXPCU_BA_BAR_CONTROL_UPDATE_BA_BITMAP_QOS_NULL_LSB
#define MAC_PCU_BA_BAR_CONTROL_UPDATE_BA_BITMAP_QOS_NULL_MASK 		 RXPCU_BA_BAR_CONTROL_UPDATE_BA_BITMAP_QOS_NULL_MASK
#define MAC_PCU_BA_BAR_CONTROL_UPDATE_BA_BITMAP_QOS_NULL_GET(x) 		 RXPCU_BA_BAR_CONTROL_UPDATE_BA_BITMAP_QOS_NULL_GET(x)
#define MAC_PCU_BA_BAR_CONTROL_UPDATE_BA_BITMAP_QOS_NULL_SET(x) 		 RXPCU_BA_BAR_CONTROL_UPDATE_BA_BITMAP_QOS_NULL_SET(x)
#define MAC_PCU_BA_BAR_CONTROL_UPDATE_BA_BITMAP_QOS_NULL_RESET 		 RXPCU_BA_BAR_CONTROL_UPDATE_BA_BITMAP_QOS_NULL_RESET
#define MAC_PCU_BA_BAR_CONTROL_TX_BA_CLEAR_BA_VALID_MSB 		 RXPCU_BA_BAR_CONTROL_TX_BA_CLEAR_BA_VALID_MSB
#define MAC_PCU_BA_BAR_CONTROL_TX_BA_CLEAR_BA_VALID_LSB 		 RXPCU_BA_BAR_CONTROL_TX_BA_CLEAR_BA_VALID_LSB
#define MAC_PCU_BA_BAR_CONTROL_TX_BA_CLEAR_BA_VALID_MASK 		 RXPCU_BA_BAR_CONTROL_TX_BA_CLEAR_BA_VALID_MASK
#define MAC_PCU_BA_BAR_CONTROL_TX_BA_CLEAR_BA_VALID_GET(x) 		 RXPCU_BA_BAR_CONTROL_TX_BA_CLEAR_BA_VALID_GET(x)
#define MAC_PCU_BA_BAR_CONTROL_TX_BA_CLEAR_BA_VALID_SET(x) 		 RXPCU_BA_BAR_CONTROL_TX_BA_CLEAR_BA_VALID_SET(x)
#define MAC_PCU_BA_BAR_CONTROL_TX_BA_CLEAR_BA_VALID_RESET 		 RXPCU_BA_BAR_CONTROL_TX_BA_CLEAR_BA_VALID_RESET
#define MAC_PCU_BA_BAR_CONTROL_FORCE_NO_MATCH_MSB 		 RXPCU_BA_BAR_CONTROL_FORCE_NO_MATCH_MSB
#define MAC_PCU_BA_BAR_CONTROL_FORCE_NO_MATCH_LSB 		 RXPCU_BA_BAR_CONTROL_FORCE_NO_MATCH_LSB
#define MAC_PCU_BA_BAR_CONTROL_FORCE_NO_MATCH_MASK 		 RXPCU_BA_BAR_CONTROL_FORCE_NO_MATCH_MASK
#define MAC_PCU_BA_BAR_CONTROL_FORCE_NO_MATCH_GET(x) 		 RXPCU_BA_BAR_CONTROL_FORCE_NO_MATCH_GET(x)
#define MAC_PCU_BA_BAR_CONTROL_FORCE_NO_MATCH_SET(x) 		 RXPCU_BA_BAR_CONTROL_FORCE_NO_MATCH_SET(x)
#define MAC_PCU_BA_BAR_CONTROL_FORCE_NO_MATCH_RESET 		 RXPCU_BA_BAR_CONTROL_FORCE_NO_MATCH_RESET
#define MAC_PCU_BA_BAR_CONTROL_ACK_POLICY_VALUE_MSB 		 RXPCU_BA_BAR_CONTROL_ACK_POLICY_VALUE_MSB
#define MAC_PCU_BA_BAR_CONTROL_ACK_POLICY_VALUE_LSB 		 RXPCU_BA_BAR_CONTROL_ACK_POLICY_VALUE_LSB
#define MAC_PCU_BA_BAR_CONTROL_ACK_POLICY_VALUE_MASK 		 RXPCU_BA_BAR_CONTROL_ACK_POLICY_VALUE_MASK
#define MAC_PCU_BA_BAR_CONTROL_ACK_POLICY_VALUE_GET(x) 		 RXPCU_BA_BAR_CONTROL_ACK_POLICY_VALUE_GET(x)
#define MAC_PCU_BA_BAR_CONTROL_ACK_POLICY_VALUE_SET(x) 		 RXPCU_BA_BAR_CONTROL_ACK_POLICY_VALUE_SET(x)
#define MAC_PCU_BA_BAR_CONTROL_ACK_POLICY_VALUE_RESET 		 RXPCU_BA_BAR_CONTROL_ACK_POLICY_VALUE_RESET
#define MAC_PCU_BA_BAR_CONTROL_COMPRESSED_VALUE_MSB 		 RXPCU_BA_BAR_CONTROL_COMPRESSED_VALUE_MSB
#define MAC_PCU_BA_BAR_CONTROL_COMPRESSED_VALUE_LSB 		 RXPCU_BA_BAR_CONTROL_COMPRESSED_VALUE_LSB
#define MAC_PCU_BA_BAR_CONTROL_COMPRESSED_VALUE_MASK 		 RXPCU_BA_BAR_CONTROL_COMPRESSED_VALUE_MASK
#define MAC_PCU_BA_BAR_CONTROL_COMPRESSED_VALUE_GET(x) 		 RXPCU_BA_BAR_CONTROL_COMPRESSED_VALUE_GET(x)
#define MAC_PCU_BA_BAR_CONTROL_COMPRESSED_VALUE_SET(x) 		 RXPCU_BA_BAR_CONTROL_COMPRESSED_VALUE_SET(x)
#define MAC_PCU_BA_BAR_CONTROL_COMPRESSED_VALUE_RESET 		 RXPCU_BA_BAR_CONTROL_COMPRESSED_VALUE_RESET
#define MAC_PCU_BA_BAR_CONTROL_ACK_POLICY_OFFSET_MSB 		 RXPCU_BA_BAR_CONTROL_ACK_POLICY_OFFSET_MSB
#define MAC_PCU_BA_BAR_CONTROL_ACK_POLICY_OFFSET_LSB 		 RXPCU_BA_BAR_CONTROL_ACK_POLICY_OFFSET_LSB
#define MAC_PCU_BA_BAR_CONTROL_ACK_POLICY_OFFSET_MASK 		 RXPCU_BA_BAR_CONTROL_ACK_POLICY_OFFSET_MASK
#define MAC_PCU_BA_BAR_CONTROL_ACK_POLICY_OFFSET_GET(x) 		 RXPCU_BA_BAR_CONTROL_ACK_POLICY_OFFSET_GET(x)
#define MAC_PCU_BA_BAR_CONTROL_ACK_POLICY_OFFSET_SET(x) 		 RXPCU_BA_BAR_CONTROL_ACK_POLICY_OFFSET_SET(x)
#define MAC_PCU_BA_BAR_CONTROL_ACK_POLICY_OFFSET_RESET 		 RXPCU_BA_BAR_CONTROL_ACK_POLICY_OFFSET_RESET
#define MAC_PCU_BA_BAR_CONTROL_COMPRESSED_OFFSET_MSB 		 RXPCU_BA_BAR_CONTROL_COMPRESSED_OFFSET_MSB
#define MAC_PCU_BA_BAR_CONTROL_COMPRESSED_OFFSET_LSB 		 RXPCU_BA_BAR_CONTROL_COMPRESSED_OFFSET_LSB
#define MAC_PCU_BA_BAR_CONTROL_COMPRESSED_OFFSET_MASK 		 RXPCU_BA_BAR_CONTROL_COMPRESSED_OFFSET_MASK
#define MAC_PCU_BA_BAR_CONTROL_COMPRESSED_OFFSET_GET(x) 		 RXPCU_BA_BAR_CONTROL_COMPRESSED_OFFSET_GET(x)
#define MAC_PCU_BA_BAR_CONTROL_COMPRESSED_OFFSET_SET(x) 		 RXPCU_BA_BAR_CONTROL_COMPRESSED_OFFSET_SET(x)
#define MAC_PCU_BA_BAR_CONTROL_COMPRESSED_OFFSET_RESET 		 RXPCU_BA_BAR_CONTROL_COMPRESSED_OFFSET_RESET
#define MAC_PCU_BA_BAR_CONTROL_ADDRESS 		                 MAC_RXPCU_BASE_ADDRESS+RXPCU_BA_BAR_CONTROL_ADDRESS
// SW modifiable bits
#define MAC_PCU_BA_BAR_CONTROL_SW_MASK 		 RXPCU_BA_BAR_CONTROL_SW_MASK
// bits defined at reset
#define MAC_PCU_BA_BAR_CONTROL_RSTMASK 		 RXPCU_BA_BAR_CONTROL_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BA_BAR_CONTROL_RESET 		 RXPCU_BA_BAR_CONTROL_RESET

// 32'h8338 (MAC_PCU_PHY_ERROR_MASK_CONT)
#define MAC_PCU_PHY_ERROR_MASK_CONT_VALUE_MSB 		 RXPCU_PHY_ERROR_MASK_CONT_VALUE_MSB
#define MAC_PCU_PHY_ERROR_MASK_CONT_VALUE_LSB 		 RXPCU_PHY_ERROR_MASK_CONT_VALUE_LSB
#define MAC_PCU_PHY_ERROR_MASK_CONT_VALUE_MASK 		 RXPCU_PHY_ERROR_MASK_CONT_VALUE_MASK
#define MAC_PCU_PHY_ERROR_MASK_CONT_VALUE_GET(x) 		 RXPCU_PHY_ERROR_MASK_CONT_VALUE_GET(x)
#define MAC_PCU_PHY_ERROR_MASK_CONT_VALUE_SET(x) 		 RXPCU_PHY_ERROR_MASK_CONT_VALUE_SET(x)
#define MAC_PCU_PHY_ERROR_MASK_CONT_VALUE_RESET 		 RXPCU_PHY_ERROR_MASK_CONT_VALUE_RESET
#define MAC_PCU_PHY_ERROR_MASK_CONT_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_PHY_ERROR_MASK_CONT_ADDRESS
// SW modifiable bits
#define MAC_PCU_PHY_ERROR_MASK_CONT_SW_MASK 		 RXPCU_PHY_ERROR_MASK_CONT_SW_MASK
// bits defined at reset
#define MAC_PCU_PHY_ERROR_MASK_CONT_RSTMASK 		 RXPCU_PHY_ERROR_MASK_CONT_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_PHY_ERROR_MASK_CONT_RESET 		 RXPCU_PHY_ERROR_MASK_CONT_RESET

// 32'h8344 (MAC_PCU_MISC_MODE2)
#define MAC_PCU_MISC_MODE2_CLEAR_WEP_TXBUSY_ON_TXURN_MSB 		 RXPCU_MISC_MODE2_CLEAR_WEP_TXBUSY_ON_TXURN_MSB
#define MAC_PCU_MISC_MODE2_CLEAR_WEP_TXBUSY_ON_TXURN_LSB 		 RXPCU_MISC_MODE2_CLEAR_WEP_TXBUSY_ON_TXURN_LSB
#define MAC_PCU_MISC_MODE2_CLEAR_WEP_TXBUSY_ON_TXURN_MASK 		 RXPCU_MISC_MODE2_CLEAR_WEP_TXBUSY_ON_TXURN_MASK
#define MAC_PCU_MISC_MODE2_CLEAR_WEP_TXBUSY_ON_TXURN_GET(x) 		 RXPCU_MISC_MODE2_CLEAR_WEP_TXBUSY_ON_TXURN_GET(x)
#define MAC_PCU_MISC_MODE2_CLEAR_WEP_TXBUSY_ON_TXURN_SET(x) 		 RXPCU_MISC_MODE2_CLEAR_WEP_TXBUSY_ON_TXURN_SET(x)
#define MAC_PCU_MISC_MODE2_CLEAR_WEP_TXBUSY_ON_TXURN_RESET 		 RXPCU_MISC_MODE2_CLEAR_WEP_TXBUSY_ON_TXURN_RESET
#define MAC_PCU_MISC_MODE2_PCU_LOOP_TXBF_MSB 		 RXPCU_MISC_MODE2_PCU_LOOP_TXBF_MSB
#define MAC_PCU_MISC_MODE2_PCU_LOOP_TXBF_LSB 		 RXPCU_MISC_MODE2_PCU_LOOP_TXBF_LSB
#define MAC_PCU_MISC_MODE2_PCU_LOOP_TXBF_MASK 		 RXPCU_MISC_MODE2_PCU_LOOP_TXBF_MASK
#define MAC_PCU_MISC_MODE2_PCU_LOOP_TXBF_GET(x) 		 RXPCU_MISC_MODE2_PCU_LOOP_TXBF_GET(x)
#define MAC_PCU_MISC_MODE2_PCU_LOOP_TXBF_SET(x) 		 RXPCU_MISC_MODE2_PCU_LOOP_TXBF_SET(x)
#define MAC_PCU_MISC_MODE2_PCU_LOOP_TXBF_RESET 		 RXPCU_MISC_MODE2_PCU_LOOP_TXBF_RESET
#define MAC_PCU_MISC_MODE2_TXBF_ACT_RPT_DONE_PASS_MSB 		 RXPCU_MISC_MODE2_TXBF_ACT_RPT_DONE_PASS_MSB
#define MAC_PCU_MISC_MODE2_TXBF_ACT_RPT_DONE_PASS_LSB 		 RXPCU_MISC_MODE2_TXBF_ACT_RPT_DONE_PASS_LSB
#define MAC_PCU_MISC_MODE2_TXBF_ACT_RPT_DONE_PASS_MASK 		 RXPCU_MISC_MODE2_TXBF_ACT_RPT_DONE_PASS_MASK
#define MAC_PCU_MISC_MODE2_TXBF_ACT_RPT_DONE_PASS_GET(x) 		 RXPCU_MISC_MODE2_TXBF_ACT_RPT_DONE_PASS_GET(x)
#define MAC_PCU_MISC_MODE2_TXBF_ACT_RPT_DONE_PASS_SET(x) 		 RXPCU_MISC_MODE2_TXBF_ACT_RPT_DONE_PASS_SET(x)
#define MAC_PCU_MISC_MODE2_TXBF_ACT_RPT_DONE_PASS_RESET 		 RXPCU_MISC_MODE2_TXBF_ACT_RPT_DONE_PASS_RESET
#define MAC_PCU_MISC_MODE2_H_TO_SW_DEBUG_MODE_MSB 		 RXPCU_MISC_MODE2_H_TO_SW_DEBUG_MODE_MSB
#define MAC_PCU_MISC_MODE2_H_TO_SW_DEBUG_MODE_LSB 		 RXPCU_MISC_MODE2_H_TO_SW_DEBUG_MODE_LSB
#define MAC_PCU_MISC_MODE2_H_TO_SW_DEBUG_MODE_MASK 		 RXPCU_MISC_MODE2_H_TO_SW_DEBUG_MODE_MASK
#define MAC_PCU_MISC_MODE2_H_TO_SW_DEBUG_MODE_GET(x) 		 RXPCU_MISC_MODE2_H_TO_SW_DEBUG_MODE_GET(x)
#define MAC_PCU_MISC_MODE2_H_TO_SW_DEBUG_MODE_SET(x) 		 RXPCU_MISC_MODE2_H_TO_SW_DEBUG_MODE_SET(x)
#define MAC_PCU_MISC_MODE2_H_TO_SW_DEBUG_MODE_RESET 		 RXPCU_MISC_MODE2_H_TO_SW_DEBUG_MODE_RESET
#define MAC_PCU_MISC_MODE2_DECOUPLE_DECRYPTION_MSB 		 RXPCU_MISC_MODE2_DECOUPLE_DECRYPTION_MSB
#define MAC_PCU_MISC_MODE2_DECOUPLE_DECRYPTION_LSB 		 RXPCU_MISC_MODE2_DECOUPLE_DECRYPTION_LSB
#define MAC_PCU_MISC_MODE2_DECOUPLE_DECRYPTION_MASK 		 RXPCU_MISC_MODE2_DECOUPLE_DECRYPTION_MASK
#define MAC_PCU_MISC_MODE2_DECOUPLE_DECRYPTION_GET(x) 		 RXPCU_MISC_MODE2_DECOUPLE_DECRYPTION_GET(x)
#define MAC_PCU_MISC_MODE2_DECOUPLE_DECRYPTION_SET(x) 		 RXPCU_MISC_MODE2_DECOUPLE_DECRYPTION_SET(x)
#define MAC_PCU_MISC_MODE2_DECOUPLE_DECRYPTION_RESET 		 RXPCU_MISC_MODE2_DECOUPLE_DECRYPTION_RESET
#define MAC_PCU_MISC_MODE2_RCV_TIMESTAMP_FIX_MSB 		 RXPCU_MISC_MODE2_RCV_TIMESTAMP_FIX_MSB
#define MAC_PCU_MISC_MODE2_RCV_TIMESTAMP_FIX_LSB 		 RXPCU_MISC_MODE2_RCV_TIMESTAMP_FIX_LSB
#define MAC_PCU_MISC_MODE2_RCV_TIMESTAMP_FIX_MASK 		 RXPCU_MISC_MODE2_RCV_TIMESTAMP_FIX_MASK
#define MAC_PCU_MISC_MODE2_RCV_TIMESTAMP_FIX_GET(x) 		 RXPCU_MISC_MODE2_RCV_TIMESTAMP_FIX_GET(x)
#define MAC_PCU_MISC_MODE2_RCV_TIMESTAMP_FIX_SET(x) 		 RXPCU_MISC_MODE2_RCV_TIMESTAMP_FIX_SET(x)
#define MAC_PCU_MISC_MODE2_RCV_TIMESTAMP_FIX_RESET 		 RXPCU_MISC_MODE2_RCV_TIMESTAMP_FIX_RESET
#define MAC_PCU_MISC_MODE2_MPDU_DENSITY_WAIT_WEP_MSB 		 RXPCU_MISC_MODE2_MPDU_DENSITY_WAIT_WEP_MSB
#define MAC_PCU_MISC_MODE2_MPDU_DENSITY_WAIT_WEP_LSB 		 RXPCU_MISC_MODE2_MPDU_DENSITY_WAIT_WEP_LSB
#define MAC_PCU_MISC_MODE2_MPDU_DENSITY_WAIT_WEP_MASK 		 RXPCU_MISC_MODE2_MPDU_DENSITY_WAIT_WEP_MASK
#define MAC_PCU_MISC_MODE2_MPDU_DENSITY_WAIT_WEP_GET(x) 		 RXPCU_MISC_MODE2_MPDU_DENSITY_WAIT_WEP_GET(x)
#define MAC_PCU_MISC_MODE2_MPDU_DENSITY_WAIT_WEP_SET(x) 		 RXPCU_MISC_MODE2_MPDU_DENSITY_WAIT_WEP_SET(x)
#define MAC_PCU_MISC_MODE2_MPDU_DENSITY_WAIT_WEP_RESET 		 RXPCU_MISC_MODE2_MPDU_DENSITY_WAIT_WEP_RESET
#define MAC_PCU_MISC_MODE2_MPDU_DENSITY_STS_FIX_MSB 		 RXPCU_MISC_MODE2_MPDU_DENSITY_STS_FIX_MSB
#define MAC_PCU_MISC_MODE2_MPDU_DENSITY_STS_FIX_LSB 		 RXPCU_MISC_MODE2_MPDU_DENSITY_STS_FIX_LSB
#define MAC_PCU_MISC_MODE2_MPDU_DENSITY_STS_FIX_MASK 		 RXPCU_MISC_MODE2_MPDU_DENSITY_STS_FIX_MASK
#define MAC_PCU_MISC_MODE2_MPDU_DENSITY_STS_FIX_GET(x) 		 RXPCU_MISC_MODE2_MPDU_DENSITY_STS_FIX_GET(x)
#define MAC_PCU_MISC_MODE2_MPDU_DENSITY_STS_FIX_SET(x) 		 RXPCU_MISC_MODE2_MPDU_DENSITY_STS_FIX_SET(x)
#define MAC_PCU_MISC_MODE2_MPDU_DENSITY_STS_FIX_RESET 		 RXPCU_MISC_MODE2_MPDU_DENSITY_STS_FIX_RESET
#define MAC_PCU_MISC_MODE2_IGNORE_TXOP_1ST_PKT_MSB 		 RXPCU_MISC_MODE2_IGNORE_TXOP_1ST_PKT_MSB
#define MAC_PCU_MISC_MODE2_IGNORE_TXOP_1ST_PKT_LSB 		 RXPCU_MISC_MODE2_IGNORE_TXOP_1ST_PKT_LSB
#define MAC_PCU_MISC_MODE2_IGNORE_TXOP_1ST_PKT_MASK 		 RXPCU_MISC_MODE2_IGNORE_TXOP_1ST_PKT_MASK
#define MAC_PCU_MISC_MODE2_IGNORE_TXOP_1ST_PKT_GET(x) 		 RXPCU_MISC_MODE2_IGNORE_TXOP_1ST_PKT_GET(x)
#define MAC_PCU_MISC_MODE2_IGNORE_TXOP_1ST_PKT_SET(x) 		 RXPCU_MISC_MODE2_IGNORE_TXOP_1ST_PKT_SET(x)
#define MAC_PCU_MISC_MODE2_IGNORE_TXOP_1ST_PKT_RESET 		 RXPCU_MISC_MODE2_IGNORE_TXOP_1ST_PKT_RESET
#define MAC_PCU_MISC_MODE2_CLEAR_MORE_FRAG_MSB 		 RXPCU_MISC_MODE2_CLEAR_MORE_FRAG_MSB
#define MAC_PCU_MISC_MODE2_CLEAR_MORE_FRAG_LSB 		 RXPCU_MISC_MODE2_CLEAR_MORE_FRAG_LSB
#define MAC_PCU_MISC_MODE2_CLEAR_MORE_FRAG_MASK 		 RXPCU_MISC_MODE2_CLEAR_MORE_FRAG_MASK
#define MAC_PCU_MISC_MODE2_CLEAR_MORE_FRAG_GET(x) 		 RXPCU_MISC_MODE2_CLEAR_MORE_FRAG_GET(x)
#define MAC_PCU_MISC_MODE2_CLEAR_MORE_FRAG_SET(x) 		 RXPCU_MISC_MODE2_CLEAR_MORE_FRAG_SET(x)
#define MAC_PCU_MISC_MODE2_CLEAR_MORE_FRAG_RESET 		 RXPCU_MISC_MODE2_CLEAR_MORE_FRAG_RESET
#define MAC_PCU_MISC_MODE2_BUG_28676_MSB 		 RXPCU_MISC_MODE2_BUG_28676_MSB
#define MAC_PCU_MISC_MODE2_BUG_28676_LSB 		 RXPCU_MISC_MODE2_BUG_28676_LSB
#define MAC_PCU_MISC_MODE2_BUG_28676_MASK 		 RXPCU_MISC_MODE2_BUG_28676_MASK
#define MAC_PCU_MISC_MODE2_BUG_28676_GET(x) 		 RXPCU_MISC_MODE2_BUG_28676_GET(x)
#define MAC_PCU_MISC_MODE2_BUG_28676_SET(x) 		 RXPCU_MISC_MODE2_BUG_28676_SET(x)
#define MAC_PCU_MISC_MODE2_BUG_28676_RESET 		 RXPCU_MISC_MODE2_BUG_28676_RESET
#define MAC_PCU_MISC_MODE2_DUR_ACCOUNT_BY_BA_MSB 		 RXPCU_MISC_MODE2_DUR_ACCOUNT_BY_BA_MSB
#define MAC_PCU_MISC_MODE2_DUR_ACCOUNT_BY_BA_LSB 		 RXPCU_MISC_MODE2_DUR_ACCOUNT_BY_BA_LSB
#define MAC_PCU_MISC_MODE2_DUR_ACCOUNT_BY_BA_MASK 		 RXPCU_MISC_MODE2_DUR_ACCOUNT_BY_BA_MASK
#define MAC_PCU_MISC_MODE2_DUR_ACCOUNT_BY_BA_GET(x) 		 RXPCU_MISC_MODE2_DUR_ACCOUNT_BY_BA_GET(x)
#define MAC_PCU_MISC_MODE2_DUR_ACCOUNT_BY_BA_SET(x) 		 RXPCU_MISC_MODE2_DUR_ACCOUNT_BY_BA_SET(x)
#define MAC_PCU_MISC_MODE2_DUR_ACCOUNT_BY_BA_RESET 		 RXPCU_MISC_MODE2_DUR_ACCOUNT_BY_BA_RESET
#define MAC_PCU_MISC_MODE2_BC_MC_WAPI_MODE_MSB 		 RXPCU_MISC_MODE2_BC_MC_WAPI_MODE_MSB
#define MAC_PCU_MISC_MODE2_BC_MC_WAPI_MODE_LSB 		 RXPCU_MISC_MODE2_BC_MC_WAPI_MODE_LSB
#define MAC_PCU_MISC_MODE2_BC_MC_WAPI_MODE_MASK 		 RXPCU_MISC_MODE2_BC_MC_WAPI_MODE_MASK
#define MAC_PCU_MISC_MODE2_BC_MC_WAPI_MODE_GET(x) 		 RXPCU_MISC_MODE2_BC_MC_WAPI_MODE_GET(x)
#define MAC_PCU_MISC_MODE2_BC_MC_WAPI_MODE_SET(x) 		 RXPCU_MISC_MODE2_BC_MC_WAPI_MODE_SET(x)
#define MAC_PCU_MISC_MODE2_BC_MC_WAPI_MODE_RESET 		 RXPCU_MISC_MODE2_BC_MC_WAPI_MODE_RESET
#define MAC_PCU_MISC_MODE2_AGG_WEP_MSB 		 RXPCU_MISC_MODE2_AGG_WEP_MSB
#define MAC_PCU_MISC_MODE2_AGG_WEP_LSB 		 RXPCU_MISC_MODE2_AGG_WEP_LSB
#define MAC_PCU_MISC_MODE2_AGG_WEP_MASK 		 RXPCU_MISC_MODE2_AGG_WEP_MASK
#define MAC_PCU_MISC_MODE2_AGG_WEP_GET(x) 		 RXPCU_MISC_MODE2_AGG_WEP_GET(x)
#define MAC_PCU_MISC_MODE2_AGG_WEP_SET(x) 		 RXPCU_MISC_MODE2_AGG_WEP_SET(x)
#define MAC_PCU_MISC_MODE2_AGG_WEP_RESET 		 RXPCU_MISC_MODE2_AGG_WEP_RESET
#define MAC_PCU_MISC_MODE2_ENABLE_LOAD_NAV_BEACON_DURATION_MSB 		 RXPCU_MISC_MODE2_ENABLE_LOAD_NAV_BEACON_DURATION_MSB
#define MAC_PCU_MISC_MODE2_ENABLE_LOAD_NAV_BEACON_DURATION_LSB 		 RXPCU_MISC_MODE2_ENABLE_LOAD_NAV_BEACON_DURATION_LSB
#define MAC_PCU_MISC_MODE2_ENABLE_LOAD_NAV_BEACON_DURATION_MASK 		 RXPCU_MISC_MODE2_ENABLE_LOAD_NAV_BEACON_DURATION_MASK
#define MAC_PCU_MISC_MODE2_ENABLE_LOAD_NAV_BEACON_DURATION_GET(x) 		 RXPCU_MISC_MODE2_ENABLE_LOAD_NAV_BEACON_DURATION_GET(x)
#define MAC_PCU_MISC_MODE2_ENABLE_LOAD_NAV_BEACON_DURATION_SET(x) 		 RXPCU_MISC_MODE2_ENABLE_LOAD_NAV_BEACON_DURATION_SET(x)
#define MAC_PCU_MISC_MODE2_ENABLE_LOAD_NAV_BEACON_DURATION_RESET 		 RXPCU_MISC_MODE2_ENABLE_LOAD_NAV_BEACON_DURATION_RESET
#define MAC_PCU_MISC_MODE2_CFP_IGNORE_MSB 		 RXPCU_MISC_MODE2_CFP_IGNORE_MSB
#define MAC_PCU_MISC_MODE2_CFP_IGNORE_LSB 		 RXPCU_MISC_MODE2_CFP_IGNORE_LSB
#define MAC_PCU_MISC_MODE2_CFP_IGNORE_MASK 		 RXPCU_MISC_MODE2_CFP_IGNORE_MASK
#define MAC_PCU_MISC_MODE2_CFP_IGNORE_GET(x) 		 RXPCU_MISC_MODE2_CFP_IGNORE_GET(x)
#define MAC_PCU_MISC_MODE2_CFP_IGNORE_SET(x) 		 RXPCU_MISC_MODE2_CFP_IGNORE_SET(x)
#define MAC_PCU_MISC_MODE2_CFP_IGNORE_RESET 		 RXPCU_MISC_MODE2_CFP_IGNORE_RESET
#define MAC_PCU_MISC_MODE2_ADHOC_MCAST_KEYID_ENABLE_MSB 		 RXPCU_MISC_MODE2_ADHOC_MCAST_KEYID_ENABLE_MSB
#define MAC_PCU_MISC_MODE2_ADHOC_MCAST_KEYID_ENABLE_LSB 		 RXPCU_MISC_MODE2_ADHOC_MCAST_KEYID_ENABLE_LSB
#define MAC_PCU_MISC_MODE2_ADHOC_MCAST_KEYID_ENABLE_MASK 		 RXPCU_MISC_MODE2_ADHOC_MCAST_KEYID_ENABLE_MASK
#define MAC_PCU_MISC_MODE2_ADHOC_MCAST_KEYID_ENABLE_GET(x) 		 RXPCU_MISC_MODE2_ADHOC_MCAST_KEYID_ENABLE_GET(x)
#define MAC_PCU_MISC_MODE2_ADHOC_MCAST_KEYID_ENABLE_SET(x) 		 RXPCU_MISC_MODE2_ADHOC_MCAST_KEYID_ENABLE_SET(x)
#define MAC_PCU_MISC_MODE2_ADHOC_MCAST_KEYID_ENABLE_RESET 		 RXPCU_MISC_MODE2_ADHOC_MCAST_KEYID_ENABLE_RESET
#define MAC_PCU_MISC_MODE2_EV_76218_FIX_DISABLE_MSB 		 RXPCU_MISC_MODE2_EV_76218_FIX_DISABLE_MSB
#define MAC_PCU_MISC_MODE2_EV_76218_FIX_DISABLE_LSB 		 RXPCU_MISC_MODE2_EV_76218_FIX_DISABLE_LSB
#define MAC_PCU_MISC_MODE2_EV_76218_FIX_DISABLE_MASK 		 RXPCU_MISC_MODE2_EV_76218_FIX_DISABLE_MASK
#define MAC_PCU_MISC_MODE2_EV_76218_FIX_DISABLE_GET(x) 		 RXPCU_MISC_MODE2_EV_76218_FIX_DISABLE_GET(x)
#define MAC_PCU_MISC_MODE2_EV_76218_FIX_DISABLE_SET(x) 		 RXPCU_MISC_MODE2_EV_76218_FIX_DISABLE_SET(x)
#define MAC_PCU_MISC_MODE2_EV_76218_FIX_DISABLE_RESET 		 RXPCU_MISC_MODE2_EV_76218_FIX_DISABLE_RESET
#define MAC_PCU_MISC_MODE2_BUG_58057_FIX_ENABLE_MSB 		 RXPCU_MISC_MODE2_BUG_58057_FIX_ENABLE_MSB
#define MAC_PCU_MISC_MODE2_BUG_58057_FIX_ENABLE_LSB 		 RXPCU_MISC_MODE2_BUG_58057_FIX_ENABLE_LSB
#define MAC_PCU_MISC_MODE2_BUG_58057_FIX_ENABLE_MASK 		 RXPCU_MISC_MODE2_BUG_58057_FIX_ENABLE_MASK
#define MAC_PCU_MISC_MODE2_BUG_58057_FIX_ENABLE_GET(x) 		 RXPCU_MISC_MODE2_BUG_58057_FIX_ENABLE_GET(x)
#define MAC_PCU_MISC_MODE2_BUG_58057_FIX_ENABLE_SET(x) 		 RXPCU_MISC_MODE2_BUG_58057_FIX_ENABLE_SET(x)
#define MAC_PCU_MISC_MODE2_BUG_58057_FIX_ENABLE_RESET 		 RXPCU_MISC_MODE2_BUG_58057_FIX_ENABLE_RESET
#define MAC_PCU_MISC_MODE2_BUG_58603_FIX_ENABLE_MSB 		 RXPCU_MISC_MODE2_BUG_58603_FIX_ENABLE_MSB
#define MAC_PCU_MISC_MODE2_BUG_58603_FIX_ENABLE_LSB 		 RXPCU_MISC_MODE2_BUG_58603_FIX_ENABLE_LSB
#define MAC_PCU_MISC_MODE2_BUG_58603_FIX_ENABLE_MASK 		 RXPCU_MISC_MODE2_BUG_58603_FIX_ENABLE_MASK
#define MAC_PCU_MISC_MODE2_BUG_58603_FIX_ENABLE_GET(x) 		 RXPCU_MISC_MODE2_BUG_58603_FIX_ENABLE_GET(x)
#define MAC_PCU_MISC_MODE2_BUG_58603_FIX_ENABLE_SET(x) 		 RXPCU_MISC_MODE2_BUG_58603_FIX_ENABLE_SET(x)
#define MAC_PCU_MISC_MODE2_BUG_58603_FIX_ENABLE_RESET 		 RXPCU_MISC_MODE2_BUG_58603_FIX_ENABLE_RESET
#define MAC_PCU_MISC_MODE2_NO_CRYPTO_FOR_NON_DATA_PKT_MSB 		 RXPCU_MISC_MODE2_NO_CRYPTO_FOR_NON_DATA_PKT_MSB
#define MAC_PCU_MISC_MODE2_NO_CRYPTO_FOR_NON_DATA_PKT_LSB 		 RXPCU_MISC_MODE2_NO_CRYPTO_FOR_NON_DATA_PKT_LSB
#define MAC_PCU_MISC_MODE2_NO_CRYPTO_FOR_NON_DATA_PKT_MASK 		 RXPCU_MISC_MODE2_NO_CRYPTO_FOR_NON_DATA_PKT_MASK
#define MAC_PCU_MISC_MODE2_NO_CRYPTO_FOR_NON_DATA_PKT_GET(x) 		 RXPCU_MISC_MODE2_NO_CRYPTO_FOR_NON_DATA_PKT_GET(x)
#define MAC_PCU_MISC_MODE2_NO_CRYPTO_FOR_NON_DATA_PKT_SET(x) 		 RXPCU_MISC_MODE2_NO_CRYPTO_FOR_NON_DATA_PKT_SET(x)
#define MAC_PCU_MISC_MODE2_NO_CRYPTO_FOR_NON_DATA_PKT_RESET 		 RXPCU_MISC_MODE2_NO_CRYPTO_FOR_NON_DATA_PKT_RESET

#define MAC_PCU_MISC_MODE2_BUG_21532_FIX_ENABLE_MSB 		 RXPCU_MISC_MODE2_BUG_21532_FIX_ENABLE_MSB
#define MAC_PCU_MISC_MODE2_BUG_21532_FIX_ENABLE_LSB 		 RXPCU_MISC_MODE2_BUG_21532_FIX_ENABLE_LSB
#define MAC_PCU_MISC_MODE2_BUG_21532_FIX_ENABLE_MASK 		 RXPCU_MISC_MODE2_BUG_21532_FIX_ENABLE_MASK
#define MAC_PCU_MISC_MODE2_BUG_21532_FIX_ENABLE_GET(x) 		 RXPCU_MISC_MODE2_BUG_21532_FIX_ENABLE_GET(x)
#define MAC_PCU_MISC_MODE2_BUG_21532_FIX_ENABLE_SET(x) 		 RXPCU_MISC_MODE2_BUG_21532_FIX_ENABLE_SET(x)
#define MAC_PCU_MISC_MODE2_BUG_21532_FIX_ENABLE_RESET 		 RXPCU_MISC_MODE2_BUG_21532_FIX_ENABLE_RESET
#define MAC_PCU_MISC_MODE2_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_MISC_MODE2_ADDRESS
// SW modifiable bits
#define MAC_PCU_MISC_MODE2_SW_MASK 		 RXPCU_MISC_MODE2_SW_MASK
// bits defined at reset
#define MAC_PCU_MISC_MODE2_RSTMASK 		 RXPCU_MISC_MODE2_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_MISC_MODE2_RESET 		 RXPCU_MISC_MODE2_RESET

// 32'h8348 (MAC_PCU_ALT_AES_MUTE_MASK)
#define MAC_PCU_ALT_AES_MUTE_MASK_QOS_MSB 		 ALT_AES_MUTE_MASK_QOS_MSB
#define MAC_PCU_ALT_AES_MUTE_MASK_QOS_LSB 		 ALT_AES_MUTE_MASK_QOS_LSB
#define MAC_PCU_ALT_AES_MUTE_MASK_QOS_MASK 		 ALT_AES_MUTE_MASK_QOS_MASK
#define MAC_PCU_ALT_AES_MUTE_MASK_QOS_GET(x) 		 ALT_AES_MUTE_MASK_QOS_GET(x)
#define MAC_PCU_ALT_AES_MUTE_MASK_QOS_SET(x) 		 ALT_AES_MUTE_MASK_QOS_SET(x)
#define MAC_PCU_ALT_AES_MUTE_MASK_QOS_RESET 		 ALT_AES_MUTE_MASK_QOS_RESET
#define MAC_PCU_ALT_AES_MUTE_MASK_ADDRESS 		 MAC_CRYPTO_BASE_ADDRESS+ALT_AES_MUTE_MASK_ADDRESS
// SW modifiable bits
#define MAC_PCU_ALT_AES_MUTE_MASK_SW_MASK 		 ALT_AES_MUTE_MASK_SW_MASK
// bits defined at reset
#define MAC_PCU_ALT_AES_MUTE_MASK_RSTMASK 		 ALT_AES_MUTE_MASK_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_ALT_AES_MUTE_MASK_RESET 		 ALT_AES_MUTE_MASK_RESET

#define MAC_PCU_LOCATION_MODE_CONTROL_ENABLE_MSB 		 RXPCU_MISC_MODE_LOCATION_MODE_CONTROL_ENABLE_MSB
#define MAC_PCU_LOCATION_MODE_CONTROL_ENABLE_LSB 		 RXPCU_MISC_MODE_LOCATION_MODE_CONTROL_ENABLE_LSB
#define MAC_PCU_LOCATION_MODE_CONTROL_ENABLE_MASK 		 RXPCU_MISC_MODE_LOCATION_MODE_CONTROL_ENABLE_MASK
#define MAC_PCU_LOCATION_MODE_CONTROL_ENABLE_GET(x) 		 RXPCU_MISC_MODE_LOCATION_MODE_CONTROL_ENABLE_GET(x)
#define MAC_PCU_LOCATION_MODE_CONTROL_ENABLE_SET(x) 		 RXPCU_MISC_MODE_LOCATION_MODE_CONTROL_ENABLE_SET(x)
#define MAC_PCU_LOCATION_MODE_CONTROL_ENABLE_RESET 		 RXPCU_MISC_MODE_LOCATION_MODE_CONTROL_ENABLE_RESET
#define MAC_PCU_LOCATION_MODE_CONTROL_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_MISC_MODE_ADDRESS
// SW modifiable bits
// bits defined at reset
// reset value (ignore bits undefined at reset)

// 32'h838c (MAC_PCU_LOCATION_MODE_TIMER)
#define MAC_PCU_LOCATION_MODE_TIMER_VALUE_MSB 		 RXPCU_LOCATION_MODE_TIMER_VALUE_MSB
#define MAC_PCU_LOCATION_MODE_TIMER_VALUE_LSB 		 RXPCU_LOCATION_MODE_TIMER_VALUE_LSB
#define MAC_PCU_LOCATION_MODE_TIMER_VALUE_MASK 		 RXPCU_LOCATION_MODE_TIMER_VALUE_MASK
#define MAC_PCU_LOCATION_MODE_TIMER_VALUE_GET(x) 		 RXPCU_LOCATION_MODE_TIMER_VALUE_GET(x)
#define MAC_PCU_LOCATION_MODE_TIMER_VALUE_SET(x) 		 RXPCU_LOCATION_MODE_TIMER_VALUE_SET(x)
#define MAC_PCU_LOCATION_MODE_TIMER_VALUE_RESET 		 RXPCU_LOCATION_MODE_TIMER_VALUE_RESET
#define MAC_PCU_LOCATION_MODE_TIMER_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_LOCATION_MODE_TIMER_ADDRESS
// SW modifiable bits
#define MAC_PCU_LOCATION_MODE_TIMER_SW_MASK 		 RXPCU_LOCATION_MODE_TIMER_SW_MASK
// bits defined at reset
#define MAC_PCU_LOCATION_MODE_TIMER_RSTMASK 		 RXPCU_LOCATION_MODE_TIMER_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_LOCATION_MODE_TIMER_RESET 		 RXPCU_LOCATION_MODE_TIMER_RESET

// 32'h8398 (MAC_PCU_BSSID2_L32)
#define MAC_PCU_BSSID2_L32_ADDR_MSB 		 RXPCU_BSSID2_L32_ADDR_MSB
#define MAC_PCU_BSSID2_L32_ADDR_LSB 		 RXPCU_BSSID2_L32_ADDR_LSB
#define MAC_PCU_BSSID2_L32_ADDR_MASK 		 RXPCU_BSSID2_L32_ADDR_MASK
#define MAC_PCU_BSSID2_L32_ADDR_GET(x) 		 RXPCU_BSSID2_L32_ADDR_GET(x)
#define MAC_PCU_BSSID2_L32_ADDR_SET(x) 		 RXPCU_BSSID2_L32_ADDR_SET(x)
#define MAC_PCU_BSSID2_L32_ADDR_RESET 		 RXPCU_BSSID2_L32_ADDR_RESET
#define MAC_PCU_BSSID2_L32_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_BSSID2_L32_ADDRESS
// SW modifiable bits
#define MAC_PCU_BSSID2_L32_SW_MASK 		 RXPCU_BSSID2_L32_SW_MASK
// bits defined at reset
#define MAC_PCU_BSSID2_L32_RSTMASK 		 RXPCU_BSSID2_L32_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BSSID2_L32_RESET 		 RXPCU_BSSID2_L32_RESET

// 32'h839c (MAC_PCU_BSSID2_U16)
#define MAC_PCU_BSSID2_U16_AID_MSB 		 RXPCU_BSSID2_U16_AID_MSB
#define MAC_PCU_BSSID2_U16_AID_LSB 		 RXPCU_BSSID2_U16_AID_LSB
#define MAC_PCU_BSSID2_U16_AID_MASK 		 RXPCU_BSSID2_U16_AID_MASK
#define MAC_PCU_BSSID2_U16_AID_GET(x) 		 RXPCU_BSSID2_U16_AID_GET(x)
#define MAC_PCU_BSSID2_U16_AID_SET(x) 		 RXPCU_BSSID2_U16_AID_SET(x)
#define MAC_PCU_BSSID2_U16_AID_RESET 		 RXPCU_BSSID2_U16_AID_RESET
#define MAC_PCU_BSSID2_U16_ENABLE_MSB 		 RXPCU_BSSID2_U16_ENABLE_MSB
#define MAC_PCU_BSSID2_U16_ENABLE_LSB 		 RXPCU_BSSID2_U16_ENABLE_LSB
#define MAC_PCU_BSSID2_U16_ENABLE_MASK 		 RXPCU_BSSID2_U16_ENABLE_MASK
#define MAC_PCU_BSSID2_U16_ENABLE_GET(x) 		 RXPCU_BSSID2_U16_ENABLE_GET(x)
#define MAC_PCU_BSSID2_U16_ENABLE_SET(x) 		 RXPCU_BSSID2_U16_ENABLE_SET(x)
#define MAC_PCU_BSSID2_U16_ENABLE_RESET 		 RXPCU_BSSID2_U16_ENABLE_RESET
#define MAC_PCU_BSSID2_U16_ADDR_MSB 		 RXPCU_BSSID2_U16_ADDR_MSB
#define MAC_PCU_BSSID2_U16_ADDR_LSB 		 RXPCU_BSSID2_U16_ADDR_LSB
#define MAC_PCU_BSSID2_U16_ADDR_MASK 		 RXPCU_BSSID2_U16_ADDR_MASK
#define MAC_PCU_BSSID2_U16_ADDR_GET(x) 		 RXPCU_BSSID2_U16_ADDR_GET(x)
#define MAC_PCU_BSSID2_U16_ADDR_SET(x) 		 RXPCU_BSSID2_U16_ADDR_SET(x)
#define MAC_PCU_BSSID2_U16_ADDR_RESET 		 RXPCU_BSSID2_U16_ADDR_RESET
#define MAC_PCU_BSSID2_U16_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_BSSID2_U16_ADDRESS
// SW modifiable bits
#define MAC_PCU_BSSID2_U16_SW_MASK 		 RXPCU_BSSID2_U16_SW_MASK
// bits defined at reset
#define MAC_PCU_BSSID2_U16_RSTMASK 		 RXPCU_BSSID2_U16_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BSSID2_U16_RESET 		 RXPCU_BSSID2_U16_RESET

// 32'h83a0 (MAC_PCU_DIRECT_CONNECT)
#define MAC_PCU_DIRECT_CONNECT_RESERVED_2_MSB 		 RXPCU_DIRECT_CONNECT_RESERVED_2_MSB
#define MAC_PCU_DIRECT_CONNECT_RESERVED_2_LSB 		 RXPCU_DIRECT_CONNECT_RESERVED_2_LSB
#define MAC_PCU_DIRECT_CONNECT_RESERVED_2_MASK 		 RXPCU_DIRECT_CONNECT_RESERVED_2_MASK
#define MAC_PCU_DIRECT_CONNECT_RESERVED_2_GET(x) 		 RXPCU_DIRECT_CONNECT_RESERVED_2_GET(x)
#define MAC_PCU_DIRECT_CONNECT_RESERVED_2_SET(x) 		 RXPCU_DIRECT_CONNECT_RESERVED_2_SET(x)
#define MAC_PCU_DIRECT_CONNECT_RESERVED_2_RESET 		 RXPCU_DIRECT_CONNECT_RESERVED_2_RESET
#define MAC_PCU_DIRECT_CONNECT_SVD_TSF_SEL_EN_MSB 		 RXPCU_DIRECT_CONNECT_SVD_TSF_SEL_EN_MSB
#define MAC_PCU_DIRECT_CONNECT_SVD_TSF_SEL_EN_LSB 		 RXPCU_DIRECT_CONNECT_SVD_TSF_SEL_EN_LSB
#define MAC_PCU_DIRECT_CONNECT_SVD_TSF_SEL_EN_MASK 		 RXPCU_DIRECT_CONNECT_SVD_TSF_SEL_EN_MASK
#define MAC_PCU_DIRECT_CONNECT_SVD_TSF_SEL_EN_GET(x) 		 RXPCU_DIRECT_CONNECT_SVD_TSF_SEL_EN_GET(x)
#define MAC_PCU_DIRECT_CONNECT_SVD_TSF_SEL_EN_SET(x) 		 RXPCU_DIRECT_CONNECT_SVD_TSF_SEL_EN_SET(x)
#define MAC_PCU_DIRECT_CONNECT_SVD_TSF_SEL_EN_RESET 		 RXPCU_DIRECT_CONNECT_SVD_TSF_SEL_EN_RESET
#define MAC_PCU_DIRECT_CONNECT_BC_MC_WAPI_MODE_AP_SEL_MSB 		 RXPCU_DIRECT_CONNECT_BC_MC_WAPI_MODE_AP_SEL_MSB
#define MAC_PCU_DIRECT_CONNECT_BC_MC_WAPI_MODE_AP_SEL_LSB 		 RXPCU_DIRECT_CONNECT_BC_MC_WAPI_MODE_AP_SEL_LSB
#define MAC_PCU_DIRECT_CONNECT_BC_MC_WAPI_MODE_AP_SEL_MASK 		 RXPCU_DIRECT_CONNECT_BC_MC_WAPI_MODE_AP_SEL_MASK
#define MAC_PCU_DIRECT_CONNECT_BC_MC_WAPI_MODE_AP_SEL_GET(x) 		 RXPCU_DIRECT_CONNECT_BC_MC_WAPI_MODE_AP_SEL_GET(x)
#define MAC_PCU_DIRECT_CONNECT_BC_MC_WAPI_MODE_AP_SEL_SET(x) 		 RXPCU_DIRECT_CONNECT_BC_MC_WAPI_MODE_AP_SEL_SET(x)
#define MAC_PCU_DIRECT_CONNECT_BC_MC_WAPI_MODE_AP_SEL_RESET 		 RXPCU_DIRECT_CONNECT_BC_MC_WAPI_MODE_AP_SEL_RESET
#define MAC_PCU_DIRECT_CONNECT_RESERVED_1_MSB 		 RXPCU_DIRECT_CONNECT_RESERVED_1_MSB
#define MAC_PCU_DIRECT_CONNECT_RESERVED_1_LSB 		 RXPCU_DIRECT_CONNECT_RESERVED_1_LSB
#define MAC_PCU_DIRECT_CONNECT_RESERVED_1_MASK 		 RXPCU_DIRECT_CONNECT_RESERVED_1_MASK
#define MAC_PCU_DIRECT_CONNECT_RESERVED_1_GET(x) 		 RXPCU_DIRECT_CONNECT_RESERVED_1_GET(x)
#define MAC_PCU_DIRECT_CONNECT_RESERVED_1_SET(x) 		 RXPCU_DIRECT_CONNECT_RESERVED_1_SET(x)
#define MAC_PCU_DIRECT_CONNECT_RESERVED_1_RESET 		 RXPCU_DIRECT_CONNECT_RESERVED_1_RESET
#define MAC_PCU_DIRECT_CONNECT_TSF1_CLK_REQ_DISABLE_MSB 		 RXPCU_DIRECT_CONNECT_TSF1_CLK_REQ_DISABLE_MSB
#define MAC_PCU_DIRECT_CONNECT_TSF1_CLK_REQ_DISABLE_LSB 		 RXPCU_DIRECT_CONNECT_TSF1_CLK_REQ_DISABLE_LSB
#define MAC_PCU_DIRECT_CONNECT_TSF1_CLK_REQ_DISABLE_MASK 		 RXPCU_DIRECT_CONNECT_TSF1_CLK_REQ_DISABLE_MASK
#define MAC_PCU_DIRECT_CONNECT_TSF1_CLK_REQ_DISABLE_GET(x) 		 RXPCU_DIRECT_CONNECT_TSF1_CLK_REQ_DISABLE_GET(x)
#define MAC_PCU_DIRECT_CONNECT_TSF1_CLK_REQ_DISABLE_SET(x) 		 RXPCU_DIRECT_CONNECT_TSF1_CLK_REQ_DISABLE_SET(x)
#define MAC_PCU_DIRECT_CONNECT_TSF1_CLK_REQ_DISABLE_RESET 		 RXPCU_DIRECT_CONNECT_TSF1_CLK_REQ_DISABLE_RESET
#define MAC_PCU_DIRECT_CONNECT_RESERVED_0_MSB 		 RXPCU_DIRECT_CONNECT_RESERVED_0_MSB
#define MAC_PCU_DIRECT_CONNECT_RESERVED_0_LSB 		 RXPCU_DIRECT_CONNECT_RESERVED_0_LSB
#define MAC_PCU_DIRECT_CONNECT_RESERVED_0_MASK 		 RXPCU_DIRECT_CONNECT_RESERVED_0_MASK
#define MAC_PCU_DIRECT_CONNECT_RESERVED_0_GET(x) 		 RXPCU_DIRECT_CONNECT_RESERVED_0_GET(x)
#define MAC_PCU_DIRECT_CONNECT_RESERVED_0_SET(x) 		 RXPCU_DIRECT_CONNECT_RESERVED_0_SET(x)
#define MAC_PCU_DIRECT_CONNECT_RESERVED_0_RESET 		 RXPCU_DIRECT_CONNECT_RESERVED_0_RESET
#define MAC_PCU_DIRECT_CONNECT_BMISS_CNT_OVERRIDE_MSB 		 RXPCU_DIRECT_CONNECT_BMISS_CNT_OVERRIDE_MSB
#define MAC_PCU_DIRECT_CONNECT_BMISS_CNT_OVERRIDE_LSB 		 RXPCU_DIRECT_CONNECT_BMISS_CNT_OVERRIDE_LSB
#define MAC_PCU_DIRECT_CONNECT_BMISS_CNT_OVERRIDE_MASK 		 RXPCU_DIRECT_CONNECT_BMISS_CNT_OVERRIDE_MASK
#define MAC_PCU_DIRECT_CONNECT_BMISS_CNT_OVERRIDE_GET(x) 		 RXPCU_DIRECT_CONNECT_BMISS_CNT_OVERRIDE_GET(x)
#define MAC_PCU_DIRECT_CONNECT_BMISS_CNT_OVERRIDE_SET(x) 		 RXPCU_DIRECT_CONNECT_BMISS_CNT_OVERRIDE_SET(x)
#define MAC_PCU_DIRECT_CONNECT_BMISS_CNT_OVERRIDE_RESET 		 RXPCU_DIRECT_CONNECT_BMISS_CNT_OVERRIDE_RESET
#define MAC_PCU_DIRECT_CONNECT_BMISS_CNT_TSF_SEL_MSB 		 RXPCU_DIRECT_CONNECT_BMISS_CNT_TSF_SEL_MSB
#define MAC_PCU_DIRECT_CONNECT_BMISS_CNT_TSF_SEL_LSB 		 RXPCU_DIRECT_CONNECT_BMISS_CNT_TSF_SEL_LSB
#define MAC_PCU_DIRECT_CONNECT_BMISS_CNT_TSF_SEL_MASK 		 RXPCU_DIRECT_CONNECT_BMISS_CNT_TSF_SEL_MASK
#define MAC_PCU_DIRECT_CONNECT_BMISS_CNT_TSF_SEL_GET(x) 		 RXPCU_DIRECT_CONNECT_BMISS_CNT_TSF_SEL_GET(x)
#define MAC_PCU_DIRECT_CONNECT_BMISS_CNT_TSF_SEL_SET(x) 		 RXPCU_DIRECT_CONNECT_BMISS_CNT_TSF_SEL_SET(x)
#define MAC_PCU_DIRECT_CONNECT_BMISS_CNT_TSF_SEL_RESET 		 RXPCU_DIRECT_CONNECT_BMISS_CNT_TSF_SEL_RESET
#define MAC_PCU_DIRECT_CONNECT_MY_BEACON2_OVERRIDE_MSB 		 RXPCU_DIRECT_CONNECT_MY_BEACON2_OVERRIDE_MSB
#define MAC_PCU_DIRECT_CONNECT_MY_BEACON2_OVERRIDE_LSB 		 RXPCU_DIRECT_CONNECT_MY_BEACON2_OVERRIDE_LSB
#define MAC_PCU_DIRECT_CONNECT_MY_BEACON2_OVERRIDE_MASK 		 RXPCU_DIRECT_CONNECT_MY_BEACON2_OVERRIDE_MASK
#define MAC_PCU_DIRECT_CONNECT_MY_BEACON2_OVERRIDE_GET(x) 		 RXPCU_DIRECT_CONNECT_MY_BEACON2_OVERRIDE_GET(x)
#define MAC_PCU_DIRECT_CONNECT_MY_BEACON2_OVERRIDE_SET(x) 		 RXPCU_DIRECT_CONNECT_MY_BEACON2_OVERRIDE_SET(x)
#define MAC_PCU_DIRECT_CONNECT_MY_BEACON2_OVERRIDE_RESET 		 RXPCU_DIRECT_CONNECT_MY_BEACON2_OVERRIDE_RESET
#define MAC_PCU_DIRECT_CONNECT_MY_BEACON_OVERRIDE_MSB 		 RXPCU_DIRECT_CONNECT_MY_BEACON_OVERRIDE_MSB
#define MAC_PCU_DIRECT_CONNECT_MY_BEACON_OVERRIDE_LSB 		 RXPCU_DIRECT_CONNECT_MY_BEACON_OVERRIDE_LSB
#define MAC_PCU_DIRECT_CONNECT_MY_BEACON_OVERRIDE_MASK 		 RXPCU_DIRECT_CONNECT_MY_BEACON_OVERRIDE_MASK
#define MAC_PCU_DIRECT_CONNECT_MY_BEACON_OVERRIDE_GET(x) 		 RXPCU_DIRECT_CONNECT_MY_BEACON_OVERRIDE_GET(x)
#define MAC_PCU_DIRECT_CONNECT_MY_BEACON_OVERRIDE_SET(x) 		 RXPCU_DIRECT_CONNECT_MY_BEACON_OVERRIDE_SET(x)
#define MAC_PCU_DIRECT_CONNECT_MY_BEACON_OVERRIDE_RESET 		 RXPCU_DIRECT_CONNECT_MY_BEACON_OVERRIDE_RESET
#define MAC_PCU_DIRECT_CONNECT_TSF2_UPDATE_MSB 		 RXPCU_DIRECT_CONNECT_TSF2_UPDATE_MSB
#define MAC_PCU_DIRECT_CONNECT_TSF2_UPDATE_LSB 		 RXPCU_DIRECT_CONNECT_TSF2_UPDATE_LSB
#define MAC_PCU_DIRECT_CONNECT_TSF2_UPDATE_MASK 		 RXPCU_DIRECT_CONNECT_TSF2_UPDATE_MASK
#define MAC_PCU_DIRECT_CONNECT_TSF2_UPDATE_GET(x) 		 RXPCU_DIRECT_CONNECT_TSF2_UPDATE_GET(x)
#define MAC_PCU_DIRECT_CONNECT_TSF2_UPDATE_SET(x) 		 RXPCU_DIRECT_CONNECT_TSF2_UPDATE_SET(x)
#define MAC_PCU_DIRECT_CONNECT_TSF2_UPDATE_RESET 		 RXPCU_DIRECT_CONNECT_TSF2_UPDATE_RESET
#define MAC_PCU_DIRECT_CONNECT_TSF1_UPDATE_MSB 		 RXPCU_DIRECT_CONNECT_TSF1_UPDATE_MSB
#define MAC_PCU_DIRECT_CONNECT_TSF1_UPDATE_LSB 		 RXPCU_DIRECT_CONNECT_TSF1_UPDATE_LSB
#define MAC_PCU_DIRECT_CONNECT_TSF1_UPDATE_MASK 		 RXPCU_DIRECT_CONNECT_TSF1_UPDATE_MASK
#define MAC_PCU_DIRECT_CONNECT_TSF1_UPDATE_GET(x) 		 RXPCU_DIRECT_CONNECT_TSF1_UPDATE_GET(x)
#define MAC_PCU_DIRECT_CONNECT_TSF1_UPDATE_SET(x) 		 RXPCU_DIRECT_CONNECT_TSF1_UPDATE_SET(x)
#define MAC_PCU_DIRECT_CONNECT_TSF1_UPDATE_RESET 		 RXPCU_DIRECT_CONNECT_TSF1_UPDATE_RESET
#define MAC_PCU_DIRECT_CONNECT_TS_TSF_SEL_MSB 		 RXPCU_DIRECT_CONNECT_TS_TSF_SEL_MSB
#define MAC_PCU_DIRECT_CONNECT_TS_TSF_SEL_LSB 		 RXPCU_DIRECT_CONNECT_TS_TSF_SEL_LSB
#define MAC_PCU_DIRECT_CONNECT_TS_TSF_SEL_MASK 		 RXPCU_DIRECT_CONNECT_TS_TSF_SEL_MASK
#define MAC_PCU_DIRECT_CONNECT_TS_TSF_SEL_GET(x) 		 RXPCU_DIRECT_CONNECT_TS_TSF_SEL_GET(x)
#define MAC_PCU_DIRECT_CONNECT_TS_TSF_SEL_SET(x) 		 RXPCU_DIRECT_CONNECT_TS_TSF_SEL_SET(x)
#define MAC_PCU_DIRECT_CONNECT_TS_TSF_SEL_RESET 		 RXPCU_DIRECT_CONNECT_TS_TSF_SEL_RESET
#define MAC_PCU_DIRECT_CONNECT_TSF2_ENABLE_MSB 		 RXPCU_DIRECT_CONNECT_TSF2_ENABLE_MSB
#define MAC_PCU_DIRECT_CONNECT_TSF2_ENABLE_LSB 		 RXPCU_DIRECT_CONNECT_TSF2_ENABLE_LSB
#define MAC_PCU_DIRECT_CONNECT_TSF2_ENABLE_MASK 		 RXPCU_DIRECT_CONNECT_TSF2_ENABLE_MASK
#define MAC_PCU_DIRECT_CONNECT_TSF2_ENABLE_GET(x) 		 RXPCU_DIRECT_CONNECT_TSF2_ENABLE_GET(x)
#define MAC_PCU_DIRECT_CONNECT_TSF2_ENABLE_SET(x) 		 RXPCU_DIRECT_CONNECT_TSF2_ENABLE_SET(x)
#define MAC_PCU_DIRECT_CONNECT_TSF2_ENABLE_RESET 		 RXPCU_DIRECT_CONNECT_TSF2_ENABLE_RESET
#define MAC_PCU_DIRECT_CONNECT_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_DIRECT_CONNECT_ADDRESS
// SW modifiable bits
#define MAC_PCU_DIRECT_CONNECT_SW_MASK 		 RXPCU_DIRECT_CONNECT_SW_MASK
// bits defined at reset
#define MAC_PCU_DIRECT_CONNECT_RSTMASK 		 RXPCU_DIRECT_CONNECT_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_DIRECT_CONNECT_RESET 		 RXPCU_DIRECT_CONNECT_RESET

// 32'h83c8 (MAC_PCU_HW_BCN_PROC1)
#define MAC_PCU_HW_BCN_PROC1_ELM2_ID_MSB 		 RXPCU_HW_BCN_PROC1_ELM2_ID_MSB
#define MAC_PCU_HW_BCN_PROC1_ELM2_ID_LSB 		 RXPCU_HW_BCN_PROC1_ELM2_ID_LSB
#define MAC_PCU_HW_BCN_PROC1_ELM2_ID_MASK 		 RXPCU_HW_BCN_PROC1_ELM2_ID_MASK
#define MAC_PCU_HW_BCN_PROC1_ELM2_ID_GET(x) 		 RXPCU_HW_BCN_PROC1_ELM2_ID_GET(x)
#define MAC_PCU_HW_BCN_PROC1_ELM2_ID_SET(x) 		 RXPCU_HW_BCN_PROC1_ELM2_ID_SET(x)
#define MAC_PCU_HW_BCN_PROC1_ELM2_ID_RESET 		 RXPCU_HW_BCN_PROC1_ELM2_ID_RESET
#define MAC_PCU_HW_BCN_PROC1_ELM1_ID_MSB 		 RXPCU_HW_BCN_PROC1_ELM1_ID_MSB
#define MAC_PCU_HW_BCN_PROC1_ELM1_ID_LSB 		 RXPCU_HW_BCN_PROC1_ELM1_ID_LSB
#define MAC_PCU_HW_BCN_PROC1_ELM1_ID_MASK 		 RXPCU_HW_BCN_PROC1_ELM1_ID_MASK
#define MAC_PCU_HW_BCN_PROC1_ELM1_ID_GET(x) 		 RXPCU_HW_BCN_PROC1_ELM1_ID_GET(x)
#define MAC_PCU_HW_BCN_PROC1_ELM1_ID_SET(x) 		 RXPCU_HW_BCN_PROC1_ELM1_ID_SET(x)
#define MAC_PCU_HW_BCN_PROC1_ELM1_ID_RESET 		 RXPCU_HW_BCN_PROC1_ELM1_ID_RESET
#define MAC_PCU_HW_BCN_PROC1_ELM0_ID_MSB 		 RXPCU_HW_BCN_PROC1_ELM0_ID_MSB
#define MAC_PCU_HW_BCN_PROC1_ELM0_ID_LSB 		 RXPCU_HW_BCN_PROC1_ELM0_ID_LSB
#define MAC_PCU_HW_BCN_PROC1_ELM0_ID_MASK 		 RXPCU_HW_BCN_PROC1_ELM0_ID_MASK
#define MAC_PCU_HW_BCN_PROC1_ELM0_ID_GET(x) 		 RXPCU_HW_BCN_PROC1_ELM0_ID_GET(x)
#define MAC_PCU_HW_BCN_PROC1_ELM0_ID_SET(x) 		 RXPCU_HW_BCN_PROC1_ELM0_ID_SET(x)
#define MAC_PCU_HW_BCN_PROC1_ELM0_ID_RESET 		 RXPCU_HW_BCN_PROC1_ELM0_ID_RESET
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_ELM2_MSB 		 RXPCU_HW_BCN_PROC1_EXCLUDE_ELM2_MSB
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_ELM2_LSB 		 RXPCU_HW_BCN_PROC1_EXCLUDE_ELM2_LSB
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_ELM2_MASK 		 RXPCU_HW_BCN_PROC1_EXCLUDE_ELM2_MASK
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_ELM2_GET(x) 		 RXPCU_HW_BCN_PROC1_EXCLUDE_ELM2_GET(x)
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_ELM2_SET(x) 		 RXPCU_HW_BCN_PROC1_EXCLUDE_ELM2_SET(x)
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_ELM2_RESET 		 RXPCU_HW_BCN_PROC1_EXCLUDE_ELM2_RESET
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_ELM1_MSB 		 RXPCU_HW_BCN_PROC1_EXCLUDE_ELM1_MSB
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_ELM1_LSB 		 RXPCU_HW_BCN_PROC1_EXCLUDE_ELM1_LSB
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_ELM1_MASK 		 RXPCU_HW_BCN_PROC1_EXCLUDE_ELM1_MASK
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_ELM1_GET(x) 		 RXPCU_HW_BCN_PROC1_EXCLUDE_ELM1_GET(x)
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_ELM1_SET(x) 		 RXPCU_HW_BCN_PROC1_EXCLUDE_ELM1_SET(x)
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_ELM1_RESET 		 RXPCU_HW_BCN_PROC1_EXCLUDE_ELM1_RESET
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_ELM0_MSB 		 RXPCU_HW_BCN_PROC1_EXCLUDE_ELM0_MSB
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_ELM0_LSB 		 RXPCU_HW_BCN_PROC1_EXCLUDE_ELM0_LSB
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_ELM0_MASK 		 RXPCU_HW_BCN_PROC1_EXCLUDE_ELM0_MASK
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_ELM0_GET(x) 		 RXPCU_HW_BCN_PROC1_EXCLUDE_ELM0_GET(x)
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_ELM0_SET(x) 		 RXPCU_HW_BCN_PROC1_EXCLUDE_ELM0_SET(x)
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_ELM0_RESET 		 RXPCU_HW_BCN_PROC1_EXCLUDE_ELM0_RESET
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_TIM_ELM_MSB 		 RXPCU_HW_BCN_PROC1_EXCLUDE_TIM_ELM_MSB
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_TIM_ELM_LSB 		 RXPCU_HW_BCN_PROC1_EXCLUDE_TIM_ELM_LSB
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_TIM_ELM_MASK 		 RXPCU_HW_BCN_PROC1_EXCLUDE_TIM_ELM_MASK
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_TIM_ELM_GET(x) 		 RXPCU_HW_BCN_PROC1_EXCLUDE_TIM_ELM_GET(x)
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_TIM_ELM_SET(x) 		 RXPCU_HW_BCN_PROC1_EXCLUDE_TIM_ELM_SET(x)
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_TIM_ELM_RESET 		 RXPCU_HW_BCN_PROC1_EXCLUDE_TIM_ELM_RESET
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_CAP_INFO_MSB 		 RXPCU_HW_BCN_PROC1_EXCLUDE_CAP_INFO_MSB
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_CAP_INFO_LSB 		 RXPCU_HW_BCN_PROC1_EXCLUDE_CAP_INFO_LSB
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_CAP_INFO_MASK 		 RXPCU_HW_BCN_PROC1_EXCLUDE_CAP_INFO_MASK
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_CAP_INFO_GET(x) 		 RXPCU_HW_BCN_PROC1_EXCLUDE_CAP_INFO_GET(x)
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_CAP_INFO_SET(x) 		 RXPCU_HW_BCN_PROC1_EXCLUDE_CAP_INFO_SET(x)
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_CAP_INFO_RESET 		 RXPCU_HW_BCN_PROC1_EXCLUDE_CAP_INFO_RESET
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_BCN_INTVL_MSB 		 RXPCU_HW_BCN_PROC1_EXCLUDE_BCN_INTVL_MSB
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_BCN_INTVL_LSB 		 RXPCU_HW_BCN_PROC1_EXCLUDE_BCN_INTVL_LSB
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_BCN_INTVL_MASK 		 RXPCU_HW_BCN_PROC1_EXCLUDE_BCN_INTVL_MASK
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_BCN_INTVL_GET(x) 		 RXPCU_HW_BCN_PROC1_EXCLUDE_BCN_INTVL_GET(x)
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_BCN_INTVL_SET(x) 		 RXPCU_HW_BCN_PROC1_EXCLUDE_BCN_INTVL_SET(x)
#define MAC_PCU_HW_BCN_PROC1_EXCLUDE_BCN_INTVL_RESET 		 RXPCU_HW_BCN_PROC1_EXCLUDE_BCN_INTVL_RESET
#define MAC_PCU_HW_BCN_PROC1_RESET_CRC_MSB 		 RXPCU_HW_BCN_PROC1_RESET_CRC_MSB
#define MAC_PCU_HW_BCN_PROC1_RESET_CRC_LSB 		 RXPCU_HW_BCN_PROC1_RESET_CRC_LSB
#define MAC_PCU_HW_BCN_PROC1_RESET_CRC_MASK 		 RXPCU_HW_BCN_PROC1_RESET_CRC_MASK
#define MAC_PCU_HW_BCN_PROC1_RESET_CRC_GET(x) 		 RXPCU_HW_BCN_PROC1_RESET_CRC_GET(x)
#define MAC_PCU_HW_BCN_PROC1_RESET_CRC_SET(x) 		 RXPCU_HW_BCN_PROC1_RESET_CRC_SET(x)
#define MAC_PCU_HW_BCN_PROC1_RESET_CRC_RESET 		 RXPCU_HW_BCN_PROC1_RESET_CRC_RESET
#define MAC_PCU_HW_BCN_PROC1_CRC_ENABLE_MSB 		 RXPCU_HW_BCN_PROC1_CRC_ENABLE_MSB
#define MAC_PCU_HW_BCN_PROC1_CRC_ENABLE_LSB 		 RXPCU_HW_BCN_PROC1_CRC_ENABLE_LSB
#define MAC_PCU_HW_BCN_PROC1_CRC_ENABLE_MASK 		 RXPCU_HW_BCN_PROC1_CRC_ENABLE_MASK
#define MAC_PCU_HW_BCN_PROC1_CRC_ENABLE_GET(x) 		 RXPCU_HW_BCN_PROC1_CRC_ENABLE_GET(x)
#define MAC_PCU_HW_BCN_PROC1_CRC_ENABLE_SET(x) 		 RXPCU_HW_BCN_PROC1_CRC_ENABLE_SET(x)
#define MAC_PCU_HW_BCN_PROC1_CRC_ENABLE_RESET 		 RXPCU_HW_BCN_PROC1_CRC_ENABLE_RESET
#define MAC_PCU_HW_BCN_PROC1_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_HW_BCN_PROC1_ADDRESS
// SW modifiable bits
#define MAC_PCU_HW_BCN_PROC1_SW_MASK 		 RXPCU_HW_BCN_PROC1_SW_MASK
// bits defined at reset
#define MAC_PCU_HW_BCN_PROC1_RSTMASK 		 RXPCU_HW_BCN_PROC1_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_HW_BCN_PROC1_RESET 		 RXPCU_HW_BCN_PROC1_RESET

// 32'h83cc (MAC_PCU_HW_BCN_PROC2)
#define MAC_PCU_HW_BCN_PROC2_ELM3_ID_MSB 		 RXPCU_HW_BCN_PROC2_ELM3_ID_MSB
#define MAC_PCU_HW_BCN_PROC2_ELM3_ID_LSB 		 RXPCU_HW_BCN_PROC2_ELM3_ID_LSB
#define MAC_PCU_HW_BCN_PROC2_ELM3_ID_MASK 		 RXPCU_HW_BCN_PROC2_ELM3_ID_MASK
#define MAC_PCU_HW_BCN_PROC2_ELM3_ID_GET(x) 		 RXPCU_HW_BCN_PROC2_ELM3_ID_GET(x)
#define MAC_PCU_HW_BCN_PROC2_ELM3_ID_SET(x) 		 RXPCU_HW_BCN_PROC2_ELM3_ID_SET(x)
#define MAC_PCU_HW_BCN_PROC2_ELM3_ID_RESET 		 RXPCU_HW_BCN_PROC2_ELM3_ID_RESET
#define MAC_PCU_HW_BCN_PROC2_FILTER_INTERVAL_MSB 		 RXPCU_HW_BCN_PROC2_FILTER_INTERVAL_MSB
#define MAC_PCU_HW_BCN_PROC2_FILTER_INTERVAL_LSB 		 RXPCU_HW_BCN_PROC2_FILTER_INTERVAL_LSB
#define MAC_PCU_HW_BCN_PROC2_FILTER_INTERVAL_MASK 		 RXPCU_HW_BCN_PROC2_FILTER_INTERVAL_MASK
#define MAC_PCU_HW_BCN_PROC2_FILTER_INTERVAL_GET(x) 		 RXPCU_HW_BCN_PROC2_FILTER_INTERVAL_GET(x)
#define MAC_PCU_HW_BCN_PROC2_FILTER_INTERVAL_SET(x) 		 RXPCU_HW_BCN_PROC2_FILTER_INTERVAL_SET(x)
#define MAC_PCU_HW_BCN_PROC2_FILTER_INTERVAL_RESET 		 RXPCU_HW_BCN_PROC2_FILTER_INTERVAL_RESET
#define MAC_PCU_HW_BCN_PROC2_EXCLUDE_ELM3_MSB 		 RXPCU_HW_BCN_PROC2_EXCLUDE_ELM3_MSB
#define MAC_PCU_HW_BCN_PROC2_EXCLUDE_ELM3_LSB 		 RXPCU_HW_BCN_PROC2_EXCLUDE_ELM3_LSB
#define MAC_PCU_HW_BCN_PROC2_EXCLUDE_ELM3_MASK 		 RXPCU_HW_BCN_PROC2_EXCLUDE_ELM3_MASK
#define MAC_PCU_HW_BCN_PROC2_EXCLUDE_ELM3_GET(x) 		 RXPCU_HW_BCN_PROC2_EXCLUDE_ELM3_GET(x)
#define MAC_PCU_HW_BCN_PROC2_EXCLUDE_ELM3_SET(x) 		 RXPCU_HW_BCN_PROC2_EXCLUDE_ELM3_SET(x)
#define MAC_PCU_HW_BCN_PROC2_EXCLUDE_ELM3_RESET 		 RXPCU_HW_BCN_PROC2_EXCLUDE_ELM3_RESET
#define MAC_PCU_HW_BCN_PROC2_RESET_INTERVAL_MSB 		 RXPCU_HW_BCN_PROC2_RESET_INTERVAL_MSB
#define MAC_PCU_HW_BCN_PROC2_RESET_INTERVAL_LSB 		 RXPCU_HW_BCN_PROC2_RESET_INTERVAL_LSB
#define MAC_PCU_HW_BCN_PROC2_RESET_INTERVAL_MASK 		 RXPCU_HW_BCN_PROC2_RESET_INTERVAL_MASK
#define MAC_PCU_HW_BCN_PROC2_RESET_INTERVAL_GET(x) 		 RXPCU_HW_BCN_PROC2_RESET_INTERVAL_GET(x)
#define MAC_PCU_HW_BCN_PROC2_RESET_INTERVAL_SET(x) 		 RXPCU_HW_BCN_PROC2_RESET_INTERVAL_SET(x)
#define MAC_PCU_HW_BCN_PROC2_RESET_INTERVAL_RESET 		 RXPCU_HW_BCN_PROC2_RESET_INTERVAL_RESET
#define MAC_PCU_HW_BCN_PROC2_FILTER_INTERVAL_ENABLE_MSB 		 RXPCU_HW_BCN_PROC2_FILTER_INTERVAL_ENABLE_MSB
#define MAC_PCU_HW_BCN_PROC2_FILTER_INTERVAL_ENABLE_LSB 		 RXPCU_HW_BCN_PROC2_FILTER_INTERVAL_ENABLE_LSB
#define MAC_PCU_HW_BCN_PROC2_FILTER_INTERVAL_ENABLE_MASK 		 RXPCU_HW_BCN_PROC2_FILTER_INTERVAL_ENABLE_MASK
#define MAC_PCU_HW_BCN_PROC2_FILTER_INTERVAL_ENABLE_GET(x) 		 RXPCU_HW_BCN_PROC2_FILTER_INTERVAL_ENABLE_GET(x)
#define MAC_PCU_HW_BCN_PROC2_FILTER_INTERVAL_ENABLE_SET(x) 		 RXPCU_HW_BCN_PROC2_FILTER_INTERVAL_ENABLE_SET(x)
#define MAC_PCU_HW_BCN_PROC2_FILTER_INTERVAL_ENABLE_RESET 		 RXPCU_HW_BCN_PROC2_FILTER_INTERVAL_ENABLE_RESET
#define MAC_PCU_HW_BCN_PROC2_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_HW_BCN_PROC2_ADDRESS
// SW modifiable bits
#define MAC_PCU_HW_BCN_PROC2_SW_MASK 		 RXPCU_HW_BCN_PROC2_SW_MASK
// bits defined at reset
#define MAC_PCU_HW_BCN_PROC2_RSTMASK 		 RXPCU_HW_BCN_PROC2_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_HW_BCN_PROC2_RESET 		 RXPCU_HW_BCN_PROC2_RESET

// 32'h83d0 (MAC_PCU_MISC_MODE3)
#define MAC_PCU_MISC_MODE3_TIME_BASED_DISCARD_EN_MSB 		 RXPCU_MISC_MODE3_TIME_BASED_DISCARD_EN_MSB
#define MAC_PCU_MISC_MODE3_TIME_BASED_DISCARD_EN_LSB 		 RXPCU_MISC_MODE3_TIME_BASED_DISCARD_EN_LSB
#define MAC_PCU_MISC_MODE3_TIME_BASED_DISCARD_EN_MASK 		 RXPCU_MISC_MODE3_TIME_BASED_DISCARD_EN_MASK
#define MAC_PCU_MISC_MODE3_TIME_BASED_DISCARD_EN_GET(x) 		 RXPCU_MISC_MODE3_TIME_BASED_DISCARD_EN_GET(x)
#define MAC_PCU_MISC_MODE3_TIME_BASED_DISCARD_EN_SET(x) 		 RXPCU_MISC_MODE3_TIME_BASED_DISCARD_EN_SET(x)
#define MAC_PCU_MISC_MODE3_TIME_BASED_DISCARD_EN_RESET 		 RXPCU_MISC_MODE3_TIME_BASED_DISCARD_EN_RESET
#define MAC_PCU_MISC_MODE3_PER_STA_WEP_ENTRY_ENABLE_MSB 		 RXPCU_MISC_MODE3_PER_STA_WEP_ENTRY_ENABLE_MSB
#define MAC_PCU_MISC_MODE3_PER_STA_WEP_ENTRY_ENABLE_LSB 		 RXPCU_MISC_MODE3_PER_STA_WEP_ENTRY_ENABLE_LSB
#define MAC_PCU_MISC_MODE3_PER_STA_WEP_ENTRY_ENABLE_MASK 		 RXPCU_MISC_MODE3_PER_STA_WEP_ENTRY_ENABLE_MASK
#define MAC_PCU_MISC_MODE3_PER_STA_WEP_ENTRY_ENABLE_GET(x) 		 RXPCU_MISC_MODE3_PER_STA_WEP_ENTRY_ENABLE_GET(x)
#define MAC_PCU_MISC_MODE3_PER_STA_WEP_ENTRY_ENABLE_SET(x) 		 RXPCU_MISC_MODE3_PER_STA_WEP_ENTRY_ENABLE_SET(x)
#define MAC_PCU_MISC_MODE3_PER_STA_WEP_ENTRY_ENABLE_RESET 		 RXPCU_MISC_MODE3_PER_STA_WEP_ENTRY_ENABLE_RESET
#define MAC_PCU_MISC_MODE3_KEY_MISS_FIX_MSB 		 RXPCU_MISC_MODE3_KEY_MISS_FIX_MSB
#define MAC_PCU_MISC_MODE3_KEY_MISS_FIX_LSB 		 RXPCU_MISC_MODE3_KEY_MISS_FIX_LSB
#define MAC_PCU_MISC_MODE3_KEY_MISS_FIX_MASK 		 RXPCU_MISC_MODE3_KEY_MISS_FIX_MASK
#define MAC_PCU_MISC_MODE3_KEY_MISS_FIX_GET(x) 		 RXPCU_MISC_MODE3_KEY_MISS_FIX_GET(x)
#define MAC_PCU_MISC_MODE3_KEY_MISS_FIX_SET(x) 		 RXPCU_MISC_MODE3_KEY_MISS_FIX_SET(x)
#define MAC_PCU_MISC_MODE3_KEY_MISS_FIX_RESET 		 RXPCU_MISC_MODE3_KEY_MISS_FIX_RESET
#define MAC_PCU_MISC_MODE3_PM_FIELD2_FOR_MGT_MSB 		 RXPCU_MISC_MODE3_PM_FIELD2_FOR_MGT_MSB
#define MAC_PCU_MISC_MODE3_PM_FIELD2_FOR_MGT_LSB 		 RXPCU_MISC_MODE3_PM_FIELD2_FOR_MGT_LSB
#define MAC_PCU_MISC_MODE3_PM_FIELD2_FOR_MGT_MASK 		 RXPCU_MISC_MODE3_PM_FIELD2_FOR_MGT_MASK
#define MAC_PCU_MISC_MODE3_PM_FIELD2_FOR_MGT_GET(x) 		 RXPCU_MISC_MODE3_PM_FIELD2_FOR_MGT_GET(x)
#define MAC_PCU_MISC_MODE3_PM_FIELD2_FOR_MGT_SET(x) 		 RXPCU_MISC_MODE3_PM_FIELD2_FOR_MGT_SET(x)
#define MAC_PCU_MISC_MODE3_PM_FIELD2_FOR_MGT_RESET 		 RXPCU_MISC_MODE3_PM_FIELD2_FOR_MGT_RESET
#define MAC_PCU_MISC_MODE3_PM_FIELD2_FOR_DAT_MSB 		 RXPCU_MISC_MODE3_PM_FIELD2_FOR_DAT_MSB
#define MAC_PCU_MISC_MODE3_PM_FIELD2_FOR_DAT_LSB 		 RXPCU_MISC_MODE3_PM_FIELD2_FOR_DAT_LSB
#define MAC_PCU_MISC_MODE3_PM_FIELD2_FOR_DAT_MASK 		 RXPCU_MISC_MODE3_PM_FIELD2_FOR_DAT_MASK
#define MAC_PCU_MISC_MODE3_PM_FIELD2_FOR_DAT_GET(x) 		 RXPCU_MISC_MODE3_PM_FIELD2_FOR_DAT_GET(x)
#define MAC_PCU_MISC_MODE3_PM_FIELD2_FOR_DAT_SET(x) 		 RXPCU_MISC_MODE3_PM_FIELD2_FOR_DAT_SET(x)
#define MAC_PCU_MISC_MODE3_PM_FIELD2_FOR_DAT_RESET 		 RXPCU_MISC_MODE3_PM_FIELD2_FOR_DAT_RESET
#define MAC_PCU_MISC_MODE3_PM_FIELD2_FOR_CTL_MSB 		 RXPCU_MISC_MODE3_PM_FIELD2_FOR_CTL_MSB
#define MAC_PCU_MISC_MODE3_PM_FIELD2_FOR_CTL_LSB 		 RXPCU_MISC_MODE3_PM_FIELD2_FOR_CTL_LSB
#define MAC_PCU_MISC_MODE3_PM_FIELD2_FOR_CTL_MASK 		 RXPCU_MISC_MODE3_PM_FIELD2_FOR_CTL_MASK
#define MAC_PCU_MISC_MODE3_PM_FIELD2_FOR_CTL_GET(x) 		 RXPCU_MISC_MODE3_PM_FIELD2_FOR_CTL_GET(x)
#define MAC_PCU_MISC_MODE3_PM_FIELD2_FOR_CTL_SET(x) 		 RXPCU_MISC_MODE3_PM_FIELD2_FOR_CTL_SET(x)
#define MAC_PCU_MISC_MODE3_PM_FIELD2_FOR_CTL_RESET 		 RXPCU_MISC_MODE3_PM_FIELD2_FOR_CTL_RESET
#define MAC_PCU_MISC_MODE3_PM_FIELD_FOR_MGMT_MSB 		 RXPCU_MISC_MODE3_PM_FIELD_FOR_MGMT_MSB
#define MAC_PCU_MISC_MODE3_PM_FIELD_FOR_MGMT_LSB 		 RXPCU_MISC_MODE3_PM_FIELD_FOR_MGMT_LSB
#define MAC_PCU_MISC_MODE3_PM_FIELD_FOR_MGMT_MASK 		 RXPCU_MISC_MODE3_PM_FIELD_FOR_MGMT_MASK
#define MAC_PCU_MISC_MODE3_PM_FIELD_FOR_MGMT_GET(x) 		 RXPCU_MISC_MODE3_PM_FIELD_FOR_MGMT_GET(x)
#define MAC_PCU_MISC_MODE3_PM_FIELD_FOR_MGMT_SET(x) 		 RXPCU_MISC_MODE3_PM_FIELD_FOR_MGMT_SET(x)
#define MAC_PCU_MISC_MODE3_PM_FIELD_FOR_MGMT_RESET 		 RXPCU_MISC_MODE3_PM_FIELD_FOR_MGMT_RESET
#define MAC_PCU_MISC_MODE3_PM_FIELD_FOR_DAT_MSB 		 RXPCU_MISC_MODE3_PM_FIELD_FOR_DAT_MSB
#define MAC_PCU_MISC_MODE3_PM_FIELD_FOR_DAT_LSB 		 RXPCU_MISC_MODE3_PM_FIELD_FOR_DAT_LSB
#define MAC_PCU_MISC_MODE3_PM_FIELD_FOR_DAT_MASK 		 RXPCU_MISC_MODE3_PM_FIELD_FOR_DAT_MASK
#define MAC_PCU_MISC_MODE3_PM_FIELD_FOR_DAT_GET(x) 		 RXPCU_MISC_MODE3_PM_FIELD_FOR_DAT_GET(x)
#define MAC_PCU_MISC_MODE3_PM_FIELD_FOR_DAT_SET(x) 		 RXPCU_MISC_MODE3_PM_FIELD_FOR_DAT_SET(x)
#define MAC_PCU_MISC_MODE3_PM_FIELD_FOR_DAT_RESET 		 RXPCU_MISC_MODE3_PM_FIELD_FOR_DAT_RESET
#define MAC_PCU_MISC_MODE3_BEACON_FROM_TO_DS_CHECK_MSB 		 RXPCU_MISC_MODE3_BEACON_FROM_TO_DS_CHECK_MSB
#define MAC_PCU_MISC_MODE3_BEACON_FROM_TO_DS_CHECK_LSB 		 RXPCU_MISC_MODE3_BEACON_FROM_TO_DS_CHECK_LSB
#define MAC_PCU_MISC_MODE3_BEACON_FROM_TO_DS_CHECK_MASK 		 RXPCU_MISC_MODE3_BEACON_FROM_TO_DS_CHECK_MASK
#define MAC_PCU_MISC_MODE3_BEACON_FROM_TO_DS_CHECK_GET(x) 		 RXPCU_MISC_MODE3_BEACON_FROM_TO_DS_CHECK_GET(x)
#define MAC_PCU_MISC_MODE3_BEACON_FROM_TO_DS_CHECK_SET(x) 		 RXPCU_MISC_MODE3_BEACON_FROM_TO_DS_CHECK_SET(x)
#define MAC_PCU_MISC_MODE3_BEACON_FROM_TO_DS_CHECK_RESET 		 RXPCU_MISC_MODE3_BEACON_FROM_TO_DS_CHECK_RESET
#define MAC_PCU_MISC_MODE3_IGNORE_TXOP_IF_ZER0_MSB 		 RXPCU_MISC_MODE3_IGNORE_TXOP_IF_ZER0_MSB
#define MAC_PCU_MISC_MODE3_IGNORE_TXOP_IF_ZER0_LSB 		 RXPCU_MISC_MODE3_IGNORE_TXOP_IF_ZER0_LSB
#define MAC_PCU_MISC_MODE3_IGNORE_TXOP_IF_ZER0_MASK 		 RXPCU_MISC_MODE3_IGNORE_TXOP_IF_ZER0_MASK
#define MAC_PCU_MISC_MODE3_IGNORE_TXOP_IF_ZER0_GET(x) 		 RXPCU_MISC_MODE3_IGNORE_TXOP_IF_ZER0_GET(x)
#define MAC_PCU_MISC_MODE3_IGNORE_TXOP_IF_ZER0_SET(x) 		 RXPCU_MISC_MODE3_IGNORE_TXOP_IF_ZER0_SET(x)
#define MAC_PCU_MISC_MODE3_IGNORE_TXOP_IF_ZER0_RESET 		 RXPCU_MISC_MODE3_IGNORE_TXOP_IF_ZER0_RESET
#define MAC_PCU_MISC_MODE3_ALLOW_RAC_MSB 		 RXPCU_MISC_MODE3_ALLOW_RAC_MSB
#define MAC_PCU_MISC_MODE3_ALLOW_RAC_LSB 		 RXPCU_MISC_MODE3_ALLOW_RAC_LSB
#define MAC_PCU_MISC_MODE3_ALLOW_RAC_MASK 		 RXPCU_MISC_MODE3_ALLOW_RAC_MASK
#define MAC_PCU_MISC_MODE3_ALLOW_RAC_GET(x) 		 RXPCU_MISC_MODE3_ALLOW_RAC_GET(x)
#define MAC_PCU_MISC_MODE3_ALLOW_RAC_SET(x) 		 RXPCU_MISC_MODE3_ALLOW_RAC_SET(x)
#define MAC_PCU_MISC_MODE3_ALLOW_RAC_RESET 		 RXPCU_MISC_MODE3_ALLOW_RAC_RESET
#define MAC_PCU_MISC_MODE3_SMOOTHING_FORCE_MSB 		 RXPCU_MISC_MODE3_SMOOTHING_FORCE_MSB
#define MAC_PCU_MISC_MODE3_SMOOTHING_FORCE_LSB 		 RXPCU_MISC_MODE3_SMOOTHING_FORCE_LSB
#define MAC_PCU_MISC_MODE3_SMOOTHING_FORCE_MASK 		 RXPCU_MISC_MODE3_SMOOTHING_FORCE_MASK
#define MAC_PCU_MISC_MODE3_SMOOTHING_FORCE_GET(x) 		 RXPCU_MISC_MODE3_SMOOTHING_FORCE_GET(x)
#define MAC_PCU_MISC_MODE3_SMOOTHING_FORCE_SET(x) 		 RXPCU_MISC_MODE3_SMOOTHING_FORCE_SET(x)
#define MAC_PCU_MISC_MODE3_SMOOTHING_FORCE_RESET 		 RXPCU_MISC_MODE3_SMOOTHING_FORCE_RESET
#define MAC_PCU_MISC_MODE3_SELF_GEN_SMOOTHING_MSB 		 RXPCU_MISC_MODE3_SELF_GEN_SMOOTHING_MSB
#define MAC_PCU_MISC_MODE3_SELF_GEN_SMOOTHING_LSB 		 RXPCU_MISC_MODE3_SELF_GEN_SMOOTHING_LSB
#define MAC_PCU_MISC_MODE3_SELF_GEN_SMOOTHING_MASK 		 RXPCU_MISC_MODE3_SELF_GEN_SMOOTHING_MASK
#define MAC_PCU_MISC_MODE3_SELF_GEN_SMOOTHING_GET(x) 		 RXPCU_MISC_MODE3_SELF_GEN_SMOOTHING_GET(x)
#define MAC_PCU_MISC_MODE3_SELF_GEN_SMOOTHING_SET(x) 		 RXPCU_MISC_MODE3_SELF_GEN_SMOOTHING_SET(x)
#define MAC_PCU_MISC_MODE3_SELF_GEN_SMOOTHING_RESET 		 RXPCU_MISC_MODE3_SELF_GEN_SMOOTHING_RESET
#define MAC_PCU_MISC_MODE3_BB_LDPC_EN_MSB 		 RXPCU_MISC_MODE3_BB_LDPC_EN_MSB
#define MAC_PCU_MISC_MODE3_BB_LDPC_EN_LSB 		 RXPCU_MISC_MODE3_BB_LDPC_EN_LSB
#define MAC_PCU_MISC_MODE3_BB_LDPC_EN_MASK 		 RXPCU_MISC_MODE3_BB_LDPC_EN_MASK
#define MAC_PCU_MISC_MODE3_BB_LDPC_EN_GET(x) 		 RXPCU_MISC_MODE3_BB_LDPC_EN_GET(x)
#define MAC_PCU_MISC_MODE3_BB_LDPC_EN_SET(x) 		 RXPCU_MISC_MODE3_BB_LDPC_EN_SET(x)
#define MAC_PCU_MISC_MODE3_BB_LDPC_EN_RESET 		 RXPCU_MISC_MODE3_BB_LDPC_EN_RESET
#define MAC_PCU_MISC_MODE3_WAPI_ORDER_MASK_MSB 		 RXPCU_MISC_MODE3_WAPI_ORDER_MASK_MSB
#define MAC_PCU_MISC_MODE3_WAPI_ORDER_MASK_LSB 		 RXPCU_MISC_MODE3_WAPI_ORDER_MASK_LSB
#define MAC_PCU_MISC_MODE3_WAPI_ORDER_MASK_MASK 		 RXPCU_MISC_MODE3_WAPI_ORDER_MASK_MASK
#define MAC_PCU_MISC_MODE3_WAPI_ORDER_MASK_GET(x) 		 RXPCU_MISC_MODE3_WAPI_ORDER_MASK_GET(x)
#define MAC_PCU_MISC_MODE3_WAPI_ORDER_MASK_SET(x) 		 RXPCU_MISC_MODE3_WAPI_ORDER_MASK_SET(x)
#define MAC_PCU_MISC_MODE3_WAPI_ORDER_MASK_RESET 		 RXPCU_MISC_MODE3_WAPI_ORDER_MASK_RESET
#define MAC_PCU_MISC_MODE3_MATCH_TID_FOR_BA_MSB 		 RXPCU_MISC_MODE3_MATCH_TID_FOR_BA_MSB
#define MAC_PCU_MISC_MODE3_MATCH_TID_FOR_BA_LSB 		 RXPCU_MISC_MODE3_MATCH_TID_FOR_BA_LSB
#define MAC_PCU_MISC_MODE3_MATCH_TID_FOR_BA_MASK 		 RXPCU_MISC_MODE3_MATCH_TID_FOR_BA_MASK
#define MAC_PCU_MISC_MODE3_MATCH_TID_FOR_BA_GET(x) 		 RXPCU_MISC_MODE3_MATCH_TID_FOR_BA_GET(x)
#define MAC_PCU_MISC_MODE3_MATCH_TID_FOR_BA_SET(x) 		 RXPCU_MISC_MODE3_MATCH_TID_FOR_BA_SET(x)
#define MAC_PCU_MISC_MODE3_MATCH_TID_FOR_BA_RESET 		 RXPCU_MISC_MODE3_MATCH_TID_FOR_BA_RESET
#define MAC_PCU_MISC_MODE3_BA_FRAME_LENGTH_MSB 		 RXPCU_MISC_MODE3_BA_FRAME_LENGTH_MSB
#define MAC_PCU_MISC_MODE3_BA_FRAME_LENGTH_LSB 		 RXPCU_MISC_MODE3_BA_FRAME_LENGTH_LSB
#define MAC_PCU_MISC_MODE3_BA_FRAME_LENGTH_MASK 		 RXPCU_MISC_MODE3_BA_FRAME_LENGTH_MASK
#define MAC_PCU_MISC_MODE3_BA_FRAME_LENGTH_GET(x) 		 RXPCU_MISC_MODE3_BA_FRAME_LENGTH_GET(x)
#define MAC_PCU_MISC_MODE3_BA_FRAME_LENGTH_SET(x) 		 RXPCU_MISC_MODE3_BA_FRAME_LENGTH_SET(x)
#define MAC_PCU_MISC_MODE3_BA_FRAME_LENGTH_RESET 		 RXPCU_MISC_MODE3_BA_FRAME_LENGTH_RESET
#define MAC_PCU_MISC_MODE3_CHECK_LENGTH_FOR_BA_MSB 		 RXPCU_MISC_MODE3_CHECK_LENGTH_FOR_BA_MSB
#define MAC_PCU_MISC_MODE3_CHECK_LENGTH_FOR_BA_LSB 		 RXPCU_MISC_MODE3_CHECK_LENGTH_FOR_BA_LSB
#define MAC_PCU_MISC_MODE3_CHECK_LENGTH_FOR_BA_MASK 		 RXPCU_MISC_MODE3_CHECK_LENGTH_FOR_BA_MASK
#define MAC_PCU_MISC_MODE3_CHECK_LENGTH_FOR_BA_GET(x) 		 RXPCU_MISC_MODE3_CHECK_LENGTH_FOR_BA_GET(x)
#define MAC_PCU_MISC_MODE3_CHECK_LENGTH_FOR_BA_SET(x) 		 RXPCU_MISC_MODE3_CHECK_LENGTH_FOR_BA_SET(x)
#define MAC_PCU_MISC_MODE3_CHECK_LENGTH_FOR_BA_RESET 		 RXPCU_MISC_MODE3_CHECK_LENGTH_FOR_BA_RESET
#define MAC_PCU_MISC_MODE3_BUG_61936_FIX_ENABLE_MSB 		 RXPCU_MISC_MODE3_BUG_61936_FIX_ENABLE_MSB
#define MAC_PCU_MISC_MODE3_BUG_61936_FIX_ENABLE_LSB 		 RXPCU_MISC_MODE3_BUG_61936_FIX_ENABLE_LSB
#define MAC_PCU_MISC_MODE3_BUG_61936_FIX_ENABLE_MASK 		 RXPCU_MISC_MODE3_BUG_61936_FIX_ENABLE_MASK
#define MAC_PCU_MISC_MODE3_BUG_61936_FIX_ENABLE_GET(x) 		 RXPCU_MISC_MODE3_BUG_61936_FIX_ENABLE_GET(x)
#define MAC_PCU_MISC_MODE3_BUG_61936_FIX_ENABLE_SET(x) 		 RXPCU_MISC_MODE3_BUG_61936_FIX_ENABLE_SET(x)
#define MAC_PCU_MISC_MODE3_BUG_61936_FIX_ENABLE_RESET 		 RXPCU_MISC_MODE3_BUG_61936_FIX_ENABLE_RESET
#define MAC_PCU_MISC_MODE3_WOW_ADDR1_MASK_ENABLE_MSB 		 RXPCU_MISC_MODE3_WOW_ADDR1_MASK_ENABLE_MSB
#define MAC_PCU_MISC_MODE3_WOW_ADDR1_MASK_ENABLE_LSB 		 RXPCU_MISC_MODE3_WOW_ADDR1_MASK_ENABLE_LSB
#define MAC_PCU_MISC_MODE3_WOW_ADDR1_MASK_ENABLE_MASK 		 RXPCU_MISC_MODE3_WOW_ADDR1_MASK_ENABLE_MASK
#define MAC_PCU_MISC_MODE3_WOW_ADDR1_MASK_ENABLE_GET(x) 		 RXPCU_MISC_MODE3_WOW_ADDR1_MASK_ENABLE_GET(x)
#define MAC_PCU_MISC_MODE3_WOW_ADDR1_MASK_ENABLE_SET(x) 		 RXPCU_MISC_MODE3_WOW_ADDR1_MASK_ENABLE_SET(x)
#define MAC_PCU_MISC_MODE3_WOW_ADDR1_MASK_ENABLE_RESET 		 RXPCU_MISC_MODE3_WOW_ADDR1_MASK_ENABLE_RESET
#define MAC_PCU_MISC_MODE3_BUG_56991_FIX_ENABLE_MSB 		 RXPCU_MISC_MODE3_BUG_56991_FIX_ENABLE_MSB
#define MAC_PCU_MISC_MODE3_BUG_56991_FIX_ENABLE_LSB 		 RXPCU_MISC_MODE3_BUG_56991_FIX_ENABLE_LSB
#define MAC_PCU_MISC_MODE3_BUG_56991_FIX_ENABLE_MASK 		 RXPCU_MISC_MODE3_BUG_56991_FIX_ENABLE_MASK
#define MAC_PCU_MISC_MODE3_BUG_56991_FIX_ENABLE_GET(x) 		 RXPCU_MISC_MODE3_BUG_56991_FIX_ENABLE_GET(x)
#define MAC_PCU_MISC_MODE3_BUG_56991_FIX_ENABLE_SET(x) 		 RXPCU_MISC_MODE3_BUG_56991_FIX_ENABLE_SET(x)
#define MAC_PCU_MISC_MODE3_BUG_56991_FIX_ENABLE_RESET 		 RXPCU_MISC_MODE3_BUG_56991_FIX_ENABLE_RESET
#define MAC_PCU_MISC_MODE3_BUG_58011_FIX_ENABLE_MSB 		 RXPCU_MISC_MODE3_BUG_58011_FIX_ENABLE_MSB
#define MAC_PCU_MISC_MODE3_BUG_58011_FIX_ENABLE_LSB 		 RXPCU_MISC_MODE3_BUG_58011_FIX_ENABLE_LSB
#define MAC_PCU_MISC_MODE3_BUG_58011_FIX_ENABLE_MASK 		 RXPCU_MISC_MODE3_BUG_58011_FIX_ENABLE_MASK
#define MAC_PCU_MISC_MODE3_BUG_58011_FIX_ENABLE_GET(x) 		 RXPCU_MISC_MODE3_BUG_58011_FIX_ENABLE_GET(x)
#define MAC_PCU_MISC_MODE3_BUG_58011_FIX_ENABLE_SET(x) 		 RXPCU_MISC_MODE3_BUG_58011_FIX_ENABLE_SET(x)
#define MAC_PCU_MISC_MODE3_BUG_58011_FIX_ENABLE_RESET 		 RXPCU_MISC_MODE3_BUG_58011_FIX_ENABLE_RESET
#define MAC_PCU_MISC_MODE3_REGULAR_SOUNDING_MSB 		 RXPCU_MISC_MODE3_REGULAR_SOUNDING_MSB
#define MAC_PCU_MISC_MODE3_REGULAR_SOUNDING_LSB 		 RXPCU_MISC_MODE3_REGULAR_SOUNDING_LSB
#define MAC_PCU_MISC_MODE3_REGULAR_SOUNDING_MASK 		 RXPCU_MISC_MODE3_REGULAR_SOUNDING_MASK
#define MAC_PCU_MISC_MODE3_REGULAR_SOUNDING_GET(x) 		 RXPCU_MISC_MODE3_REGULAR_SOUNDING_GET(x)
#define MAC_PCU_MISC_MODE3_REGULAR_SOUNDING_SET(x) 		 RXPCU_MISC_MODE3_REGULAR_SOUNDING_SET(x)
#define MAC_PCU_MISC_MODE3_REGULAR_SOUNDING_RESET 		 RXPCU_MISC_MODE3_REGULAR_SOUNDING_RESET
#define MAC_PCU_MISC_MODE3_AES_3STREAM_MSB 		 RXPCU_MISC_MODE3_AES_3STREAM_MSB
#define MAC_PCU_MISC_MODE3_AES_3STREAM_LSB 		 RXPCU_MISC_MODE3_AES_3STREAM_LSB
#define MAC_PCU_MISC_MODE3_AES_3STREAM_MASK 		 RXPCU_MISC_MODE3_AES_3STREAM_MASK
#define MAC_PCU_MISC_MODE3_AES_3STREAM_GET(x) 		 RXPCU_MISC_MODE3_AES_3STREAM_GET(x)
#define MAC_PCU_MISC_MODE3_AES_3STREAM_SET(x) 		 RXPCU_MISC_MODE3_AES_3STREAM_SET(x)
#define MAC_PCU_MISC_MODE3_AES_3STREAM_RESET 		 RXPCU_MISC_MODE3_AES_3STREAM_RESET
#define MAC_PCU_MISC_MODE3_BUG_55702_FIX_ENABLE_MSB 		 RXPCU_MISC_MODE3_BUG_55702_FIX_ENABLE_MSB
#define MAC_PCU_MISC_MODE3_BUG_55702_FIX_ENABLE_LSB 		 RXPCU_MISC_MODE3_BUG_55702_FIX_ENABLE_LSB
#define MAC_PCU_MISC_MODE3_BUG_55702_FIX_ENABLE_MASK 		 RXPCU_MISC_MODE3_BUG_55702_FIX_ENABLE_MASK
#define MAC_PCU_MISC_MODE3_BUG_55702_FIX_ENABLE_GET(x) 		 RXPCU_MISC_MODE3_BUG_55702_FIX_ENABLE_GET(x)
#define MAC_PCU_MISC_MODE3_BUG_55702_FIX_ENABLE_SET(x) 		 RXPCU_MISC_MODE3_BUG_55702_FIX_ENABLE_SET(x)
#define MAC_PCU_MISC_MODE3_BUG_55702_FIX_ENABLE_RESET 		 RXPCU_MISC_MODE3_BUG_55702_FIX_ENABLE_RESET
#define MAC_PCU_MISC_MODE3_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_MISC_MODE3_ADDRESS
// SW modifiable bits
#define MAC_PCU_MISC_MODE3_SW_MASK 		 RXPCU_MISC_MODE3_SW_MASK
// bits defined at reset
#define MAC_PCU_MISC_MODE3_RSTMASK 		 RXPCU_MISC_MODE3_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_MISC_MODE3_RESET 		 RXPCU_MISC_MODE3_RESET

// 32'h83d4 (MAC_PCU_MISC_MODE4)
#define MAC_PCU_MISC_MODE4_FCS_FAIL_EIFS_DISABLE_MSB 		 RXPCU_MISC_MODE4_FCS_FAIL_EIFS_DISABLE_MSB
#define MAC_PCU_MISC_MODE4_FCS_FAIL_EIFS_DISABLE_LSB 		 RXPCU_MISC_MODE4_FCS_FAIL_EIFS_DISABLE_LSB
#define MAC_PCU_MISC_MODE4_FCS_FAIL_EIFS_DISABLE_MASK 		 RXPCU_MISC_MODE4_FCS_FAIL_EIFS_DISABLE_MASK
#define MAC_PCU_MISC_MODE4_FCS_FAIL_EIFS_DISABLE_GET(x) 		 RXPCU_MISC_MODE4_FCS_FAIL_EIFS_DISABLE_GET(x)
#define MAC_PCU_MISC_MODE4_FCS_FAIL_EIFS_DISABLE_SET(x) 		 RXPCU_MISC_MODE4_FCS_FAIL_EIFS_DISABLE_SET(x)
#define MAC_PCU_MISC_MODE4_FCS_FAIL_EIFS_DISABLE_RESET 		 RXPCU_MISC_MODE4_FCS_FAIL_EIFS_DISABLE_RESET
#define MAC_PCU_MISC_MODE4_INCONSISTENT_MU_NC_NO_FDBK_ENABLE_MSB 		 RXPCU_MISC_MODE4_INCONSISTENT_MU_NC_NO_FDBK_ENABLE_MSB
#define MAC_PCU_MISC_MODE4_INCONSISTENT_MU_NC_NO_FDBK_ENABLE_LSB 		 RXPCU_MISC_MODE4_INCONSISTENT_MU_NC_NO_FDBK_ENABLE_LSB
#define MAC_PCU_MISC_MODE4_INCONSISTENT_MU_NC_NO_FDBK_ENABLE_MASK 		 RXPCU_MISC_MODE4_INCONSISTENT_MU_NC_NO_FDBK_ENABLE_MASK
#define MAC_PCU_MISC_MODE4_INCONSISTENT_MU_NC_NO_FDBK_ENABLE_GET(x) 		 RXPCU_MISC_MODE4_INCONSISTENT_MU_NC_NO_FDBK_ENABLE_GET(x)
#define MAC_PCU_MISC_MODE4_INCONSISTENT_MU_NC_NO_FDBK_ENABLE_SET(x) 		 RXPCU_MISC_MODE4_INCONSISTENT_MU_NC_NO_FDBK_ENABLE_SET(x)
#define MAC_PCU_MISC_MODE4_INCONSISTENT_MU_NC_NO_FDBK_ENABLE_RESET 		 RXPCU_MISC_MODE4_INCONSISTENT_MU_NC_NO_FDBK_ENABLE_RESET
#define MAC_PCU_MISC_MODE4_EARLY_TIM_DTIM_PS_DISABLE_MSB 		 RXPCU_MISC_MODE4_EARLY_TIM_DTIM_PS_DISABLE_MSB
#define MAC_PCU_MISC_MODE4_EARLY_TIM_DTIM_PS_DISABLE_LSB 		 RXPCU_MISC_MODE4_EARLY_TIM_DTIM_PS_DISABLE_LSB
#define MAC_PCU_MISC_MODE4_EARLY_TIM_DTIM_PS_DISABLE_MASK 		 RXPCU_MISC_MODE4_EARLY_TIM_DTIM_PS_DISABLE_MASK
#define MAC_PCU_MISC_MODE4_EARLY_TIM_DTIM_PS_DISABLE_GET(x) 		 RXPCU_MISC_MODE4_EARLY_TIM_DTIM_PS_DISABLE_GET(x)
#define MAC_PCU_MISC_MODE4_EARLY_TIM_DTIM_PS_DISABLE_SET(x) 		 RXPCU_MISC_MODE4_EARLY_TIM_DTIM_PS_DISABLE_SET(x)
#define MAC_PCU_MISC_MODE4_EARLY_TIM_DTIM_PS_DISABLE_RESET 		 RXPCU_MISC_MODE4_EARLY_TIM_DTIM_PS_DISABLE_RESET
#define MAC_PCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON2_MSB 		 RXPCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON2_MSB
#define MAC_PCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON2_LSB 		 RXPCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON2_LSB
#define MAC_PCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON2_MASK 		 RXPCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON2_MASK
#define MAC_PCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON2_GET(x) 		 RXPCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON2_GET(x)
#define MAC_PCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON2_SET(x) 		 RXPCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON2_SET(x)
#define MAC_PCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON2_RESET 		 RXPCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON2_RESET
#define MAC_PCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON_MSB 		 RXPCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON_MSB
#define MAC_PCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON_LSB 		 RXPCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON_LSB
#define MAC_PCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON_MASK 		 RXPCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON_MASK
#define MAC_PCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON_GET(x) 		 RXPCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON_GET(x)
#define MAC_PCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON_SET(x) 		 RXPCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON_SET(x)
#define MAC_PCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON_RESET 		 RXPCU_MISC_MODE4_EARLY_DTIM_CLEAR_DETECT_EN_MY_BEACON_RESET
#define MAC_PCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON2_MSB 		 RXPCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON2_MSB
#define MAC_PCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON2_LSB 		 RXPCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON2_LSB
#define MAC_PCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON2_MASK 		 RXPCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON2_MASK
#define MAC_PCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON2_GET(x) 		 RXPCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON2_GET(x)
#define MAC_PCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON2_SET(x) 		 RXPCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON2_SET(x)
#define MAC_PCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON2_RESET 		 RXPCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON2_RESET
#define MAC_PCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON_MSB 		 RXPCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON_MSB
#define MAC_PCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON_LSB 		 RXPCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON_LSB
#define MAC_PCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON_MASK 		 RXPCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON_MASK
#define MAC_PCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON_GET(x) 		 RXPCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON_GET(x)
#define MAC_PCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON_SET(x) 		 RXPCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON_SET(x)
#define MAC_PCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON_RESET 		 RXPCU_MISC_MODE4_EARLY_TIM_CLEAR_DETECT_EN_MY_BEACON_RESET
#define MAC_PCU_MISC_MODE4_CH_BUSY_B4_NDP_CHECK_EN_MSB 		 RXPCU_MISC_MODE4_CH_BUSY_B4_NDP_CHECK_EN_MSB
#define MAC_PCU_MISC_MODE4_CH_BUSY_B4_NDP_CHECK_EN_LSB 		 RXPCU_MISC_MODE4_CH_BUSY_B4_NDP_CHECK_EN_LSB
#define MAC_PCU_MISC_MODE4_CH_BUSY_B4_NDP_CHECK_EN_MASK 		 RXPCU_MISC_MODE4_CH_BUSY_B4_NDP_CHECK_EN_MASK
#define MAC_PCU_MISC_MODE4_CH_BUSY_B4_NDP_CHECK_EN_GET(x) 		 RXPCU_MISC_MODE4_CH_BUSY_B4_NDP_CHECK_EN_GET(x)
#define MAC_PCU_MISC_MODE4_CH_BUSY_B4_NDP_CHECK_EN_SET(x) 		 RXPCU_MISC_MODE4_CH_BUSY_B4_NDP_CHECK_EN_SET(x)
#define MAC_PCU_MISC_MODE4_CH_BUSY_B4_NDP_CHECK_EN_RESET 		 RXPCU_MISC_MODE4_CH_BUSY_B4_NDP_CHECK_EN_RESET
#define MAC_PCU_MISC_MODE4_FREEZE_CHANNEL_CAPTURE_CLEAR_MSB 		 RXPCU_MISC_MODE4_FREEZE_CHANNEL_CAPTURE_CLEAR_MSB
#define MAC_PCU_MISC_MODE4_FREEZE_CHANNEL_CAPTURE_CLEAR_LSB 		 RXPCU_MISC_MODE4_FREEZE_CHANNEL_CAPTURE_CLEAR_LSB
#define MAC_PCU_MISC_MODE4_FREEZE_CHANNEL_CAPTURE_CLEAR_MASK 		 RXPCU_MISC_MODE4_FREEZE_CHANNEL_CAPTURE_CLEAR_MASK
#define MAC_PCU_MISC_MODE4_FREEZE_CHANNEL_CAPTURE_CLEAR_GET(x) 		 RXPCU_MISC_MODE4_FREEZE_CHANNEL_CAPTURE_CLEAR_GET(x)
#define MAC_PCU_MISC_MODE4_FREEZE_CHANNEL_CAPTURE_CLEAR_SET(x) 		 RXPCU_MISC_MODE4_FREEZE_CHANNEL_CAPTURE_CLEAR_SET(x)
#define MAC_PCU_MISC_MODE4_FREEZE_CHANNEL_CAPTURE_CLEAR_RESET 		 RXPCU_MISC_MODE4_FREEZE_CHANNEL_CAPTURE_CLEAR_RESET
#define MAC_PCU_MISC_MODE4_PEREGRINE_RTS_CTS_HT_DYNAMIC_METHOD_SEL_MSB 		 RXPCU_MISC_MODE4_PEREGRINE_RTS_CTS_HT_DYNAMIC_METHOD_SEL_MSB
#define MAC_PCU_MISC_MODE4_PEREGRINE_RTS_CTS_HT_DYNAMIC_METHOD_SEL_LSB 		 RXPCU_MISC_MODE4_PEREGRINE_RTS_CTS_HT_DYNAMIC_METHOD_SEL_LSB
#define MAC_PCU_MISC_MODE4_PEREGRINE_RTS_CTS_HT_DYNAMIC_METHOD_SEL_MASK 		 RXPCU_MISC_MODE4_PEREGRINE_RTS_CTS_HT_DYNAMIC_METHOD_SEL_MASK
#define MAC_PCU_MISC_MODE4_PEREGRINE_RTS_CTS_HT_DYNAMIC_METHOD_SEL_GET(x) 		 RXPCU_MISC_MODE4_PEREGRINE_RTS_CTS_HT_DYNAMIC_METHOD_SEL_GET(x)
#define MAC_PCU_MISC_MODE4_PEREGRINE_RTS_CTS_HT_DYNAMIC_METHOD_SEL_SET(x) 		 RXPCU_MISC_MODE4_PEREGRINE_RTS_CTS_HT_DYNAMIC_METHOD_SEL_SET(x)
#define MAC_PCU_MISC_MODE4_PEREGRINE_RTS_CTS_HT_DYNAMIC_METHOD_SEL_RESET 		 RXPCU_MISC_MODE4_PEREGRINE_RTS_CTS_HT_DYNAMIC_METHOD_SEL_RESET
#define MAC_PCU_MISC_MODE4_RESERVED_MSB 		 RXPCU_MISC_MODE4_RESERVED_MSB
#define MAC_PCU_MISC_MODE4_RESERVED_LSB 		 RXPCU_MISC_MODE4_RESERVED_LSB
#define MAC_PCU_MISC_MODE4_RESERVED_MASK 		 RXPCU_MISC_MODE4_RESERVED_MASK
#define MAC_PCU_MISC_MODE4_RESERVED_GET(x) 		 RXPCU_MISC_MODE4_RESERVED_GET(x)
#define MAC_PCU_MISC_MODE4_RESERVED_SET(x) 		 RXPCU_MISC_MODE4_RESERVED_SET(x)
#define MAC_PCU_MISC_MODE4_RESERVED_RESET 		 RXPCU_MISC_MODE4_RESERVED_RESET
#define MAC_PCU_MISC_MODE4_IGNORE_RXSM_INIT_STATE_MSB 		 RXPCU_MISC_MODE4_IGNORE_RXSM_INIT_STATE_MSB
#define MAC_PCU_MISC_MODE4_IGNORE_RXSM_INIT_STATE_LSB 		 RXPCU_MISC_MODE4_IGNORE_RXSM_INIT_STATE_LSB
#define MAC_PCU_MISC_MODE4_IGNORE_RXSM_INIT_STATE_MASK 		 RXPCU_MISC_MODE4_IGNORE_RXSM_INIT_STATE_MASK
#define MAC_PCU_MISC_MODE4_IGNORE_RXSM_INIT_STATE_GET(x) 		 RXPCU_MISC_MODE4_IGNORE_RXSM_INIT_STATE_GET(x)
#define MAC_PCU_MISC_MODE4_IGNORE_RXSM_INIT_STATE_SET(x) 		 RXPCU_MISC_MODE4_IGNORE_RXSM_INIT_STATE_SET(x)
#define MAC_PCU_MISC_MODE4_IGNORE_RXSM_INIT_STATE_RESET 		 RXPCU_MISC_MODE4_IGNORE_RXSM_INIT_STATE_RESET
#define MAC_PCU_MISC_MODE4_SMART_ANT_SEL_MSB 		 RXPCU_MISC_MODE4_SMART_ANT_SEL_MSB
#define MAC_PCU_MISC_MODE4_SMART_ANT_SEL_LSB 		 RXPCU_MISC_MODE4_SMART_ANT_SEL_LSB
#define MAC_PCU_MISC_MODE4_SMART_ANT_SEL_MASK 		 RXPCU_MISC_MODE4_SMART_ANT_SEL_MASK
#define MAC_PCU_MISC_MODE4_SMART_ANT_SEL_GET(x) 		 RXPCU_MISC_MODE4_SMART_ANT_SEL_GET(x)
#define MAC_PCU_MISC_MODE4_SMART_ANT_SEL_SET(x) 		 RXPCU_MISC_MODE4_SMART_ANT_SEL_SET(x)
#define MAC_PCU_MISC_MODE4_SMART_ANT_SEL_RESET 		 RXPCU_MISC_MODE4_SMART_ANT_SEL_RESET
#define MAC_PCU_MISC_MODE4_TX_CONFIG_PHY_ERR_ENABLE_MSB 		 RXPCU_MISC_MODE4_TX_CONFIG_PHY_ERR_ENABLE_MSB
#define MAC_PCU_MISC_MODE4_TX_CONFIG_PHY_ERR_ENABLE_LSB 		 RXPCU_MISC_MODE4_TX_CONFIG_PHY_ERR_ENABLE_LSB
#define MAC_PCU_MISC_MODE4_TX_CONFIG_PHY_ERR_ENABLE_MASK 		 RXPCU_MISC_MODE4_TX_CONFIG_PHY_ERR_ENABLE_MASK
#define MAC_PCU_MISC_MODE4_TX_CONFIG_PHY_ERR_ENABLE_GET(x) 		 RXPCU_MISC_MODE4_TX_CONFIG_PHY_ERR_ENABLE_GET(x)
#define MAC_PCU_MISC_MODE4_TX_CONFIG_PHY_ERR_ENABLE_SET(x) 		 RXPCU_MISC_MODE4_TX_CONFIG_PHY_ERR_ENABLE_SET(x)
#define MAC_PCU_MISC_MODE4_TX_CONFIG_PHY_ERR_ENABLE_RESET 		 RXPCU_MISC_MODE4_TX_CONFIG_PHY_ERR_ENABLE_RESET
#define MAC_PCU_MISC_MODE4_CTS2SELF_AD1_FIX_ENABLE_MSB 		 RXPCU_MISC_MODE4_CTS2SELF_AD1_FIX_ENABLE_MSB
#define MAC_PCU_MISC_MODE4_CTS2SELF_AD1_FIX_ENABLE_LSB 		 RXPCU_MISC_MODE4_CTS2SELF_AD1_FIX_ENABLE_LSB
#define MAC_PCU_MISC_MODE4_CTS2SELF_AD1_FIX_ENABLE_MASK 		 RXPCU_MISC_MODE4_CTS2SELF_AD1_FIX_ENABLE_MASK
#define MAC_PCU_MISC_MODE4_CTS2SELF_AD1_FIX_ENABLE_GET(x) 		 RXPCU_MISC_MODE4_CTS2SELF_AD1_FIX_ENABLE_GET(x)
#define MAC_PCU_MISC_MODE4_CTS2SELF_AD1_FIX_ENABLE_SET(x) 		 RXPCU_MISC_MODE4_CTS2SELF_AD1_FIX_ENABLE_SET(x)
#define MAC_PCU_MISC_MODE4_CTS2SELF_AD1_FIX_ENABLE_RESET 		 RXPCU_MISC_MODE4_CTS2SELF_AD1_FIX_ENABLE_RESET
#define MAC_PCU_MISC_MODE4_ZEROLEN_CRYPTO_ENABLE_MSB 		 RXPCU_MISC_MODE4_ZEROLEN_CRYPTO_ENABLE_MSB
#define MAC_PCU_MISC_MODE4_ZEROLEN_CRYPTO_ENABLE_LSB 		 RXPCU_MISC_MODE4_ZEROLEN_CRYPTO_ENABLE_LSB
#define MAC_PCU_MISC_MODE4_ZEROLEN_CRYPTO_ENABLE_MASK 		 RXPCU_MISC_MODE4_ZEROLEN_CRYPTO_ENABLE_MASK
#define MAC_PCU_MISC_MODE4_ZEROLEN_CRYPTO_ENABLE_GET(x) 		 RXPCU_MISC_MODE4_ZEROLEN_CRYPTO_ENABLE_GET(x)
#define MAC_PCU_MISC_MODE4_ZEROLEN_CRYPTO_ENABLE_SET(x) 		 RXPCU_MISC_MODE4_ZEROLEN_CRYPTO_ENABLE_SET(x)
#define MAC_PCU_MISC_MODE4_ZEROLEN_CRYPTO_ENABLE_RESET 		 RXPCU_MISC_MODE4_ZEROLEN_CRYPTO_ENABLE_RESET

#define MAC_PCU_MISC_MODE4_ENABLE_SF_MSB 		 RXPCU_MISC_MODE4_ENABLE_SF_MSB
#define MAC_PCU_MISC_MODE4_ENABLE_SF_LSB 		 RXPCU_MISC_MODE4_ENABLE_SF_LSB
#define MAC_PCU_MISC_MODE4_ENABLE_SF_MASK 		 RXPCU_MISC_MODE4_ENABLE_SF_MASK
#define MAC_PCU_MISC_MODE4_ENABLE_SF_GET(x) 		 RXPCU_MISC_MODE4_ENABLE_SF_GET(x)
#define MAC_PCU_MISC_MODE4_ENABLE_SF_SET(x) 		 RXPCU_MISC_MODE4_ENABLE_SF_SET(x)
#define MAC_PCU_MISC_MODE4_ENABLE_SF_RESET 		 RXPCU_MISC_MODE4_ENABLE_SF_RESET
#define MAC_PCU_MISC_MODE4_PEER_ENTRY_SWAP_MSB 		 RXPCU_MISC_MODE4_PEER_ENTRY_SWAP_MSB
#define MAC_PCU_MISC_MODE4_PEER_ENTRY_SWAP_LSB 		 RXPCU_MISC_MODE4_PEER_ENTRY_SWAP_LSB
#define MAC_PCU_MISC_MODE4_PEER_ENTRY_SWAP_MASK 		 RXPCU_MISC_MODE4_PEER_ENTRY_SWAP_MASK
#define MAC_PCU_MISC_MODE4_PEER_ENTRY_SWAP_GET(x) 		 RXPCU_MISC_MODE4_PEER_ENTRY_SWAP_GET(x)
#define MAC_PCU_MISC_MODE4_PEER_ENTRY_SWAP_SET(x) 		 RXPCU_MISC_MODE4_PEER_ENTRY_SWAP_SET(x)
#define MAC_PCU_MISC_MODE4_PEER_ENTRY_SWAP_RESET 		 RXPCU_MISC_MODE4_PEER_ENTRY_SWAP_RESET

#define MAC_PCU_MISC_MODE4_EV_83864_FIX_ENABLE_MSB 		 RXPCU_MISC_MODE4_EV_83864_FIX_ENABLE_MSB
#define MAC_PCU_MISC_MODE4_EV_83864_FIX_ENABLE_LSB 		 RXPCU_MISC_MODE4_EV_83864_FIX_ENABLE_LSB
#define MAC_PCU_MISC_MODE4_EV_83864_FIX_ENABLE_MASK 		 RXPCU_MISC_MODE4_EV_83864_FIX_ENABLE_MASK
#define MAC_PCU_MISC_MODE4_EV_83864_FIX_ENABLE_GET(x) 		 RXPCU_MISC_MODE4_EV_83864_FIX_ENABLE_GET(x)
#define MAC_PCU_MISC_MODE4_EV_83864_FIX_ENABLE_SET(x) 		 RXPCU_MISC_MODE4_EV_83864_FIX_ENABLE_SET(x)
#define MAC_PCU_MISC_MODE4_EV_83864_FIX_ENABLE_RESET 		 RXPCU_MISC_MODE4_EV_83864_FIX_ENABLE_RESET
#define MAC_PCU_MISC_MODE4_EV_78561_FIX_ENABLE_MSB 		 RXPCU_MISC_MODE4_EV_78561_FIX_ENABLE_MSB
#define MAC_PCU_MISC_MODE4_EV_78561_FIX_ENABLE_LSB 		 RXPCU_MISC_MODE4_EV_78561_FIX_ENABLE_LSB
#define MAC_PCU_MISC_MODE4_EV_78561_FIX_ENABLE_MASK 		 RXPCU_MISC_MODE4_EV_78561_FIX_ENABLE_MASK
#define MAC_PCU_MISC_MODE4_EV_78561_FIX_ENABLE_GET(x) 		 RXPCU_MISC_MODE4_EV_78561_FIX_ENABLE_GET(x)
#define MAC_PCU_MISC_MODE4_EV_78561_FIX_ENABLE_SET(x) 		 RXPCU_MISC_MODE4_EV_78561_FIX_ENABLE_SET(x)
#define MAC_PCU_MISC_MODE4_EV_78561_FIX_ENABLE_RESET 		 RXPCU_MISC_MODE4_EV_78561_FIX_ENABLE_RESET
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_UCAST_PROBE_RESP_MSB 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_UCAST_PROBE_RESP_MSB
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_UCAST_PROBE_RESP_LSB 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_UCAST_PROBE_RESP_LSB
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_UCAST_PROBE_RESP_MASK 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_UCAST_PROBE_RESP_MASK
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_UCAST_PROBE_RESP_GET(x) 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_UCAST_PROBE_RESP_GET(x)
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_UCAST_PROBE_RESP_SET(x) 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_UCAST_PROBE_RESP_SET(x)
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_UCAST_PROBE_RESP_RESET 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_UCAST_PROBE_RESP_RESET
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_UCAST_MOON_PROBE_RESP_MSB 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_UCAST_MOON_PROBE_RESP_MSB
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_UCAST_MOON_PROBE_RESP_LSB 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_UCAST_MOON_PROBE_RESP_LSB
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_UCAST_MOON_PROBE_RESP_MASK 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_UCAST_MOON_PROBE_RESP_MASK
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_UCAST_MOON_PROBE_RESP_GET(x) 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_UCAST_MOON_PROBE_RESP_GET(x)
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_UCAST_MOON_PROBE_RESP_SET(x) 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_UCAST_MOON_PROBE_RESP_SET(x)
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_UCAST_MOON_PROBE_RESP_RESET 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_UCAST_MOON_PROBE_RESP_RESET
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_MCAST_PROBE_RESP_MSB 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_MCAST_PROBE_RESP_MSB
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_MCAST_PROBE_RESP_LSB 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_MCAST_PROBE_RESP_LSB
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_MCAST_PROBE_RESP_MASK 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_MCAST_PROBE_RESP_MASK
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_MCAST_PROBE_RESP_GET(x) 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_MCAST_PROBE_RESP_GET(x)
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_MCAST_PROBE_RESP_SET(x) 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_MCAST_PROBE_RESP_SET(x)
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_MCAST_PROBE_RESP_RESET 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_MCAST_PROBE_RESP_RESET
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_BCAST_PROBE_RESP_MSB 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_BCAST_PROBE_RESP_MSB
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_BCAST_PROBE_RESP_LSB 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_BCAST_PROBE_RESP_LSB
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_BCAST_PROBE_RESP_MASK 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_BCAST_PROBE_RESP_MASK
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_BCAST_PROBE_RESP_GET(x) 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_BCAST_PROBE_RESP_GET(x)
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_BCAST_PROBE_RESP_SET(x) 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_BCAST_PROBE_RESP_SET(x)
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_BCAST_PROBE_RESP_RESET 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_BCAST_PROBE_RESP_RESET
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_BEACON_MSB 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_BEACON_MSB
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_BEACON_LSB 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_BEACON_LSB
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_BEACON_MASK 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_BEACON_MASK
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_BEACON_GET(x) 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_BEACON_GET(x)
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_BEACON_SET(x) 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_BEACON_SET(x)
#define MAC_PCU_MISC_MODE4_SYNC_TSF_ON_BEACON_RESET 		 RXPCU_MISC_MODE4_SYNC_TSF_ON_BEACON_RESET
#define MAC_PCU_MISC_MODE4_BC_MC_WAPI_MODE2_MSB 		 RXPCU_MISC_MODE4_BC_MC_WAPI_MODE2_MSB
#define MAC_PCU_MISC_MODE4_BC_MC_WAPI_MODE2_LSB 		 RXPCU_MISC_MODE4_BC_MC_WAPI_MODE2_LSB
#define MAC_PCU_MISC_MODE4_BC_MC_WAPI_MODE2_MASK 		 RXPCU_MISC_MODE4_BC_MC_WAPI_MODE2_MASK
#define MAC_PCU_MISC_MODE4_BC_MC_WAPI_MODE2_GET(x) 		 RXPCU_MISC_MODE4_BC_MC_WAPI_MODE2_GET(x)
#define MAC_PCU_MISC_MODE4_BC_MC_WAPI_MODE2_SET(x) 		 RXPCU_MISC_MODE4_BC_MC_WAPI_MODE2_SET(x)
#define MAC_PCU_MISC_MODE4_BC_MC_WAPI_MODE2_RESET 		 RXPCU_MISC_MODE4_BC_MC_WAPI_MODE2_RESET
#define MAC_PCU_MISC_MODE4_BC_MC_WAPI_MODE2_EN_MSB 		 RXPCU_MISC_MODE4_BC_MC_WAPI_MODE2_EN_MSB
#define MAC_PCU_MISC_MODE4_BC_MC_WAPI_MODE2_EN_LSB 		 RXPCU_MISC_MODE4_BC_MC_WAPI_MODE2_EN_LSB
#define MAC_PCU_MISC_MODE4_BC_MC_WAPI_MODE2_EN_MASK 		 RXPCU_MISC_MODE4_BC_MC_WAPI_MODE2_EN_MASK
#define MAC_PCU_MISC_MODE4_BC_MC_WAPI_MODE2_EN_GET(x) 		 RXPCU_MISC_MODE4_BC_MC_WAPI_MODE2_EN_GET(x)
#define MAC_PCU_MISC_MODE4_BC_MC_WAPI_MODE2_EN_SET(x) 		 RXPCU_MISC_MODE4_BC_MC_WAPI_MODE2_EN_SET(x)
#define MAC_PCU_MISC_MODE4_BC_MC_WAPI_MODE2_EN_RESET 		 RXPCU_MISC_MODE4_BC_MC_WAPI_MODE2_EN_RESET
#define MAC_PCU_MISC_MODE4_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_MISC_MODE4_ADDRESS
// SW modifiable bits
#define MAC_PCU_MISC_MODE4_SW_MASK 		 RXPCU_MISC_MODE4_SW_MASK
// bits defined at reset
#define MAC_PCU_MISC_MODE4_RSTMASK 		 RXPCU_MISC_MODE4_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_MISC_MODE4_RESET 		 RXPCU_MISC_MODE4_RESET

// 32'h83e0 (MAC_PCU_BASIC_RATE_SET0)
#define MAC_PCU_BASIC_RATE_SET0_VALUE_MSB 		 TXPCU_BASIC_RATE_SET0_VALUE_MSB
#define MAC_PCU_BASIC_RATE_SET0_VALUE_LSB 		 TXPCU_BASIC_RATE_SET0_VALUE_LSB
#define MAC_PCU_BASIC_RATE_SET0_VALUE_MASK 		 TXPCU_BASIC_RATE_SET0_VALUE_MASK
#define MAC_PCU_BASIC_RATE_SET0_VALUE_GET(x) 		 TXPCU_BASIC_RATE_SET0_VALUE_GET(x)
#define MAC_PCU_BASIC_RATE_SET0_VALUE_SET(x) 		 TXPCU_BASIC_RATE_SET0_VALUE_SET(x)
#define MAC_PCU_BASIC_RATE_SET0_VALUE_RESET 		 TXPCU_BASIC_RATE_SET0_VALUE_RESET
#define MAC_PCU_BASIC_RATE_SET0_ADDRESS 		 MAC_TXPCU_BASE_ADDRESS+TXPCU_BASIC_RATE_SET0_ADDRESS
// SW modifiable bits
#define MAC_PCU_BASIC_RATE_SET0_SW_MASK 		 TXPCU_BASIC_RATE_SET0_SW_MASK
// bits defined at reset
#define MAC_PCU_BASIC_RATE_SET0_RSTMASK 		 TXPCU_BASIC_RATE_SET0_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BASIC_RATE_SET0_RESET 		 TXPCU_BASIC_RATE_SET0_RESET

// 32'h83e4 (MAC_PCU_BASIC_RATE_SET1)
#define MAC_PCU_BASIC_RATE_SET1_VALUE_MSB 		 TXPCU_BASIC_RATE_SET1_VALUE_MSB
#define MAC_PCU_BASIC_RATE_SET1_VALUE_LSB 		 TXPCU_BASIC_RATE_SET1_VALUE_LSB
#define MAC_PCU_BASIC_RATE_SET1_VALUE_MASK 		 TXPCU_BASIC_RATE_SET1_VALUE_MASK
#define MAC_PCU_BASIC_RATE_SET1_VALUE_GET(x) 		 TXPCU_BASIC_RATE_SET1_VALUE_GET(x)
#define MAC_PCU_BASIC_RATE_SET1_VALUE_SET(x) 		 TXPCU_BASIC_RATE_SET1_VALUE_SET(x)
#define MAC_PCU_BASIC_RATE_SET1_VALUE_RESET 		 TXPCU_BASIC_RATE_SET1_VALUE_RESET
#define MAC_PCU_BASIC_RATE_SET1_ADDRESS 		 MAC_TXPCU_BASE_ADDRESS+TXPCU_BASIC_RATE_SET1_ADDRESS
// SW modifiable bits
#define MAC_PCU_BASIC_RATE_SET1_SW_MASK 		 TXPCU_BASIC_RATE_SET1_SW_MASK
// bits defined at reset
#define MAC_PCU_BASIC_RATE_SET1_RSTMASK 		 TXPCU_BASIC_RATE_SET1_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BASIC_RATE_SET1_RESET 		 TXPCU_BASIC_RATE_SET1_RESET

// 32'h83e8 (MAC_PCU_BASIC_RATE_SET2)
#define MAC_PCU_BASIC_RATE_SET2_VALUE_MSB 		 TXPCU_BASIC_RATE_SET2_VALUE_MSB
#define MAC_PCU_BASIC_RATE_SET2_VALUE_LSB 		 TXPCU_BASIC_RATE_SET2_VALUE_LSB
#define MAC_PCU_BASIC_RATE_SET2_VALUE_MASK 		 TXPCU_BASIC_RATE_SET2_VALUE_MASK
#define MAC_PCU_BASIC_RATE_SET2_VALUE_GET(x) 		 TXPCU_BASIC_RATE_SET2_VALUE_GET(x)
#define MAC_PCU_BASIC_RATE_SET2_VALUE_SET(x) 		 TXPCU_BASIC_RATE_SET2_VALUE_SET(x)
#define MAC_PCU_BASIC_RATE_SET2_VALUE_RESET 		 TXPCU_BASIC_RATE_SET2_VALUE_RESET
#define MAC_PCU_BASIC_RATE_SET2_ADDRESS 		 MAC_TXPCU_BASE_ADDRESS+TXPCU_BASIC_RATE_SET2_ADDRESS
// SW modifiable bits
#define MAC_PCU_BASIC_RATE_SET2_SW_MASK 		 TXPCU_BASIC_RATE_SET2_SW_MASK
// bits defined at reset
#define MAC_PCU_BASIC_RATE_SET2_RSTMASK 		 TXPCU_BASIC_RATE_SET2_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BASIC_RATE_SET2_RESET 		 TXPCU_BASIC_RATE_SET2_RESET

// 32'h83ec (MAC_PCU_BASIC_RATE_SET3)
#define MAC_PCU_BASIC_RATE_SET3_VALUE_MSB 		 TXPCU_BASIC_RATE_SET3_VALUE_MSB
#define MAC_PCU_BASIC_RATE_SET3_VALUE_LSB 		 TXPCU_BASIC_RATE_SET3_VALUE_LSB
#define MAC_PCU_BASIC_RATE_SET3_VALUE_MASK 		 TXPCU_BASIC_RATE_SET3_VALUE_MASK
#define MAC_PCU_BASIC_RATE_SET3_VALUE_GET(x) 		 TXPCU_BASIC_RATE_SET3_VALUE_GET(x)
#define MAC_PCU_BASIC_RATE_SET3_VALUE_SET(x) 		 TXPCU_BASIC_RATE_SET3_VALUE_SET(x)
#define MAC_PCU_BASIC_RATE_SET3_VALUE_RESET 		 TXPCU_BASIC_RATE_SET3_VALUE_RESET
#define MAC_PCU_BASIC_RATE_SET3_ADDRESS 		 MAC_TXPCU_BASE_ADDRESS+TXPCU_BASIC_RATE_SET3_ADDRESS
// SW modifiable bits
#define MAC_PCU_BASIC_RATE_SET3_SW_MASK 		 TXPCU_BASIC_RATE_SET3_SW_MASK
// bits defined at reset
#define MAC_PCU_BASIC_RATE_SET3_RSTMASK 		 TXPCU_BASIC_RATE_SET3_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BASIC_RATE_SET3_RESET 		 TXPCU_BASIC_RATE_SET3_RESET

// 32'h83f0 (MAC_PCU_BASIC_RATE_SET4)
#define MAC_PCU_BASIC_RATE_SET4_VALUE_MSB 		 TXPCU_BASIC_RATE_SET4_VALUE_MSB
#define MAC_PCU_BASIC_RATE_SET4_VALUE_LSB 		 TXPCU_BASIC_RATE_SET4_VALUE_LSB
#define MAC_PCU_BASIC_RATE_SET4_VALUE_MASK 		 TXPCU_BASIC_RATE_SET4_VALUE_MASK
#define MAC_PCU_BASIC_RATE_SET4_VALUE_GET(x) 		 TXPCU_BASIC_RATE_SET4_VALUE_GET(x)
#define MAC_PCU_BASIC_RATE_SET4_VALUE_SET(x) 		 TXPCU_BASIC_RATE_SET4_VALUE_SET(x)
#define MAC_PCU_BASIC_RATE_SET4_VALUE_RESET 		 TXPCU_BASIC_RATE_SET4_VALUE_RESET
#define MAC_PCU_BASIC_RATE_SET4_ADDRESS 		 MAC_TXPCU_BASE_ADDRESS+TXPCU_BASIC_RATE_SET4_ADDRESS
// SW modifiable bits
#define MAC_PCU_BASIC_RATE_SET4_SW_MASK 		 TXPCU_BASIC_RATE_SET4_SW_MASK
// bits defined at reset
#define MAC_PCU_BASIC_RATE_SET4_RSTMASK 		 TXPCU_BASIC_RATE_SET4_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BASIC_RATE_SET4_RESET 		 TXPCU_BASIC_RATE_SET4_RESET

// 32'h8500 (MAC_PCU_BT_BT_0)
#define MAC_PCU_BT_BT_0_WEIGHT_MSB 		 PTA_COEX_BT_BT_0_WEIGHT_MSB
#define MAC_PCU_BT_BT_0_WEIGHT_LSB 		 PTA_COEX_BT_BT_0_WEIGHT_LSB
#define MAC_PCU_BT_BT_0_WEIGHT_MASK 		 PTA_COEX_BT_BT_0_WEIGHT_MASK
#define MAC_PCU_BT_BT_0_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_0_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_0_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_0_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_0_WEIGHT_RESET 		 PTA_COEX_BT_BT_0_WEIGHT_RESET
#define MAC_PCU_BT_BT_0_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_0_ADDRESS
#define MAC_PCU_BT_BT_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_0_SW_MASK 		 PTA_COEX_BT_BT_0_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_0_RSTMASK 		 PTA_COEX_BT_BT_0_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_0_RESET 		 PTA_COEX_BT_BT_0_RESET

// 32'h8504 (MAC_PCU_BT_BT_1)
#define MAC_PCU_BT_BT_1_WEIGHT_MSB 		 PTA_COEX_BT_BT_1_WEIGHT_MSB
#define MAC_PCU_BT_BT_1_WEIGHT_LSB 		 PTA_COEX_BT_BT_1_WEIGHT_LSB
#define MAC_PCU_BT_BT_1_WEIGHT_MASK 		 PTA_COEX_BT_BT_1_WEIGHT_MASK
#define MAC_PCU_BT_BT_1_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_1_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_1_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_1_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_1_WEIGHT_RESET 		 PTA_COEX_BT_BT_1_WEIGHT_RESET
#define MAC_PCU_BT_BT_1_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_1_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_1_SW_MASK 		 PTA_COEX_BT_BT_1_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_1_RSTMASK 		 PTA_COEX_BT_BT_1_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_1_RESET 		 PTA_COEX_BT_BT_1_RESET

// 32'h8508 (MAC_PCU_BT_BT_2)
#define MAC_PCU_BT_BT_2_WEIGHT_MSB 		 PTA_COEX_BT_BT_2_WEIGHT_MSB
#define MAC_PCU_BT_BT_2_WEIGHT_LSB 		 PTA_COEX_BT_BT_2_WEIGHT_LSB
#define MAC_PCU_BT_BT_2_WEIGHT_MASK 		 PTA_COEX_BT_BT_2_WEIGHT_MASK
#define MAC_PCU_BT_BT_2_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_2_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_2_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_2_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_2_WEIGHT_RESET 		 PTA_COEX_BT_BT_2_WEIGHT_RESET
#define MAC_PCU_BT_BT_2_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_2_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_2_SW_MASK 		 PTA_COEX_BT_BT_2_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_2_RSTMASK 		 PTA_COEX_BT_BT_2_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_2_RESET 		 PTA_COEX_BT_BT_2_RESET

// 32'h850c (MAC_PCU_BT_BT_3)
#define MAC_PCU_BT_BT_3_WEIGHT_MSB 		 PTA_COEX_BT_BT_3_WEIGHT_MSB
#define MAC_PCU_BT_BT_3_WEIGHT_LSB 		 PTA_COEX_BT_BT_3_WEIGHT_LSB
#define MAC_PCU_BT_BT_3_WEIGHT_MASK 		 PTA_COEX_BT_BT_3_WEIGHT_MASK
#define MAC_PCU_BT_BT_3_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_3_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_3_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_3_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_3_WEIGHT_RESET 		 PTA_COEX_BT_BT_3_WEIGHT_RESET
#define MAC_PCU_BT_BT_3_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_3_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_3_SW_MASK 		 PTA_COEX_BT_BT_3_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_3_RSTMASK 		 PTA_COEX_BT_BT_3_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_3_RESET 		 PTA_COEX_BT_BT_3_RESET

// 32'h8510 (MAC_PCU_BT_BT_4)
#define MAC_PCU_BT_BT_4_WEIGHT_MSB 		 PTA_COEX_BT_BT_4_WEIGHT_MSB
#define MAC_PCU_BT_BT_4_WEIGHT_LSB 		 PTA_COEX_BT_BT_4_WEIGHT_LSB
#define MAC_PCU_BT_BT_4_WEIGHT_MASK 		 PTA_COEX_BT_BT_4_WEIGHT_MASK
#define MAC_PCU_BT_BT_4_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_4_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_4_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_4_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_4_WEIGHT_RESET 		 PTA_COEX_BT_BT_4_WEIGHT_RESET
#define MAC_PCU_BT_BT_4_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_4_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_4_SW_MASK 		 PTA_COEX_BT_BT_4_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_4_RSTMASK 		 PTA_COEX_BT_BT_4_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_4_RESET 		 PTA_COEX_BT_BT_4_RESET

// 32'h8514 (MAC_PCU_BT_BT_5)
#define MAC_PCU_BT_BT_5_WEIGHT_MSB 		 PTA_COEX_BT_BT_5_WEIGHT_MSB
#define MAC_PCU_BT_BT_5_WEIGHT_LSB 		 PTA_COEX_BT_BT_5_WEIGHT_LSB
#define MAC_PCU_BT_BT_5_WEIGHT_MASK 		 PTA_COEX_BT_BT_5_WEIGHT_MASK
#define MAC_PCU_BT_BT_5_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_5_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_5_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_5_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_5_WEIGHT_RESET 		 PTA_COEX_BT_BT_5_WEIGHT_RESET
#define MAC_PCU_BT_BT_5_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_5_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_5_SW_MASK 		 PTA_COEX_BT_BT_5_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_5_RSTMASK 		 PTA_COEX_BT_BT_5_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_5_RESET 		 PTA_COEX_BT_BT_5_RESET

// 32'h8518 (MAC_PCU_BT_BT_6)
#define MAC_PCU_BT_BT_6_WEIGHT_MSB 		 PTA_COEX_BT_BT_6_WEIGHT_MSB
#define MAC_PCU_BT_BT_6_WEIGHT_LSB 		 PTA_COEX_BT_BT_6_WEIGHT_LSB
#define MAC_PCU_BT_BT_6_WEIGHT_MASK 		 PTA_COEX_BT_BT_6_WEIGHT_MASK
#define MAC_PCU_BT_BT_6_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_6_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_6_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_6_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_6_WEIGHT_RESET 		 PTA_COEX_BT_BT_6_WEIGHT_RESET
#define MAC_PCU_BT_BT_6_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_6_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_6_SW_MASK 		 PTA_COEX_BT_BT_6_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_6_RSTMASK 		 PTA_COEX_BT_BT_6_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_6_RESET 		 PTA_COEX_BT_BT_6_RESET

// 32'h851c (MAC_PCU_BT_BT_7)
#define MAC_PCU_BT_BT_7_WEIGHT_MSB 		 PTA_COEX_BT_BT_7_WEIGHT_MSB
#define MAC_PCU_BT_BT_7_WEIGHT_LSB 		 PTA_COEX_BT_BT_7_WEIGHT_LSB
#define MAC_PCU_BT_BT_7_WEIGHT_MASK 		 PTA_COEX_BT_BT_7_WEIGHT_MASK
#define MAC_PCU_BT_BT_7_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_7_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_7_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_7_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_7_WEIGHT_RESET 		 PTA_COEX_BT_BT_7_WEIGHT_RESET
#define MAC_PCU_BT_BT_7_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_7_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_7_SW_MASK 		 PTA_COEX_BT_BT_7_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_7_RSTMASK 		 PTA_COEX_BT_BT_7_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_7_RESET 		 PTA_COEX_BT_BT_7_RESET

// 32'h8520 (MAC_PCU_BT_BT_8)
#define MAC_PCU_BT_BT_8_WEIGHT_MSB 		 PTA_COEX_BT_BT_8_WEIGHT_MSB
#define MAC_PCU_BT_BT_8_WEIGHT_LSB 		 PTA_COEX_BT_BT_8_WEIGHT_LSB
#define MAC_PCU_BT_BT_8_WEIGHT_MASK 		 PTA_COEX_BT_BT_8_WEIGHT_MASK
#define MAC_PCU_BT_BT_8_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_8_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_8_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_8_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_8_WEIGHT_RESET 		 PTA_COEX_BT_BT_8_WEIGHT_RESET
#define MAC_PCU_BT_BT_8_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_8_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_8_SW_MASK 		 PTA_COEX_BT_BT_8_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_8_RSTMASK 		 PTA_COEX_BT_BT_8_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_8_RESET 		 PTA_COEX_BT_BT_8_RESET

// 32'h8524 (MAC_PCU_BT_BT_9)
#define MAC_PCU_BT_BT_9_WEIGHT_MSB 		 PTA_COEX_BT_BT_9_WEIGHT_MSB
#define MAC_PCU_BT_BT_9_WEIGHT_LSB 		 PTA_COEX_BT_BT_9_WEIGHT_LSB
#define MAC_PCU_BT_BT_9_WEIGHT_MASK 		 PTA_COEX_BT_BT_9_WEIGHT_MASK
#define MAC_PCU_BT_BT_9_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_9_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_9_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_9_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_9_WEIGHT_RESET 		 PTA_COEX_BT_BT_9_WEIGHT_RESET
#define MAC_PCU_BT_BT_9_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_9_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_9_SW_MASK 		 PTA_COEX_BT_BT_9_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_9_RSTMASK 		 PTA_COEX_BT_BT_9_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_9_RESET 		 PTA_COEX_BT_BT_9_RESET

// 32'h8528 (MAC_PCU_BT_BT_10)
#define MAC_PCU_BT_BT_10_WEIGHT_MSB 		 PTA_COEX_BT_BT_10_WEIGHT_MSB
#define MAC_PCU_BT_BT_10_WEIGHT_LSB 		 PTA_COEX_BT_BT_10_WEIGHT_LSB
#define MAC_PCU_BT_BT_10_WEIGHT_MASK 		 PTA_COEX_BT_BT_10_WEIGHT_MASK
#define MAC_PCU_BT_BT_10_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_10_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_10_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_10_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_10_WEIGHT_RESET 		 PTA_COEX_BT_BT_10_WEIGHT_RESET
#define MAC_PCU_BT_BT_10_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_10_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_10_SW_MASK 		 PTA_COEX_BT_BT_10_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_10_RSTMASK 		 PTA_COEX_BT_BT_10_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_10_RESET 		 PTA_COEX_BT_BT_10_RESET

// 32'h852c (MAC_PCU_BT_BT_11)
#define MAC_PCU_BT_BT_11_WEIGHT_MSB 		 PTA_COEX_BT_BT_11_WEIGHT_MSB
#define MAC_PCU_BT_BT_11_WEIGHT_LSB 		 PTA_COEX_BT_BT_11_WEIGHT_LSB
#define MAC_PCU_BT_BT_11_WEIGHT_MASK 		 PTA_COEX_BT_BT_11_WEIGHT_MASK
#define MAC_PCU_BT_BT_11_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_11_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_11_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_11_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_11_WEIGHT_RESET 		 PTA_COEX_BT_BT_11_WEIGHT_RESET
#define MAC_PCU_BT_BT_11_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_11_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_11_SW_MASK 		 PTA_COEX_BT_BT_11_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_11_RSTMASK 		 PTA_COEX_BT_BT_11_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_11_RESET 		 PTA_COEX_BT_BT_11_RESET

// 32'h8530 (MAC_PCU_BT_BT_12)
#define MAC_PCU_BT_BT_12_WEIGHT_MSB 		 PTA_COEX_BT_BT_12_WEIGHT_MSB
#define MAC_PCU_BT_BT_12_WEIGHT_LSB 		 PTA_COEX_BT_BT_12_WEIGHT_LSB
#define MAC_PCU_BT_BT_12_WEIGHT_MASK 		 PTA_COEX_BT_BT_12_WEIGHT_MASK
#define MAC_PCU_BT_BT_12_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_12_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_12_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_12_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_12_WEIGHT_RESET 		 PTA_COEX_BT_BT_12_WEIGHT_RESET
#define MAC_PCU_BT_BT_12_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_12_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_12_SW_MASK 		 PTA_COEX_BT_BT_12_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_12_RSTMASK 		 PTA_COEX_BT_BT_12_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_12_RESET 		 PTA_COEX_BT_BT_12_RESET

// 32'h8534 (MAC_PCU_BT_BT_13)
#define MAC_PCU_BT_BT_13_WEIGHT_MSB 		 PTA_COEX_BT_BT_13_WEIGHT_MSB
#define MAC_PCU_BT_BT_13_WEIGHT_LSB 		 PTA_COEX_BT_BT_13_WEIGHT_LSB
#define MAC_PCU_BT_BT_13_WEIGHT_MASK 		 PTA_COEX_BT_BT_13_WEIGHT_MASK
#define MAC_PCU_BT_BT_13_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_13_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_13_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_13_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_13_WEIGHT_RESET 		 PTA_COEX_BT_BT_13_WEIGHT_RESET
#define MAC_PCU_BT_BT_13_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_13_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_13_SW_MASK 		 PTA_COEX_BT_BT_13_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_13_RSTMASK 		 PTA_COEX_BT_BT_13_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_13_RESET 		 PTA_COEX_BT_BT_13_RESET

// 32'h8538 (MAC_PCU_BT_BT_14)
#define MAC_PCU_BT_BT_14_WEIGHT_MSB 		 PTA_COEX_BT_BT_14_WEIGHT_MSB
#define MAC_PCU_BT_BT_14_WEIGHT_LSB 		 PTA_COEX_BT_BT_14_WEIGHT_LSB
#define MAC_PCU_BT_BT_14_WEIGHT_MASK 		 PTA_COEX_BT_BT_14_WEIGHT_MASK
#define MAC_PCU_BT_BT_14_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_14_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_14_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_14_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_14_WEIGHT_RESET 		 PTA_COEX_BT_BT_14_WEIGHT_RESET
#define MAC_PCU_BT_BT_14_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_14_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_14_SW_MASK 		 PTA_COEX_BT_BT_14_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_14_RSTMASK 		 PTA_COEX_BT_BT_14_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_14_RESET 		 PTA_COEX_BT_BT_14_RESET

// 32'h853c (MAC_PCU_BT_BT_15)
#define MAC_PCU_BT_BT_15_WEIGHT_MSB 		 PTA_COEX_BT_BT_15_WEIGHT_MSB
#define MAC_PCU_BT_BT_15_WEIGHT_LSB 		 PTA_COEX_BT_BT_15_WEIGHT_LSB
#define MAC_PCU_BT_BT_15_WEIGHT_MASK 		 PTA_COEX_BT_BT_15_WEIGHT_MASK
#define MAC_PCU_BT_BT_15_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_15_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_15_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_15_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_15_WEIGHT_RESET 		 PTA_COEX_BT_BT_15_WEIGHT_RESET
#define MAC_PCU_BT_BT_15_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_15_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_15_SW_MASK 		 PTA_COEX_BT_BT_15_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_15_RSTMASK 		 PTA_COEX_BT_BT_15_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_15_RESET 		 PTA_COEX_BT_BT_15_RESET

// 32'h8540 (MAC_PCU_BT_BT_16)
#define MAC_PCU_BT_BT_16_WEIGHT_MSB 		 PTA_COEX_BT_BT_16_WEIGHT_MSB
#define MAC_PCU_BT_BT_16_WEIGHT_LSB 		 PTA_COEX_BT_BT_16_WEIGHT_LSB
#define MAC_PCU_BT_BT_16_WEIGHT_MASK 		 PTA_COEX_BT_BT_16_WEIGHT_MASK
#define MAC_PCU_BT_BT_16_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_16_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_16_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_16_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_16_WEIGHT_RESET 		 PTA_COEX_BT_BT_16_WEIGHT_RESET
#define MAC_PCU_BT_BT_16_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_16_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_16_SW_MASK 		 PTA_COEX_BT_BT_16_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_16_RSTMASK 		 PTA_COEX_BT_BT_16_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_16_RESET 		 PTA_COEX_BT_BT_16_RESET

// 32'h8544 (MAC_PCU_BT_BT_17)
#define MAC_PCU_BT_BT_17_WEIGHT_MSB 		 PTA_COEX_BT_BT_17_WEIGHT_MSB
#define MAC_PCU_BT_BT_17_WEIGHT_LSB 		 PTA_COEX_BT_BT_17_WEIGHT_LSB
#define MAC_PCU_BT_BT_17_WEIGHT_MASK 		 PTA_COEX_BT_BT_17_WEIGHT_MASK
#define MAC_PCU_BT_BT_17_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_17_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_17_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_17_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_17_WEIGHT_RESET 		 PTA_COEX_BT_BT_17_WEIGHT_RESET
#define MAC_PCU_BT_BT_17_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_17_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_17_SW_MASK 		 PTA_COEX_BT_BT_17_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_17_RSTMASK 		 PTA_COEX_BT_BT_17_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_17_RESET 		 PTA_COEX_BT_BT_17_RESET

// 32'h8548 (MAC_PCU_BT_BT_18)
#define MAC_PCU_BT_BT_18_WEIGHT_MSB 		 PTA_COEX_BT_BT_18_WEIGHT_MSB
#define MAC_PCU_BT_BT_18_WEIGHT_LSB 		 PTA_COEX_BT_BT_18_WEIGHT_LSB
#define MAC_PCU_BT_BT_18_WEIGHT_MASK 		 PTA_COEX_BT_BT_18_WEIGHT_MASK
#define MAC_PCU_BT_BT_18_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_18_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_18_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_18_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_18_WEIGHT_RESET 		 PTA_COEX_BT_BT_18_WEIGHT_RESET
#define MAC_PCU_BT_BT_18_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_18_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_18_SW_MASK 		 PTA_COEX_BT_BT_18_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_18_RSTMASK 		 PTA_COEX_BT_BT_18_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_18_RESET 		 PTA_COEX_BT_BT_18_RESET

// 32'h854c (MAC_PCU_BT_BT_19)
#define MAC_PCU_BT_BT_19_WEIGHT_MSB 		 PTA_COEX_BT_BT_19_WEIGHT_MSB
#define MAC_PCU_BT_BT_19_WEIGHT_LSB 		 PTA_COEX_BT_BT_19_WEIGHT_LSB
#define MAC_PCU_BT_BT_19_WEIGHT_MASK 		 PTA_COEX_BT_BT_19_WEIGHT_MASK
#define MAC_PCU_BT_BT_19_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_19_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_19_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_19_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_19_WEIGHT_RESET 		 PTA_COEX_BT_BT_19_WEIGHT_RESET
#define MAC_PCU_BT_BT_19_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_19_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_19_SW_MASK 		 PTA_COEX_BT_BT_19_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_19_RSTMASK 		 PTA_COEX_BT_BT_19_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_19_RESET 		 PTA_COEX_BT_BT_19_RESET

// 32'h8550 (MAC_PCU_BT_BT_20)
#define MAC_PCU_BT_BT_20_WEIGHT_MSB 		 PTA_COEX_BT_BT_20_WEIGHT_MSB
#define MAC_PCU_BT_BT_20_WEIGHT_LSB 		 PTA_COEX_BT_BT_20_WEIGHT_LSB
#define MAC_PCU_BT_BT_20_WEIGHT_MASK 		 PTA_COEX_BT_BT_20_WEIGHT_MASK
#define MAC_PCU_BT_BT_20_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_20_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_20_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_20_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_20_WEIGHT_RESET 		 PTA_COEX_BT_BT_20_WEIGHT_RESET
#define MAC_PCU_BT_BT_20_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_20_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_20_SW_MASK 		 PTA_COEX_BT_BT_20_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_20_RSTMASK 		 PTA_COEX_BT_BT_20_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_20_RESET 		 PTA_COEX_BT_BT_20_RESET

// 32'h8554 (MAC_PCU_BT_BT_21)
#define MAC_PCU_BT_BT_21_WEIGHT_MSB 		 PTA_COEX_BT_BT_21_WEIGHT_MSB
#define MAC_PCU_BT_BT_21_WEIGHT_LSB 		 PTA_COEX_BT_BT_21_WEIGHT_LSB
#define MAC_PCU_BT_BT_21_WEIGHT_MASK 		 PTA_COEX_BT_BT_21_WEIGHT_MASK
#define MAC_PCU_BT_BT_21_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_21_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_21_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_21_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_21_WEIGHT_RESET 		 PTA_COEX_BT_BT_21_WEIGHT_RESET
#define MAC_PCU_BT_BT_21_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_21_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_21_SW_MASK 		 PTA_COEX_BT_BT_21_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_21_RSTMASK 		 PTA_COEX_BT_BT_21_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_21_RESET 		 PTA_COEX_BT_BT_21_RESET

// 32'h8558 (MAC_PCU_BT_BT_22)
#define MAC_PCU_BT_BT_22_WEIGHT_MSB 		 PTA_COEX_BT_BT_22_WEIGHT_MSB
#define MAC_PCU_BT_BT_22_WEIGHT_LSB 		 PTA_COEX_BT_BT_22_WEIGHT_LSB
#define MAC_PCU_BT_BT_22_WEIGHT_MASK 		 PTA_COEX_BT_BT_22_WEIGHT_MASK
#define MAC_PCU_BT_BT_22_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_22_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_22_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_22_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_22_WEIGHT_RESET 		 PTA_COEX_BT_BT_22_WEIGHT_RESET
#define MAC_PCU_BT_BT_22_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_22_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_22_SW_MASK 		 PTA_COEX_BT_BT_22_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_22_RSTMASK 		 PTA_COEX_BT_BT_22_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_22_RESET 		 PTA_COEX_BT_BT_22_RESET

// 32'h855c (MAC_PCU_BT_BT_23)
#define MAC_PCU_BT_BT_23_WEIGHT_MSB 		 PTA_COEX_BT_BT_23_WEIGHT_MSB
#define MAC_PCU_BT_BT_23_WEIGHT_LSB 		 PTA_COEX_BT_BT_23_WEIGHT_LSB
#define MAC_PCU_BT_BT_23_WEIGHT_MASK 		 PTA_COEX_BT_BT_23_WEIGHT_MASK
#define MAC_PCU_BT_BT_23_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_23_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_23_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_23_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_23_WEIGHT_RESET 		 PTA_COEX_BT_BT_23_WEIGHT_RESET
#define MAC_PCU_BT_BT_23_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_23_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_23_SW_MASK 		 PTA_COEX_BT_BT_23_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_23_RSTMASK 		 PTA_COEX_BT_BT_23_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_23_RESET 		 PTA_COEX_BT_BT_23_RESET

// 32'h8560 (MAC_PCU_BT_BT_24)
#define MAC_PCU_BT_BT_24_WEIGHT_MSB 		 PTA_COEX_BT_BT_24_WEIGHT_MSB
#define MAC_PCU_BT_BT_24_WEIGHT_LSB 		 PTA_COEX_BT_BT_24_WEIGHT_LSB
#define MAC_PCU_BT_BT_24_WEIGHT_MASK 		 PTA_COEX_BT_BT_24_WEIGHT_MASK
#define MAC_PCU_BT_BT_24_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_24_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_24_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_24_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_24_WEIGHT_RESET 		 PTA_COEX_BT_BT_24_WEIGHT_RESET
#define MAC_PCU_BT_BT_24_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_24_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_24_SW_MASK 		 PTA_COEX_BT_BT_24_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_24_RSTMASK 		 PTA_COEX_BT_BT_24_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_24_RESET 		 PTA_COEX_BT_BT_24_RESET

// 32'h8564 (MAC_PCU_BT_BT_25)
#define MAC_PCU_BT_BT_25_WEIGHT_MSB 		 PTA_COEX_BT_BT_25_WEIGHT_MSB
#define MAC_PCU_BT_BT_25_WEIGHT_LSB 		 PTA_COEX_BT_BT_25_WEIGHT_LSB
#define MAC_PCU_BT_BT_25_WEIGHT_MASK 		 PTA_COEX_BT_BT_25_WEIGHT_MASK
#define MAC_PCU_BT_BT_25_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_25_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_25_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_25_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_25_WEIGHT_RESET 		 PTA_COEX_BT_BT_25_WEIGHT_RESET
#define MAC_PCU_BT_BT_25_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_25_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_25_SW_MASK 		 PTA_COEX_BT_BT_25_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_25_RSTMASK 		 PTA_COEX_BT_BT_25_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_25_RESET 		 PTA_COEX_BT_BT_25_RESET

// 32'h8568 (MAC_PCU_BT_BT_26)
#define MAC_PCU_BT_BT_26_WEIGHT_MSB 		 PTA_COEX_BT_BT_26_WEIGHT_MSB
#define MAC_PCU_BT_BT_26_WEIGHT_LSB 		 PTA_COEX_BT_BT_26_WEIGHT_LSB
#define MAC_PCU_BT_BT_26_WEIGHT_MASK 		 PTA_COEX_BT_BT_26_WEIGHT_MASK
#define MAC_PCU_BT_BT_26_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_26_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_26_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_26_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_26_WEIGHT_RESET 		 PTA_COEX_BT_BT_26_WEIGHT_RESET
#define MAC_PCU_BT_BT_26_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_26_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_26_SW_MASK 		 PTA_COEX_BT_BT_26_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_26_RSTMASK 		 PTA_COEX_BT_BT_26_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_26_RESET 		 PTA_COEX_BT_BT_26_RESET

// 32'h856c (MAC_PCU_BT_BT_27)
#define MAC_PCU_BT_BT_27_WEIGHT_MSB 		 PTA_COEX_BT_BT_27_WEIGHT_MSB
#define MAC_PCU_BT_BT_27_WEIGHT_LSB 		 PTA_COEX_BT_BT_27_WEIGHT_LSB
#define MAC_PCU_BT_BT_27_WEIGHT_MASK 		 PTA_COEX_BT_BT_27_WEIGHT_MASK
#define MAC_PCU_BT_BT_27_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_27_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_27_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_27_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_27_WEIGHT_RESET 		 PTA_COEX_BT_BT_27_WEIGHT_RESET
#define MAC_PCU_BT_BT_27_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_27_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_27_SW_MASK 		 PTA_COEX_BT_BT_27_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_27_RSTMASK 		 PTA_COEX_BT_BT_27_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_27_RESET 		 PTA_COEX_BT_BT_27_RESET

// 32'h8570 (MAC_PCU_BT_BT_28)
#define MAC_PCU_BT_BT_28_WEIGHT_MSB 		 PTA_COEX_BT_BT_28_WEIGHT_MSB
#define MAC_PCU_BT_BT_28_WEIGHT_LSB 		 PTA_COEX_BT_BT_28_WEIGHT_LSB
#define MAC_PCU_BT_BT_28_WEIGHT_MASK 		 PTA_COEX_BT_BT_28_WEIGHT_MASK
#define MAC_PCU_BT_BT_28_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_28_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_28_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_28_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_28_WEIGHT_RESET 		 PTA_COEX_BT_BT_28_WEIGHT_RESET
#define MAC_PCU_BT_BT_28_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_28_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_28_SW_MASK 		 PTA_COEX_BT_BT_28_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_28_RSTMASK 		 PTA_COEX_BT_BT_28_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_28_RESET 		 PTA_COEX_BT_BT_28_RESET

// 32'h8574 (MAC_PCU_BT_BT_29)
#define MAC_PCU_BT_BT_29_WEIGHT_MSB 		 PTA_COEX_BT_BT_29_WEIGHT_MSB
#define MAC_PCU_BT_BT_29_WEIGHT_LSB 		 PTA_COEX_BT_BT_29_WEIGHT_LSB
#define MAC_PCU_BT_BT_29_WEIGHT_MASK 		 PTA_COEX_BT_BT_29_WEIGHT_MASK
#define MAC_PCU_BT_BT_29_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_29_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_29_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_29_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_29_WEIGHT_RESET 		 PTA_COEX_BT_BT_29_WEIGHT_RESET
#define MAC_PCU_BT_BT_29_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_29_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_29_SW_MASK 		 PTA_COEX_BT_BT_29_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_29_RSTMASK 		 PTA_COEX_BT_BT_29_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_29_RESET 		 PTA_COEX_BT_BT_29_RESET

// 32'h8578 (MAC_PCU_BT_BT_30)
#define MAC_PCU_BT_BT_30_WEIGHT_MSB 		 PTA_COEX_BT_BT_30_WEIGHT_MSB
#define MAC_PCU_BT_BT_30_WEIGHT_LSB 		 PTA_COEX_BT_BT_30_WEIGHT_LSB
#define MAC_PCU_BT_BT_30_WEIGHT_MASK 		 PTA_COEX_BT_BT_30_WEIGHT_MASK
#define MAC_PCU_BT_BT_30_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_30_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_30_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_30_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_30_WEIGHT_RESET 		 PTA_COEX_BT_BT_30_WEIGHT_RESET
#define MAC_PCU_BT_BT_30_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_30_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_30_SW_MASK 		 PTA_COEX_BT_BT_30_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_30_RSTMASK 		 PTA_COEX_BT_BT_30_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_30_RESET 		 PTA_COEX_BT_BT_30_RESET

// 32'h857c (MAC_PCU_BT_BT_31)
#define MAC_PCU_BT_BT_31_WEIGHT_MSB 		 PTA_COEX_BT_BT_31_WEIGHT_MSB
#define MAC_PCU_BT_BT_31_WEIGHT_LSB 		 PTA_COEX_BT_BT_31_WEIGHT_LSB
#define MAC_PCU_BT_BT_31_WEIGHT_MASK 		 PTA_COEX_BT_BT_31_WEIGHT_MASK
#define MAC_PCU_BT_BT_31_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_31_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_31_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_31_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_31_WEIGHT_RESET 		 PTA_COEX_BT_BT_31_WEIGHT_RESET
#define MAC_PCU_BT_BT_31_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_31_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_31_SW_MASK 		 PTA_COEX_BT_BT_31_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_31_RSTMASK 		 PTA_COEX_BT_BT_31_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_31_RESET 		 PTA_COEX_BT_BT_31_RESET

// 32'h8580 (MAC_PCU_BT_BT_32)
#define MAC_PCU_BT_BT_32_WEIGHT_MSB 		 PTA_COEX_BT_BT_32_WEIGHT_MSB
#define MAC_PCU_BT_BT_32_WEIGHT_LSB 		 PTA_COEX_BT_BT_32_WEIGHT_LSB
#define MAC_PCU_BT_BT_32_WEIGHT_MASK 		 PTA_COEX_BT_BT_32_WEIGHT_MASK
#define MAC_PCU_BT_BT_32_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_32_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_32_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_32_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_32_WEIGHT_RESET 		 PTA_COEX_BT_BT_32_WEIGHT_RESET
#define MAC_PCU_BT_BT_32_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_32_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_32_SW_MASK 		 PTA_COEX_BT_BT_32_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_32_RSTMASK 		 PTA_COEX_BT_BT_32_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_32_RESET 		 PTA_COEX_BT_BT_32_RESET

// 32'h8584 (MAC_PCU_BT_BT_33)
#define MAC_PCU_BT_BT_33_WEIGHT_MSB 		 PTA_COEX_BT_BT_33_WEIGHT_MSB
#define MAC_PCU_BT_BT_33_WEIGHT_LSB 		 PTA_COEX_BT_BT_33_WEIGHT_LSB
#define MAC_PCU_BT_BT_33_WEIGHT_MASK 		 PTA_COEX_BT_BT_33_WEIGHT_MASK
#define MAC_PCU_BT_BT_33_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_33_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_33_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_33_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_33_WEIGHT_RESET 		 PTA_COEX_BT_BT_33_WEIGHT_RESET
#define MAC_PCU_BT_BT_33_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_33_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_33_SW_MASK 		 PTA_COEX_BT_BT_33_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_33_RSTMASK 		 PTA_COEX_BT_BT_33_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_33_RESET 		 PTA_COEX_BT_BT_33_RESET

// 32'h8588 (MAC_PCU_BT_BT_34)
#define MAC_PCU_BT_BT_34_WEIGHT_MSB 		 PTA_COEX_BT_BT_34_WEIGHT_MSB
#define MAC_PCU_BT_BT_34_WEIGHT_LSB 		 PTA_COEX_BT_BT_34_WEIGHT_LSB
#define MAC_PCU_BT_BT_34_WEIGHT_MASK 		 PTA_COEX_BT_BT_34_WEIGHT_MASK
#define MAC_PCU_BT_BT_34_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_34_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_34_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_34_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_34_WEIGHT_RESET 		 PTA_COEX_BT_BT_34_WEIGHT_RESET
#define MAC_PCU_BT_BT_34_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_34_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_34_SW_MASK 		 PTA_COEX_BT_BT_34_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_34_RSTMASK 		 PTA_COEX_BT_BT_34_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_34_RESET 		 PTA_COEX_BT_BT_34_RESET

// 32'h858c (MAC_PCU_BT_BT_35)
#define MAC_PCU_BT_BT_35_WEIGHT_MSB 		 PTA_COEX_BT_BT_35_WEIGHT_MSB
#define MAC_PCU_BT_BT_35_WEIGHT_LSB 		 PTA_COEX_BT_BT_35_WEIGHT_LSB
#define MAC_PCU_BT_BT_35_WEIGHT_MASK 		 PTA_COEX_BT_BT_35_WEIGHT_MASK
#define MAC_PCU_BT_BT_35_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_35_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_35_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_35_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_35_WEIGHT_RESET 		 PTA_COEX_BT_BT_35_WEIGHT_RESET
#define MAC_PCU_BT_BT_35_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_35_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_35_SW_MASK 		 PTA_COEX_BT_BT_35_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_35_RSTMASK 		 PTA_COEX_BT_BT_35_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_35_RESET 		 PTA_COEX_BT_BT_35_RESET

// 32'h8590 (MAC_PCU_BT_BT_36)
#define MAC_PCU_BT_BT_36_WEIGHT_MSB 		 PTA_COEX_BT_BT_36_WEIGHT_MSB
#define MAC_PCU_BT_BT_36_WEIGHT_LSB 		 PTA_COEX_BT_BT_36_WEIGHT_LSB
#define MAC_PCU_BT_BT_36_WEIGHT_MASK 		 PTA_COEX_BT_BT_36_WEIGHT_MASK
#define MAC_PCU_BT_BT_36_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_36_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_36_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_36_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_36_WEIGHT_RESET 		 PTA_COEX_BT_BT_36_WEIGHT_RESET
#define MAC_PCU_BT_BT_36_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_36_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_36_SW_MASK 		 PTA_COEX_BT_BT_36_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_36_RSTMASK 		 PTA_COEX_BT_BT_36_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_36_RESET 		 PTA_COEX_BT_BT_36_RESET

// 32'h8594 (MAC_PCU_BT_BT_37)
#define MAC_PCU_BT_BT_37_WEIGHT_MSB 		 PTA_COEX_BT_BT_37_WEIGHT_MSB
#define MAC_PCU_BT_BT_37_WEIGHT_LSB 		 PTA_COEX_BT_BT_37_WEIGHT_LSB
#define MAC_PCU_BT_BT_37_WEIGHT_MASK 		 PTA_COEX_BT_BT_37_WEIGHT_MASK
#define MAC_PCU_BT_BT_37_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_37_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_37_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_37_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_37_WEIGHT_RESET 		 PTA_COEX_BT_BT_37_WEIGHT_RESET
#define MAC_PCU_BT_BT_37_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_37_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_37_SW_MASK 		 PTA_COEX_BT_BT_37_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_37_RSTMASK 		 PTA_COEX_BT_BT_37_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_37_RESET 		 PTA_COEX_BT_BT_37_RESET

// 32'h8598 (MAC_PCU_BT_BT_38)
#define MAC_PCU_BT_BT_38_WEIGHT_MSB 		 PTA_COEX_BT_BT_38_WEIGHT_MSB
#define MAC_PCU_BT_BT_38_WEIGHT_LSB 		 PTA_COEX_BT_BT_38_WEIGHT_LSB
#define MAC_PCU_BT_BT_38_WEIGHT_MASK 		 PTA_COEX_BT_BT_38_WEIGHT_MASK
#define MAC_PCU_BT_BT_38_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_38_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_38_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_38_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_38_WEIGHT_RESET 		 PTA_COEX_BT_BT_38_WEIGHT_RESET
#define MAC_PCU_BT_BT_38_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_38_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_38_SW_MASK 		 PTA_COEX_BT_BT_38_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_38_RSTMASK 		 PTA_COEX_BT_BT_38_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_38_RESET 		 PTA_COEX_BT_BT_38_RESET

// 32'h859c (MAC_PCU_BT_BT_39)
#define MAC_PCU_BT_BT_39_WEIGHT_MSB 		 PTA_COEX_BT_BT_39_WEIGHT_MSB
#define MAC_PCU_BT_BT_39_WEIGHT_LSB 		 PTA_COEX_BT_BT_39_WEIGHT_LSB
#define MAC_PCU_BT_BT_39_WEIGHT_MASK 		 PTA_COEX_BT_BT_39_WEIGHT_MASK
#define MAC_PCU_BT_BT_39_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_39_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_39_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_39_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_39_WEIGHT_RESET 		 PTA_COEX_BT_BT_39_WEIGHT_RESET
#define MAC_PCU_BT_BT_39_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_39_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_39_SW_MASK 		 PTA_COEX_BT_BT_39_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_39_RSTMASK 		 PTA_COEX_BT_BT_39_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_39_RESET 		 PTA_COEX_BT_BT_39_RESET

// 32'h85a0 (MAC_PCU_BT_BT_40)
#define MAC_PCU_BT_BT_40_WEIGHT_MSB 		 PTA_COEX_BT_BT_40_WEIGHT_MSB
#define MAC_PCU_BT_BT_40_WEIGHT_LSB 		 PTA_COEX_BT_BT_40_WEIGHT_LSB
#define MAC_PCU_BT_BT_40_WEIGHT_MASK 		 PTA_COEX_BT_BT_40_WEIGHT_MASK
#define MAC_PCU_BT_BT_40_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_40_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_40_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_40_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_40_WEIGHT_RESET 		 PTA_COEX_BT_BT_40_WEIGHT_RESET
#define MAC_PCU_BT_BT_40_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_40_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_40_SW_MASK 		 PTA_COEX_BT_BT_40_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_40_RSTMASK 		 PTA_COEX_BT_BT_40_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_40_RESET 		 PTA_COEX_BT_BT_40_RESET

// 32'h85a4 (MAC_PCU_BT_BT_41)
#define MAC_PCU_BT_BT_41_WEIGHT_MSB 		 PTA_COEX_BT_BT_41_WEIGHT_MSB
#define MAC_PCU_BT_BT_41_WEIGHT_LSB 		 PTA_COEX_BT_BT_41_WEIGHT_LSB
#define MAC_PCU_BT_BT_41_WEIGHT_MASK 		 PTA_COEX_BT_BT_41_WEIGHT_MASK
#define MAC_PCU_BT_BT_41_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_41_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_41_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_41_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_41_WEIGHT_RESET 		 PTA_COEX_BT_BT_41_WEIGHT_RESET
#define MAC_PCU_BT_BT_41_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_41_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_41_SW_MASK 		 PTA_COEX_BT_BT_41_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_41_RSTMASK 		 PTA_COEX_BT_BT_41_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_41_RESET 		 PTA_COEX_BT_BT_41_RESET

// 32'h85a8 (MAC_PCU_BT_BT_42)
#define MAC_PCU_BT_BT_42_WEIGHT_MSB 		 PTA_COEX_BT_BT_42_WEIGHT_MSB
#define MAC_PCU_BT_BT_42_WEIGHT_LSB 		 PTA_COEX_BT_BT_42_WEIGHT_LSB
#define MAC_PCU_BT_BT_42_WEIGHT_MASK 		 PTA_COEX_BT_BT_42_WEIGHT_MASK
#define MAC_PCU_BT_BT_42_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_42_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_42_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_42_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_42_WEIGHT_RESET 		 PTA_COEX_BT_BT_42_WEIGHT_RESET
#define MAC_PCU_BT_BT_42_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_42_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_42_SW_MASK 		 PTA_COEX_BT_BT_42_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_42_RSTMASK 		 PTA_COEX_BT_BT_42_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_42_RESET 		 PTA_COEX_BT_BT_42_RESET

// 32'h85ac (MAC_PCU_BT_BT_43)
#define MAC_PCU_BT_BT_43_WEIGHT_MSB 		 PTA_COEX_BT_BT_43_WEIGHT_MSB
#define MAC_PCU_BT_BT_43_WEIGHT_LSB 		 PTA_COEX_BT_BT_43_WEIGHT_LSB
#define MAC_PCU_BT_BT_43_WEIGHT_MASK 		 PTA_COEX_BT_BT_43_WEIGHT_MASK
#define MAC_PCU_BT_BT_43_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_43_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_43_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_43_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_43_WEIGHT_RESET 		 PTA_COEX_BT_BT_43_WEIGHT_RESET
#define MAC_PCU_BT_BT_43_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_43_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_43_SW_MASK 		 PTA_COEX_BT_BT_43_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_43_RSTMASK 		 PTA_COEX_BT_BT_43_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_43_RESET 		 PTA_COEX_BT_BT_43_RESET

// 32'h85b0 (MAC_PCU_BT_BT_44)
#define MAC_PCU_BT_BT_44_WEIGHT_MSB 		 PTA_COEX_BT_BT_44_WEIGHT_MSB
#define MAC_PCU_BT_BT_44_WEIGHT_LSB 		 PTA_COEX_BT_BT_44_WEIGHT_LSB
#define MAC_PCU_BT_BT_44_WEIGHT_MASK 		 PTA_COEX_BT_BT_44_WEIGHT_MASK
#define MAC_PCU_BT_BT_44_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_44_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_44_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_44_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_44_WEIGHT_RESET 		 PTA_COEX_BT_BT_44_WEIGHT_RESET
#define MAC_PCU_BT_BT_44_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_44_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_44_SW_MASK 		 PTA_COEX_BT_BT_44_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_44_RSTMASK 		 PTA_COEX_BT_BT_44_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_44_RESET 		 PTA_COEX_BT_BT_44_RESET

// 32'h85b4 (MAC_PCU_BT_BT_45)
#define MAC_PCU_BT_BT_45_WEIGHT_MSB 		 PTA_COEX_BT_BT_45_WEIGHT_MSB
#define MAC_PCU_BT_BT_45_WEIGHT_LSB 		 PTA_COEX_BT_BT_45_WEIGHT_LSB
#define MAC_PCU_BT_BT_45_WEIGHT_MASK 		 PTA_COEX_BT_BT_45_WEIGHT_MASK
#define MAC_PCU_BT_BT_45_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_45_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_45_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_45_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_45_WEIGHT_RESET 		 PTA_COEX_BT_BT_45_WEIGHT_RESET
#define MAC_PCU_BT_BT_45_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_45_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_45_SW_MASK 		 PTA_COEX_BT_BT_45_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_45_RSTMASK 		 PTA_COEX_BT_BT_45_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_45_RESET 		 PTA_COEX_BT_BT_45_RESET

// 32'h85b8 (MAC_PCU_BT_BT_46)
#define MAC_PCU_BT_BT_46_WEIGHT_MSB 		 PTA_COEX_BT_BT_46_WEIGHT_MSB
#define MAC_PCU_BT_BT_46_WEIGHT_LSB 		 PTA_COEX_BT_BT_46_WEIGHT_LSB
#define MAC_PCU_BT_BT_46_WEIGHT_MASK 		 PTA_COEX_BT_BT_46_WEIGHT_MASK
#define MAC_PCU_BT_BT_46_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_46_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_46_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_46_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_46_WEIGHT_RESET 		 PTA_COEX_BT_BT_46_WEIGHT_RESET
#define MAC_PCU_BT_BT_46_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_46_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_46_SW_MASK 		 PTA_COEX_BT_BT_46_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_46_RSTMASK 		 PTA_COEX_BT_BT_46_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_46_RESET 		 PTA_COEX_BT_BT_46_RESET

// 32'h85bc (MAC_PCU_BT_BT_47)
#define MAC_PCU_BT_BT_47_WEIGHT_MSB 		 PTA_COEX_BT_BT_47_WEIGHT_MSB
#define MAC_PCU_BT_BT_47_WEIGHT_LSB 		 PTA_COEX_BT_BT_47_WEIGHT_LSB
#define MAC_PCU_BT_BT_47_WEIGHT_MASK 		 PTA_COEX_BT_BT_47_WEIGHT_MASK
#define MAC_PCU_BT_BT_47_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_47_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_47_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_47_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_47_WEIGHT_RESET 		 PTA_COEX_BT_BT_47_WEIGHT_RESET
#define MAC_PCU_BT_BT_47_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_47_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_47_SW_MASK 		 PTA_COEX_BT_BT_47_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_47_RSTMASK 		 PTA_COEX_BT_BT_47_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_47_RESET 		 PTA_COEX_BT_BT_47_RESET

// 32'h85c0 (MAC_PCU_BT_BT_48)
#define MAC_PCU_BT_BT_48_WEIGHT_MSB 		 PTA_COEX_BT_BT_48_WEIGHT_MSB
#define MAC_PCU_BT_BT_48_WEIGHT_LSB 		 PTA_COEX_BT_BT_48_WEIGHT_LSB
#define MAC_PCU_BT_BT_48_WEIGHT_MASK 		 PTA_COEX_BT_BT_48_WEIGHT_MASK
#define MAC_PCU_BT_BT_48_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_48_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_48_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_48_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_48_WEIGHT_RESET 		 PTA_COEX_BT_BT_48_WEIGHT_RESET
#define MAC_PCU_BT_BT_48_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_48_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_48_SW_MASK 		 PTA_COEX_BT_BT_48_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_48_RSTMASK 		 PTA_COEX_BT_BT_48_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_48_RESET 		 PTA_COEX_BT_BT_48_RESET

// 32'h85c4 (MAC_PCU_BT_BT_49)
#define MAC_PCU_BT_BT_49_WEIGHT_MSB 		 PTA_COEX_BT_BT_49_WEIGHT_MSB
#define MAC_PCU_BT_BT_49_WEIGHT_LSB 		 PTA_COEX_BT_BT_49_WEIGHT_LSB
#define MAC_PCU_BT_BT_49_WEIGHT_MASK 		 PTA_COEX_BT_BT_49_WEIGHT_MASK
#define MAC_PCU_BT_BT_49_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_49_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_49_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_49_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_49_WEIGHT_RESET 		 PTA_COEX_BT_BT_49_WEIGHT_RESET
#define MAC_PCU_BT_BT_49_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_49_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_49_SW_MASK 		 PTA_COEX_BT_BT_49_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_49_RSTMASK 		 PTA_COEX_BT_BT_49_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_49_RESET 		 PTA_COEX_BT_BT_49_RESET

// 32'h85c8 (MAC_PCU_BT_BT_50)
#define MAC_PCU_BT_BT_50_WEIGHT_MSB 		 PTA_COEX_BT_BT_50_WEIGHT_MSB
#define MAC_PCU_BT_BT_50_WEIGHT_LSB 		 PTA_COEX_BT_BT_50_WEIGHT_LSB
#define MAC_PCU_BT_BT_50_WEIGHT_MASK 		 PTA_COEX_BT_BT_50_WEIGHT_MASK
#define MAC_PCU_BT_BT_50_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_50_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_50_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_50_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_50_WEIGHT_RESET 		 PTA_COEX_BT_BT_50_WEIGHT_RESET
#define MAC_PCU_BT_BT_50_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_50_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_50_SW_MASK 		 PTA_COEX_BT_BT_50_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_50_RSTMASK 		 PTA_COEX_BT_BT_50_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_50_RESET 		 PTA_COEX_BT_BT_50_RESET

// 32'h85cc (MAC_PCU_BT_BT_51)
#define MAC_PCU_BT_BT_51_WEIGHT_MSB 		 PTA_COEX_BT_BT_51_WEIGHT_MSB
#define MAC_PCU_BT_BT_51_WEIGHT_LSB 		 PTA_COEX_BT_BT_51_WEIGHT_LSB
#define MAC_PCU_BT_BT_51_WEIGHT_MASK 		 PTA_COEX_BT_BT_51_WEIGHT_MASK
#define MAC_PCU_BT_BT_51_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_51_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_51_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_51_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_51_WEIGHT_RESET 		 PTA_COEX_BT_BT_51_WEIGHT_RESET
#define MAC_PCU_BT_BT_51_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_51_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_51_SW_MASK 		 PTA_COEX_BT_BT_51_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_51_RSTMASK 		 PTA_COEX_BT_BT_51_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_51_RESET 		 PTA_COEX_BT_BT_51_RESET

// 32'h85d0 (MAC_PCU_BT_BT_52)
#define MAC_PCU_BT_BT_52_WEIGHT_MSB 		 PTA_COEX_BT_BT_52_WEIGHT_MSB
#define MAC_PCU_BT_BT_52_WEIGHT_LSB 		 PTA_COEX_BT_BT_52_WEIGHT_LSB
#define MAC_PCU_BT_BT_52_WEIGHT_MASK 		 PTA_COEX_BT_BT_52_WEIGHT_MASK
#define MAC_PCU_BT_BT_52_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_52_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_52_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_52_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_52_WEIGHT_RESET 		 PTA_COEX_BT_BT_52_WEIGHT_RESET
#define MAC_PCU_BT_BT_52_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_52_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_52_SW_MASK 		 PTA_COEX_BT_BT_52_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_52_RSTMASK 		 PTA_COEX_BT_BT_52_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_52_RESET 		 PTA_COEX_BT_BT_52_RESET

// 32'h85d4 (MAC_PCU_BT_BT_53)
#define MAC_PCU_BT_BT_53_WEIGHT_MSB 		 PTA_COEX_BT_BT_53_WEIGHT_MSB
#define MAC_PCU_BT_BT_53_WEIGHT_LSB 		 PTA_COEX_BT_BT_53_WEIGHT_LSB
#define MAC_PCU_BT_BT_53_WEIGHT_MASK 		 PTA_COEX_BT_BT_53_WEIGHT_MASK
#define MAC_PCU_BT_BT_53_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_53_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_53_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_53_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_53_WEIGHT_RESET 		 PTA_COEX_BT_BT_53_WEIGHT_RESET
#define MAC_PCU_BT_BT_53_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_53_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_53_SW_MASK 		 PTA_COEX_BT_BT_53_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_53_RSTMASK 		 PTA_COEX_BT_BT_53_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_53_RESET 		 PTA_COEX_BT_BT_53_RESET

// 32'h85d8 (MAC_PCU_BT_BT_54)
#define MAC_PCU_BT_BT_54_WEIGHT_MSB 		 PTA_COEX_BT_BT_54_WEIGHT_MSB
#define MAC_PCU_BT_BT_54_WEIGHT_LSB 		 PTA_COEX_BT_BT_54_WEIGHT_LSB
#define MAC_PCU_BT_BT_54_WEIGHT_MASK 		 PTA_COEX_BT_BT_54_WEIGHT_MASK
#define MAC_PCU_BT_BT_54_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_54_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_54_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_54_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_54_WEIGHT_RESET 		 PTA_COEX_BT_BT_54_WEIGHT_RESET
#define MAC_PCU_BT_BT_54_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_54_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_54_SW_MASK 		 PTA_COEX_BT_BT_54_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_54_RSTMASK 		 PTA_COEX_BT_BT_54_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_54_RESET 		 PTA_COEX_BT_BT_54_RESET

// 32'h85dc (MAC_PCU_BT_BT_55)
#define MAC_PCU_BT_BT_55_WEIGHT_MSB 		 PTA_COEX_BT_BT_55_WEIGHT_MSB
#define MAC_PCU_BT_BT_55_WEIGHT_LSB 		 PTA_COEX_BT_BT_55_WEIGHT_LSB
#define MAC_PCU_BT_BT_55_WEIGHT_MASK 		 PTA_COEX_BT_BT_55_WEIGHT_MASK
#define MAC_PCU_BT_BT_55_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_55_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_55_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_55_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_55_WEIGHT_RESET 		 PTA_COEX_BT_BT_55_WEIGHT_RESET
#define MAC_PCU_BT_BT_55_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_55_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_55_SW_MASK 		 PTA_COEX_BT_BT_55_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_55_RSTMASK 		 PTA_COEX_BT_BT_55_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_55_RESET 		 PTA_COEX_BT_BT_55_RESET

// 32'h85e0 (MAC_PCU_BT_BT_56)
#define MAC_PCU_BT_BT_56_WEIGHT_MSB 		 PTA_COEX_BT_BT_56_WEIGHT_MSB
#define MAC_PCU_BT_BT_56_WEIGHT_LSB 		 PTA_COEX_BT_BT_56_WEIGHT_LSB
#define MAC_PCU_BT_BT_56_WEIGHT_MASK 		 PTA_COEX_BT_BT_56_WEIGHT_MASK
#define MAC_PCU_BT_BT_56_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_56_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_56_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_56_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_56_WEIGHT_RESET 		 PTA_COEX_BT_BT_56_WEIGHT_RESET
#define MAC_PCU_BT_BT_56_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_56_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_56_SW_MASK 		 PTA_COEX_BT_BT_56_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_56_RSTMASK 		 PTA_COEX_BT_BT_56_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_56_RESET 		 PTA_COEX_BT_BT_56_RESET

// 32'h85e4 (MAC_PCU_BT_BT_57)
#define MAC_PCU_BT_BT_57_WEIGHT_MSB 		 PTA_COEX_BT_BT_57_WEIGHT_MSB
#define MAC_PCU_BT_BT_57_WEIGHT_LSB 		 PTA_COEX_BT_BT_57_WEIGHT_LSB
#define MAC_PCU_BT_BT_57_WEIGHT_MASK 		 PTA_COEX_BT_BT_57_WEIGHT_MASK
#define MAC_PCU_BT_BT_57_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_57_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_57_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_57_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_57_WEIGHT_RESET 		 PTA_COEX_BT_BT_57_WEIGHT_RESET
#define MAC_PCU_BT_BT_57_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_57_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_57_SW_MASK 		 PTA_COEX_BT_BT_57_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_57_RSTMASK 		 PTA_COEX_BT_BT_57_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_57_RESET 		 PTA_COEX_BT_BT_57_RESET

// 32'h85e8 (MAC_PCU_BT_BT_58)
#define MAC_PCU_BT_BT_58_WEIGHT_MSB 		 PTA_COEX_BT_BT_58_WEIGHT_MSB
#define MAC_PCU_BT_BT_58_WEIGHT_LSB 		 PTA_COEX_BT_BT_58_WEIGHT_LSB
#define MAC_PCU_BT_BT_58_WEIGHT_MASK 		 PTA_COEX_BT_BT_58_WEIGHT_MASK
#define MAC_PCU_BT_BT_58_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_58_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_58_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_58_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_58_WEIGHT_RESET 		 PTA_COEX_BT_BT_58_WEIGHT_RESET
#define MAC_PCU_BT_BT_58_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_58_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_58_SW_MASK 		 PTA_COEX_BT_BT_58_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_58_RSTMASK 		 PTA_COEX_BT_BT_58_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_58_RESET 		 PTA_COEX_BT_BT_58_RESET

// 32'h85ec (MAC_PCU_BT_BT_59)
#define MAC_PCU_BT_BT_59_WEIGHT_MSB 		 PTA_COEX_BT_BT_59_WEIGHT_MSB
#define MAC_PCU_BT_BT_59_WEIGHT_LSB 		 PTA_COEX_BT_BT_59_WEIGHT_LSB
#define MAC_PCU_BT_BT_59_WEIGHT_MASK 		 PTA_COEX_BT_BT_59_WEIGHT_MASK
#define MAC_PCU_BT_BT_59_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_59_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_59_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_59_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_59_WEIGHT_RESET 		 PTA_COEX_BT_BT_59_WEIGHT_RESET
#define MAC_PCU_BT_BT_59_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_59_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_59_SW_MASK 		 PTA_COEX_BT_BT_59_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_59_RSTMASK 		 PTA_COEX_BT_BT_59_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_59_RESET 		 PTA_COEX_BT_BT_59_RESET

// 32'h85f0 (MAC_PCU_BT_BT_60)
#define MAC_PCU_BT_BT_60_WEIGHT_MSB 		 PTA_COEX_BT_BT_60_WEIGHT_MSB
#define MAC_PCU_BT_BT_60_WEIGHT_LSB 		 PTA_COEX_BT_BT_60_WEIGHT_LSB
#define MAC_PCU_BT_BT_60_WEIGHT_MASK 		 PTA_COEX_BT_BT_60_WEIGHT_MASK
#define MAC_PCU_BT_BT_60_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_60_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_60_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_60_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_60_WEIGHT_RESET 		 PTA_COEX_BT_BT_60_WEIGHT_RESET
#define MAC_PCU_BT_BT_60_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_60_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_60_SW_MASK 		 PTA_COEX_BT_BT_60_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_60_RSTMASK 		 PTA_COEX_BT_BT_60_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_60_RESET 		 PTA_COEX_BT_BT_60_RESET

// 32'h85f4 (MAC_PCU_BT_BT_61)
#define MAC_PCU_BT_BT_61_WEIGHT_MSB 		 PTA_COEX_BT_BT_61_WEIGHT_MSB
#define MAC_PCU_BT_BT_61_WEIGHT_LSB 		 PTA_COEX_BT_BT_61_WEIGHT_LSB
#define MAC_PCU_BT_BT_61_WEIGHT_MASK 		 PTA_COEX_BT_BT_61_WEIGHT_MASK
#define MAC_PCU_BT_BT_61_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_61_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_61_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_61_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_61_WEIGHT_RESET 		 PTA_COEX_BT_BT_61_WEIGHT_RESET
#define MAC_PCU_BT_BT_61_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_61_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_61_SW_MASK 		 PTA_COEX_BT_BT_61_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_61_RSTMASK 		 PTA_COEX_BT_BT_61_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_61_RESET 		 PTA_COEX_BT_BT_61_RESET

// 32'h85f8 (MAC_PCU_BT_BT_62)
#define MAC_PCU_BT_BT_62_WEIGHT_MSB 		 PTA_COEX_BT_BT_62_WEIGHT_MSB
#define MAC_PCU_BT_BT_62_WEIGHT_LSB 		 PTA_COEX_BT_BT_62_WEIGHT_LSB
#define MAC_PCU_BT_BT_62_WEIGHT_MASK 		 PTA_COEX_BT_BT_62_WEIGHT_MASK
#define MAC_PCU_BT_BT_62_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_62_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_62_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_62_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_62_WEIGHT_RESET 		 PTA_COEX_BT_BT_62_WEIGHT_RESET
#define MAC_PCU_BT_BT_62_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_62_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_62_SW_MASK 		 PTA_COEX_BT_BT_62_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_62_RSTMASK 		 PTA_COEX_BT_BT_62_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_62_RESET 		 PTA_COEX_BT_BT_62_RESET

// 32'h85fc (MAC_PCU_BT_BT_63)
#define MAC_PCU_BT_BT_63_WEIGHT_MSB 		 PTA_COEX_BT_BT_63_WEIGHT_MSB
#define MAC_PCU_BT_BT_63_WEIGHT_LSB 		 PTA_COEX_BT_BT_63_WEIGHT_LSB
#define MAC_PCU_BT_BT_63_WEIGHT_MASK 		 PTA_COEX_BT_BT_63_WEIGHT_MASK
#define MAC_PCU_BT_BT_63_WEIGHT_GET(x) 		 PTA_COEX_BT_BT_63_WEIGHT_GET(x)
#define MAC_PCU_BT_BT_63_WEIGHT_SET(x) 		 PTA_COEX_BT_BT_63_WEIGHT_SET(x)
#define MAC_PCU_BT_BT_63_WEIGHT_RESET 		 PTA_COEX_BT_BT_63_WEIGHT_RESET
#define MAC_PCU_BT_BT_63_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_BT_63_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_BT_63_SW_MASK 		 PTA_COEX_BT_BT_63_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_BT_63_RSTMASK 		 PTA_COEX_BT_BT_63_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_BT_63_RESET 		 PTA_COEX_BT_BT_63_RESET

// 32'h8600 (MAC_PCU_RX_INT_STATUS0)
#define MAC_PCU_RX_INT_STATUS0_DURATION_H_MSB 		 RXPCU_RX_INT_STATUS0_DURATION_H_MSB
#define MAC_PCU_RX_INT_STATUS0_DURATION_H_LSB 		 RXPCU_RX_INT_STATUS0_DURATION_H_LSB
#define MAC_PCU_RX_INT_STATUS0_DURATION_H_MASK 		 RXPCU_RX_INT_STATUS0_DURATION_H_MASK
#define MAC_PCU_RX_INT_STATUS0_DURATION_H_GET(x) 		 RXPCU_RX_INT_STATUS0_DURATION_H_GET(x)
#define MAC_PCU_RX_INT_STATUS0_DURATION_H_SET(x) 		 RXPCU_RX_INT_STATUS0_DURATION_H_SET(x)
#define MAC_PCU_RX_INT_STATUS0_DURATION_H_RESET 		 RXPCU_RX_INT_STATUS0_DURATION_H_RESET
#define MAC_PCU_RX_INT_STATUS0_DURATION_L_MSB 		 RXPCU_RX_INT_STATUS0_DURATION_L_MSB
#define MAC_PCU_RX_INT_STATUS0_DURATION_L_LSB 		 RXPCU_RX_INT_STATUS0_DURATION_L_LSB
#define MAC_PCU_RX_INT_STATUS0_DURATION_L_MASK 		 RXPCU_RX_INT_STATUS0_DURATION_L_MASK
#define MAC_PCU_RX_INT_STATUS0_DURATION_L_GET(x) 		 RXPCU_RX_INT_STATUS0_DURATION_L_GET(x)
#define MAC_PCU_RX_INT_STATUS0_DURATION_L_SET(x) 		 RXPCU_RX_INT_STATUS0_DURATION_L_SET(x)
#define MAC_PCU_RX_INT_STATUS0_DURATION_L_RESET 		 RXPCU_RX_INT_STATUS0_DURATION_L_RESET
#define MAC_PCU_RX_INT_STATUS0_FRAME_CONTROL_H_MSB 		 RXPCU_RX_INT_STATUS0_FRAME_CONTROL_H_MSB
#define MAC_PCU_RX_INT_STATUS0_FRAME_CONTROL_H_LSB 		 RXPCU_RX_INT_STATUS0_FRAME_CONTROL_H_LSB
#define MAC_PCU_RX_INT_STATUS0_FRAME_CONTROL_H_MASK 		 RXPCU_RX_INT_STATUS0_FRAME_CONTROL_H_MASK
#define MAC_PCU_RX_INT_STATUS0_FRAME_CONTROL_H_GET(x) 		 RXPCU_RX_INT_STATUS0_FRAME_CONTROL_H_GET(x)
#define MAC_PCU_RX_INT_STATUS0_FRAME_CONTROL_H_SET(x) 		 RXPCU_RX_INT_STATUS0_FRAME_CONTROL_H_SET(x)
#define MAC_PCU_RX_INT_STATUS0_FRAME_CONTROL_H_RESET 		 RXPCU_RX_INT_STATUS0_FRAME_CONTROL_H_RESET
#define MAC_PCU_RX_INT_STATUS0_FRAME_CONTROL_L_MSB 		 RXPCU_RX_INT_STATUS0_FRAME_CONTROL_L_MSB
#define MAC_PCU_RX_INT_STATUS0_FRAME_CONTROL_L_LSB 		 RXPCU_RX_INT_STATUS0_FRAME_CONTROL_L_LSB
#define MAC_PCU_RX_INT_STATUS0_FRAME_CONTROL_L_MASK 		 RXPCU_RX_INT_STATUS0_FRAME_CONTROL_L_MASK
#define MAC_PCU_RX_INT_STATUS0_FRAME_CONTROL_L_GET(x) 		 RXPCU_RX_INT_STATUS0_FRAME_CONTROL_L_GET(x)
#define MAC_PCU_RX_INT_STATUS0_FRAME_CONTROL_L_SET(x) 		 RXPCU_RX_INT_STATUS0_FRAME_CONTROL_L_SET(x)
#define MAC_PCU_RX_INT_STATUS0_FRAME_CONTROL_L_RESET 		 RXPCU_RX_INT_STATUS0_FRAME_CONTROL_L_RESET
#define MAC_PCU_RX_INT_STATUS0_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_RX_INT_STATUS0_ADDRESS
// SW modifiable bits
#define MAC_PCU_RX_INT_STATUS0_SW_MASK 		 RXPCU_RX_INT_STATUS0_SW_MASK
// bits defined at reset
#define MAC_PCU_RX_INT_STATUS0_RSTMASK 		 RXPCU_RX_INT_STATUS0_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_RX_INT_STATUS0_RESET 		 RXPCU_RX_INT_STATUS0_RESET

// 32'h8604 (MAC_PCU_RX_INT_STATUS1)
#define MAC_PCU_RX_INT_STATUS1_VALUE_MSB 		 RXPCU_RX_INT_STATUS1_VALUE_MSB
#define MAC_PCU_RX_INT_STATUS1_VALUE_LSB 		 RXPCU_RX_INT_STATUS1_VALUE_LSB
#define MAC_PCU_RX_INT_STATUS1_VALUE_MASK 		 RXPCU_RX_INT_STATUS1_VALUE_MASK
#define MAC_PCU_RX_INT_STATUS1_VALUE_GET(x) 		 RXPCU_RX_INT_STATUS1_VALUE_GET(x)
#define MAC_PCU_RX_INT_STATUS1_VALUE_SET(x) 		 RXPCU_RX_INT_STATUS1_VALUE_SET(x)
#define MAC_PCU_RX_INT_STATUS1_VALUE_RESET 		 RXPCU_RX_INT_STATUS1_VALUE_RESET
#define MAC_PCU_RX_INT_STATUS1_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_RX_INT_STATUS1_ADDRESS
// SW modifiable bits
#define MAC_PCU_RX_INT_STATUS1_SW_MASK 		 RXPCU_RX_INT_STATUS1_SW_MASK
// bits defined at reset
#define MAC_PCU_RX_INT_STATUS1_RSTMASK 		 RXPCU_RX_INT_STATUS1_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_RX_INT_STATUS1_RESET 		 RXPCU_RX_INT_STATUS1_RESET

// 32'h8608 (MAC_PCU_RX_INT_STATUS2)
#define MAC_PCU_RX_INT_STATUS2_VALUE_MSB 		 RXPCU_RX_INT_STATUS2_VALUE_MSB
#define MAC_PCU_RX_INT_STATUS2_VALUE_LSB 		 RXPCU_RX_INT_STATUS2_VALUE_LSB
#define MAC_PCU_RX_INT_STATUS2_VALUE_MASK 		 RXPCU_RX_INT_STATUS2_VALUE_MASK
#define MAC_PCU_RX_INT_STATUS2_VALUE_GET(x) 		 RXPCU_RX_INT_STATUS2_VALUE_GET(x)
#define MAC_PCU_RX_INT_STATUS2_VALUE_SET(x) 		 RXPCU_RX_INT_STATUS2_VALUE_SET(x)
#define MAC_PCU_RX_INT_STATUS2_VALUE_RESET 		 RXPCU_RX_INT_STATUS2_VALUE_RESET
#define MAC_PCU_RX_INT_STATUS2_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_RX_INT_STATUS2_ADDRESS
// SW modifiable bits
#define MAC_PCU_RX_INT_STATUS2_SW_MASK 		 RXPCU_RX_INT_STATUS2_SW_MASK
// bits defined at reset
#define MAC_PCU_RX_INT_STATUS2_RSTMASK 		 RXPCU_RX_INT_STATUS2_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_RX_INT_STATUS2_RESET 		 RXPCU_RX_INT_STATUS2_RESET

// 32'h860c (MAC_PCU_RX_INT_STATUS3)
#define MAC_PCU_RX_INT_STATUS3_VALUE_MSB 		 RXPCU_RX_INT_STATUS3_VALUE_MSB
#define MAC_PCU_RX_INT_STATUS3_VALUE_LSB 		 RXPCU_RX_INT_STATUS3_VALUE_LSB
#define MAC_PCU_RX_INT_STATUS3_VALUE_MASK 		 RXPCU_RX_INT_STATUS3_VALUE_MASK
#define MAC_PCU_RX_INT_STATUS3_VALUE_GET(x) 		 RXPCU_RX_INT_STATUS3_VALUE_GET(x)
#define MAC_PCU_RX_INT_STATUS3_VALUE_SET(x) 		 RXPCU_RX_INT_STATUS3_VALUE_SET(x)
#define MAC_PCU_RX_INT_STATUS3_VALUE_RESET 		 RXPCU_RX_INT_STATUS3_VALUE_RESET
#define MAC_PCU_RX_INT_STATUS3_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_RX_INT_STATUS3_ADDRESS
// SW modifiable bits
#define MAC_PCU_RX_INT_STATUS3_SW_MASK 		 RXPCU_RX_INT_STATUS3_SW_MASK
// bits defined at reset
#define MAC_PCU_RX_INT_STATUS3_RSTMASK 		 RXPCU_RX_INT_STATUS3_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_RX_INT_STATUS3_RESET 		 RXPCU_RX_INT_STATUS3_RESET

// 32'h8664 (MAC_PCU_LAST_BEACON2_TSF)
#define MAC_PCU_LAST_BEACON2_TSF_VALUE_MSB 		 RXPCU_LAST_BEACON2_TSF_VALUE_MSB
#define MAC_PCU_LAST_BEACON2_TSF_VALUE_LSB 		 RXPCU_LAST_BEACON2_TSF_VALUE_LSB
#define MAC_PCU_LAST_BEACON2_TSF_VALUE_MASK 		 RXPCU_LAST_BEACON2_TSF_VALUE_MASK
#define MAC_PCU_LAST_BEACON2_TSF_VALUE_GET(x) 		 RXPCU_LAST_BEACON2_TSF_VALUE_GET(x)
#define MAC_PCU_LAST_BEACON2_TSF_VALUE_SET(x) 		 RXPCU_LAST_BEACON2_TSF_VALUE_SET(x)
#define MAC_PCU_LAST_BEACON2_TSF_VALUE_RESET 		 RXPCU_LAST_BEACON2_TSF_VALUE_RESET
#define MAC_PCU_LAST_BEACON2_TSF_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_LAST_BEACON2_TSF_ADDRESS
// SW modifiable bits
#define MAC_PCU_LAST_BEACON2_TSF_SW_MASK 		 RXPCU_LAST_BEACON2_TSF_SW_MASK
// bits defined at reset
#define MAC_PCU_LAST_BEACON2_TSF_RSTMASK 		 RXPCU_LAST_BEACON2_TSF_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_LAST_BEACON2_TSF_RESET 		 RXPCU_LAST_BEACON2_TSF_RESET

// 32'h8668 (MAC_PCU_PHY_ERROR_AIFS)
#define MAC_PCU_PHY_ERROR_AIFS_MASK_ENABLE_MSB 		 RXPCU_PHY_ERROR_AIFS_MASK_ENABLE_MSB
#define MAC_PCU_PHY_ERROR_AIFS_MASK_ENABLE_LSB 		 RXPCU_PHY_ERROR_AIFS_MASK_ENABLE_LSB
#define MAC_PCU_PHY_ERROR_AIFS_MASK_ENABLE_MASK 		 RXPCU_PHY_ERROR_AIFS_MASK_ENABLE_MASK
#define MAC_PCU_PHY_ERROR_AIFS_MASK_ENABLE_GET(x) 		 RXPCU_PHY_ERROR_AIFS_MASK_ENABLE_GET(x)
#define MAC_PCU_PHY_ERROR_AIFS_MASK_ENABLE_SET(x) 		 RXPCU_PHY_ERROR_AIFS_MASK_ENABLE_SET(x)
#define MAC_PCU_PHY_ERROR_AIFS_MASK_ENABLE_RESET 		 RXPCU_PHY_ERROR_AIFS_MASK_ENABLE_RESET
#define MAC_PCU_PHY_ERROR_AIFS_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_PHY_ERROR_AIFS_ADDRESS
// SW modifiable bits
#define MAC_PCU_PHY_ERROR_AIFS_SW_MASK 		 RXPCU_PHY_ERROR_AIFS_SW_MASK
// bits defined at reset
#define MAC_PCU_PHY_ERROR_AIFS_RSTMASK 		 RXPCU_PHY_ERROR_AIFS_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_PHY_ERROR_AIFS_RESET 		 RXPCU_PHY_ERROR_AIFS_RESET

// 32'h866c (MAC_PCU_PHY_ERROR_AIFS_MASK)
#define MAC_PCU_PHY_ERROR_AIFS_MASK_VALUE_MSB 		 RXPCU_PHY_ERROR_AIFS_MASK_VALUE_MSB
#define MAC_PCU_PHY_ERROR_AIFS_MASK_VALUE_LSB 		 RXPCU_PHY_ERROR_AIFS_MASK_VALUE_LSB
#define MAC_PCU_PHY_ERROR_AIFS_MASK_VALUE_MASK 		 RXPCU_PHY_ERROR_AIFS_MASK_VALUE_MASK
#define MAC_PCU_PHY_ERROR_AIFS_MASK_VALUE_GET(x) 		 RXPCU_PHY_ERROR_AIFS_MASK_VALUE_GET(x)
#define MAC_PCU_PHY_ERROR_AIFS_MASK_VALUE_SET(x) 		 RXPCU_PHY_ERROR_AIFS_MASK_VALUE_SET(x)
#define MAC_PCU_PHY_ERROR_AIFS_MASK_VALUE_RESET 		 RXPCU_PHY_ERROR_AIFS_MASK_VALUE_RESET
#define MAC_PCU_PHY_ERROR_AIFS_MASK_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_PHY_ERROR_AIFS_MASK_ADDRESS
// SW modifiable bits
#define MAC_PCU_PHY_ERROR_AIFS_MASK_SW_MASK 		 RXPCU_PHY_ERROR_AIFS_MASK_SW_MASK
// bits defined at reset
#define MAC_PCU_PHY_ERROR_AIFS_MASK_RSTMASK 		 RXPCU_PHY_ERROR_AIFS_MASK_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_PHY_ERROR_AIFS_MASK_RESET 		 RXPCU_PHY_ERROR_AIFS_MASK_RESET

// 32'h8670 (MAC_PCU_FILTER_RSSI_AVE)
#define MAC_PCU_FILTER_RSSI_AVE_RESET_MSB 		 RXPCU_FILTER_RSSI_AVE_RESET_MSB
#define MAC_PCU_FILTER_RSSI_AVE_RESET_LSB 		 RXPCU_FILTER_RSSI_AVE_RESET_LSB
#define MAC_PCU_FILTER_RSSI_AVE_RESET_MASK 		 RXPCU_FILTER_RSSI_AVE_RESET_MASK
#define MAC_PCU_FILTER_RSSI_AVE_RESET_GET(x) 		 RXPCU_FILTER_RSSI_AVE_RESET_GET(x)
#define MAC_PCU_FILTER_RSSI_AVE_RESET_SET(x) 		 RXPCU_FILTER_RSSI_AVE_RESET_SET(x)
#define MAC_PCU_FILTER_RSSI_AVE_RESET_RESET 		 RXPCU_FILTER_RSSI_AVE_RESET_RESET
#define MAC_PCU_FILTER_RSSI_AVE_ENABLE_MSB 		 RXPCU_FILTER_RSSI_AVE_ENABLE_MSB
#define MAC_PCU_FILTER_RSSI_AVE_ENABLE_LSB 		 RXPCU_FILTER_RSSI_AVE_ENABLE_LSB
#define MAC_PCU_FILTER_RSSI_AVE_ENABLE_MASK 		 RXPCU_FILTER_RSSI_AVE_ENABLE_MASK
#define MAC_PCU_FILTER_RSSI_AVE_ENABLE_GET(x) 		 RXPCU_FILTER_RSSI_AVE_ENABLE_GET(x)
#define MAC_PCU_FILTER_RSSI_AVE_ENABLE_SET(x) 		 RXPCU_FILTER_RSSI_AVE_ENABLE_SET(x)
#define MAC_PCU_FILTER_RSSI_AVE_ENABLE_RESET 		 RXPCU_FILTER_RSSI_AVE_ENABLE_RESET
#define MAC_PCU_FILTER_RSSI_AVE_NUM_FRAMES_EXPONENT_MSB 		 RXPCU_FILTER_RSSI_AVE_NUM_FRAMES_EXPONENT_MSB
#define MAC_PCU_FILTER_RSSI_AVE_NUM_FRAMES_EXPONENT_LSB 		 RXPCU_FILTER_RSSI_AVE_NUM_FRAMES_EXPONENT_LSB
#define MAC_PCU_FILTER_RSSI_AVE_NUM_FRAMES_EXPONENT_MASK 		 RXPCU_FILTER_RSSI_AVE_NUM_FRAMES_EXPONENT_MASK
#define MAC_PCU_FILTER_RSSI_AVE_NUM_FRAMES_EXPONENT_GET(x) 		 RXPCU_FILTER_RSSI_AVE_NUM_FRAMES_EXPONENT_GET(x)
#define MAC_PCU_FILTER_RSSI_AVE_NUM_FRAMES_EXPONENT_SET(x) 		 RXPCU_FILTER_RSSI_AVE_NUM_FRAMES_EXPONENT_SET(x)
#define MAC_PCU_FILTER_RSSI_AVE_NUM_FRAMES_EXPONENT_RESET 		 RXPCU_FILTER_RSSI_AVE_NUM_FRAMES_EXPONENT_RESET
#define MAC_PCU_FILTER_RSSI_AVE_AVE_VALUE_MSB 		 RXPCU_FILTER_RSSI_AVE_AVE_VALUE_MSB
#define MAC_PCU_FILTER_RSSI_AVE_AVE_VALUE_LSB 		 RXPCU_FILTER_RSSI_AVE_AVE_VALUE_LSB
#define MAC_PCU_FILTER_RSSI_AVE_AVE_VALUE_MASK 		 RXPCU_FILTER_RSSI_AVE_AVE_VALUE_MASK
#define MAC_PCU_FILTER_RSSI_AVE_AVE_VALUE_GET(x) 		 RXPCU_FILTER_RSSI_AVE_AVE_VALUE_GET(x)
#define MAC_PCU_FILTER_RSSI_AVE_AVE_VALUE_SET(x) 		 RXPCU_FILTER_RSSI_AVE_AVE_VALUE_SET(x)
#define MAC_PCU_FILTER_RSSI_AVE_AVE_VALUE_RESET 		 RXPCU_FILTER_RSSI_AVE_AVE_VALUE_RESET
#define MAC_PCU_FILTER_RSSI_AVE_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_FILTER_RSSI_AVE_ADDRESS
// SW modifiable bits
#define MAC_PCU_FILTER_RSSI_AVE_SW_MASK 		 RXPCU_FILTER_RSSI_AVE_SW_MASK
// bits defined at reset
#define MAC_PCU_FILTER_RSSI_AVE_RSTMASK 		 RXPCU_FILTER_RSSI_AVE_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_FILTER_RSSI_AVE_RESET 		 RXPCU_FILTER_RSSI_AVE_RESET

// 32'h8678 (MAC_PCU_BT_ANT_SLEEP_EXTEND)
#define MAC_PCU_BT_ANT_SLEEP_EXTEND_CNT_MSB 		 PTA_COEX_BT_ANT_SLEEP_EXTEND_CNT_MSB
#define MAC_PCU_BT_ANT_SLEEP_EXTEND_CNT_LSB 		 PTA_COEX_BT_ANT_SLEEP_EXTEND_CNT_LSB
#define MAC_PCU_BT_ANT_SLEEP_EXTEND_CNT_MASK 		 PTA_COEX_BT_ANT_SLEEP_EXTEND_CNT_MASK
#define MAC_PCU_BT_ANT_SLEEP_EXTEND_CNT_GET(x) 		 PTA_COEX_BT_ANT_SLEEP_EXTEND_CNT_GET(x)
#define MAC_PCU_BT_ANT_SLEEP_EXTEND_CNT_SET(x) 		 PTA_COEX_BT_ANT_SLEEP_EXTEND_CNT_SET(x)
#define MAC_PCU_BT_ANT_SLEEP_EXTEND_CNT_RESET 		 PTA_COEX_BT_ANT_SLEEP_EXTEND_CNT_RESET
#define MAC_PCU_BT_ANT_SLEEP_EXTEND_ADDRESS 		 PTA_COEX_BASE_ADDRESS+PTA_COEX_BT_ANT_SLEEP_EXTEND_ADDRESS
// SW modifiable bits
#define MAC_PCU_BT_ANT_SLEEP_EXTEND_SW_MASK 		 PTA_COEX_BT_ANT_SLEEP_EXTEND_SW_MASK
// bits defined at reset
#define MAC_PCU_BT_ANT_SLEEP_EXTEND_RSTMASK 		 PTA_COEX_BT_ANT_SLEEP_EXTEND_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BT_ANT_SLEEP_EXTEND_RESET 		 PTA_COEX_BT_ANT_SLEEP_EXTEND_RESET

// 32'h867c (MAC_ASE_AST_BASE_ADDR)
#define MAC_ASE_AST_BASE_ADDR_VALUE_MSB 		 RXPCU_ASE_AST_BASE_ADDR_VALUE_MSB
#define MAC_ASE_AST_BASE_ADDR_VALUE_LSB 		 RXPCU_ASE_AST_BASE_ADDR_VALUE_LSB
#define MAC_ASE_AST_BASE_ADDR_VALUE_MASK 		 RXPCU_ASE_AST_BASE_ADDR_VALUE_MASK
#define MAC_ASE_AST_BASE_ADDR_VALUE_GET(x) 		 RXPCU_ASE_AST_BASE_ADDR_VALUE_GET(x)
#define MAC_ASE_AST_BASE_ADDR_VALUE_SET(x) 		 RXPCU_ASE_AST_BASE_ADDR_VALUE_SET(x)
#define MAC_ASE_AST_BASE_ADDR_VALUE_RESET 		 RXPCU_ASE_AST_BASE_ADDR_VALUE_RESET
#define MAC_ASE_AST_BASE_ADDR_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_ASE_AST_BASE_ADDR_ADDRESS
// SW modifiable bits
#define MAC_ASE_AST_BASE_ADDR_SW_MASK 		 RXPCU_ASE_AST_BASE_ADDR_SW_MASK
// bits defined at reset
#define MAC_ASE_AST_BASE_ADDR_RSTMASK 		 RXPCU_ASE_AST_BASE_ADDR_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_ASE_AST_BASE_ADDR_RESET 		 RXPCU_ASE_AST_BASE_ADDR_RESET

// 32'h8680 (MAC_ASE_AST_SIZE)
#define MAC_ASE_AST_SIZE_VALUE_MSB 		 RXPCU_ASE_AST_SIZE_VALUE_MSB
#define MAC_ASE_AST_SIZE_VALUE_LSB 		 RXPCU_ASE_AST_SIZE_VALUE_LSB
#define MAC_ASE_AST_SIZE_VALUE_MASK 		 RXPCU_ASE_AST_SIZE_VALUE_MASK
#define MAC_ASE_AST_SIZE_VALUE_GET(x) 		 RXPCU_ASE_AST_SIZE_VALUE_GET(x)
#define MAC_ASE_AST_SIZE_VALUE_SET(x) 		 RXPCU_ASE_AST_SIZE_VALUE_SET(x)
#define MAC_ASE_AST_SIZE_VALUE_RESET 		 RXPCU_ASE_AST_SIZE_VALUE_RESET
#define MAC_ASE_AST_SIZE_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_ASE_AST_SIZE_ADDRESS
// SW modifiable bits
#define MAC_ASE_AST_SIZE_SW_MASK 		 RXPCU_ASE_AST_SIZE_SW_MASK
// bits defined at reset
#define MAC_ASE_AST_SIZE_RSTMASK 		 RXPCU_ASE_AST_SIZE_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_ASE_AST_SIZE_RESET 		 RXPCU_ASE_AST_SIZE_RESET

// 32'h8684 (MAC_ASE_SEARCH_CTRL)
#define MAC_ASE_SEARCH_CTRL_TIMEOUT_THRESH_MSB 		 RXPCU_ASE_SEARCH_CTRL_TIMEOUT_THRESH_MSB
#define MAC_ASE_SEARCH_CTRL_TIMEOUT_THRESH_LSB 		 RXPCU_ASE_SEARCH_CTRL_TIMEOUT_THRESH_LSB
#define MAC_ASE_SEARCH_CTRL_TIMEOUT_THRESH_MASK 		 RXPCU_ASE_SEARCH_CTRL_TIMEOUT_THRESH_MASK
#define MAC_ASE_SEARCH_CTRL_TIMEOUT_THRESH_GET(x) 		 RXPCU_ASE_SEARCH_CTRL_TIMEOUT_THRESH_GET(x)
#define MAC_ASE_SEARCH_CTRL_TIMEOUT_THRESH_SET(x) 		 RXPCU_ASE_SEARCH_CTRL_TIMEOUT_THRESH_SET(x)
#define MAC_ASE_SEARCH_CTRL_TIMEOUT_THRESH_RESET 		 RXPCU_ASE_SEARCH_CTRL_TIMEOUT_THRESH_RESET
#define MAC_ASE_SEARCH_CTRL_ADDR_SEARCH_SWAP_MSB 		 RXPCU_ASE_SEARCH_CTRL_ADDR_SEARCH_SWAP_MSB
#define MAC_ASE_SEARCH_CTRL_ADDR_SEARCH_SWAP_LSB 		 RXPCU_ASE_SEARCH_CTRL_ADDR_SEARCH_SWAP_LSB
#define MAC_ASE_SEARCH_CTRL_ADDR_SEARCH_SWAP_MASK 		 RXPCU_ASE_SEARCH_CTRL_ADDR_SEARCH_SWAP_MASK
#define MAC_ASE_SEARCH_CTRL_ADDR_SEARCH_SWAP_GET(x) 		 RXPCU_ASE_SEARCH_CTRL_ADDR_SEARCH_SWAP_GET(x)
#define MAC_ASE_SEARCH_CTRL_ADDR_SEARCH_SWAP_SET(x) 		 RXPCU_ASE_SEARCH_CTRL_ADDR_SEARCH_SWAP_SET(x)
#define MAC_ASE_SEARCH_CTRL_ADDR_SEARCH_SWAP_RESET 		 RXPCU_ASE_SEARCH_CTRL_ADDR_SEARCH_SWAP_RESET
#define MAC_ASE_SEARCH_CTRL_MAX_SEARCH_MSB 		 RXPCU_ASE_SEARCH_CTRL_MAX_SEARCH_MSB
#define MAC_ASE_SEARCH_CTRL_MAX_SEARCH_LSB 		 RXPCU_ASE_SEARCH_CTRL_MAX_SEARCH_LSB
#define MAC_ASE_SEARCH_CTRL_MAX_SEARCH_MASK 		 RXPCU_ASE_SEARCH_CTRL_MAX_SEARCH_MASK
#define MAC_ASE_SEARCH_CTRL_MAX_SEARCH_GET(x) 		 RXPCU_ASE_SEARCH_CTRL_MAX_SEARCH_GET(x)
#define MAC_ASE_SEARCH_CTRL_MAX_SEARCH_SET(x) 		 RXPCU_ASE_SEARCH_CTRL_MAX_SEARCH_SET(x)
#define MAC_ASE_SEARCH_CTRL_MAX_SEARCH_RESET 		 RXPCU_ASE_SEARCH_CTRL_MAX_SEARCH_RESET
#define MAC_ASE_SEARCH_CTRL_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_ASE_SEARCH_CTRL_ADDRESS
// SW modifiable bits
#define MAC_ASE_SEARCH_CTRL_SW_MASK 		 RXPCU_ASE_SEARCH_CTRL_SW_MASK
// bits defined at reset
#define MAC_ASE_SEARCH_CTRL_RSTMASK 		 RXPCU_ASE_SEARCH_CTRL_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_ASE_SEARCH_CTRL_RESET 		 RXPCU_ASE_SEARCH_CTRL_RESET

// 32'h8688 (MAC_ASE_HASH_CTRL)
#define MAC_ASE_HASH_CTRL_CACHE_INVALIDATE_MSB 		 RXPCU_ASE_HASH_CTRL_CACHE_INVALIDATE_MSB
#define MAC_ASE_HASH_CTRL_CACHE_INVALIDATE_LSB 		 RXPCU_ASE_HASH_CTRL_CACHE_INVALIDATE_LSB
#define MAC_ASE_HASH_CTRL_CACHE_INVALIDATE_MASK 		 RXPCU_ASE_HASH_CTRL_CACHE_INVALIDATE_MASK
#define MAC_ASE_HASH_CTRL_CACHE_INVALIDATE_GET(x) 		 RXPCU_ASE_HASH_CTRL_CACHE_INVALIDATE_GET(x)
#define MAC_ASE_HASH_CTRL_CACHE_INVALIDATE_SET(x) 		 RXPCU_ASE_HASH_CTRL_CACHE_INVALIDATE_SET(x)
#define MAC_ASE_HASH_CTRL_CACHE_INVALIDATE_RESET 		 RXPCU_ASE_HASH_CTRL_CACHE_INVALIDATE_RESET
#define MAC_ASE_HASH_CTRL_CACHE_DISABLE_MSB 		 RXPCU_ASE_HASH_CTRL_CACHE_DISABLE_MSB
#define MAC_ASE_HASH_CTRL_CACHE_DISABLE_LSB 		 RXPCU_ASE_HASH_CTRL_CACHE_DISABLE_LSB
#define MAC_ASE_HASH_CTRL_CACHE_DISABLE_MASK 		 RXPCU_ASE_HASH_CTRL_CACHE_DISABLE_MASK
#define MAC_ASE_HASH_CTRL_CACHE_DISABLE_GET(x) 		 RXPCU_ASE_HASH_CTRL_CACHE_DISABLE_GET(x)
#define MAC_ASE_HASH_CTRL_CACHE_DISABLE_SET(x) 		 RXPCU_ASE_HASH_CTRL_CACHE_DISABLE_SET(x)
#define MAC_ASE_HASH_CTRL_CACHE_DISABLE_RESET 		 RXPCU_ASE_HASH_CTRL_CACHE_DISABLE_RESET
#define MAC_ASE_HASH_CTRL_HASH_MAC_31_0_IGNORE_MSB 		 RXPCU_ASE_HASH_CTRL_HASH_MAC_31_0_IGNORE_MSB
#define MAC_ASE_HASH_CTRL_HASH_MAC_31_0_IGNORE_LSB 		 RXPCU_ASE_HASH_CTRL_HASH_MAC_31_0_IGNORE_LSB
#define MAC_ASE_HASH_CTRL_HASH_MAC_31_0_IGNORE_MASK 		 RXPCU_ASE_HASH_CTRL_HASH_MAC_31_0_IGNORE_MASK
#define MAC_ASE_HASH_CTRL_HASH_MAC_31_0_IGNORE_GET(x) 		 RXPCU_ASE_HASH_CTRL_HASH_MAC_31_0_IGNORE_GET(x)
#define MAC_ASE_HASH_CTRL_HASH_MAC_31_0_IGNORE_SET(x) 		 RXPCU_ASE_HASH_CTRL_HASH_MAC_31_0_IGNORE_SET(x)
#define MAC_ASE_HASH_CTRL_HASH_MAC_31_0_IGNORE_RESET 		 RXPCU_ASE_HASH_CTRL_HASH_MAC_31_0_IGNORE_RESET
#define MAC_ASE_HASH_CTRL_HASH_SEL_MSB 		 RXPCU_ASE_HASH_CTRL_HASH_SEL_MSB
#define MAC_ASE_HASH_CTRL_HASH_SEL_LSB 		 RXPCU_ASE_HASH_CTRL_HASH_SEL_LSB
#define MAC_ASE_HASH_CTRL_HASH_SEL_MASK 		 RXPCU_ASE_HASH_CTRL_HASH_SEL_MASK
#define MAC_ASE_HASH_CTRL_HASH_SEL_GET(x) 		 RXPCU_ASE_HASH_CTRL_HASH_SEL_GET(x)
#define MAC_ASE_HASH_CTRL_HASH_SEL_SET(x) 		 RXPCU_ASE_HASH_CTRL_HASH_SEL_SET(x)
#define MAC_ASE_HASH_CTRL_HASH_SEL_RESET 		 RXPCU_ASE_HASH_CTRL_HASH_SEL_RESET
#define MAC_ASE_HASH_CTRL_HASH_MCAST_SHIFT_MSB 		 RXPCU_ASE_HASH_CTRL_HASH_MCAST_SHIFT_MSB
#define MAC_ASE_HASH_CTRL_HASH_MCAST_SHIFT_LSB 		 RXPCU_ASE_HASH_CTRL_HASH_MCAST_SHIFT_LSB
#define MAC_ASE_HASH_CTRL_HASH_MCAST_SHIFT_MASK 		 RXPCU_ASE_HASH_CTRL_HASH_MCAST_SHIFT_MASK
#define MAC_ASE_HASH_CTRL_HASH_MCAST_SHIFT_GET(x) 		 RXPCU_ASE_HASH_CTRL_HASH_MCAST_SHIFT_GET(x)
#define MAC_ASE_HASH_CTRL_HASH_MCAST_SHIFT_SET(x) 		 RXPCU_ASE_HASH_CTRL_HASH_MCAST_SHIFT_SET(x)
#define MAC_ASE_HASH_CTRL_HASH_MCAST_SHIFT_RESET 		 RXPCU_ASE_HASH_CTRL_HASH_MCAST_SHIFT_RESET
#define MAC_ASE_HASH_CTRL_HASH_XOR_MSB 		 RXPCU_ASE_HASH_CTRL_HASH_XOR_MSB
#define MAC_ASE_HASH_CTRL_HASH_XOR_LSB 		 RXPCU_ASE_HASH_CTRL_HASH_XOR_LSB
#define MAC_ASE_HASH_CTRL_HASH_XOR_MASK 		 RXPCU_ASE_HASH_CTRL_HASH_XOR_MASK
#define MAC_ASE_HASH_CTRL_HASH_XOR_GET(x) 		 RXPCU_ASE_HASH_CTRL_HASH_XOR_GET(x)
#define MAC_ASE_HASH_CTRL_HASH_XOR_SET(x) 		 RXPCU_ASE_HASH_CTRL_HASH_XOR_SET(x)
#define MAC_ASE_HASH_CTRL_HASH_XOR_RESET 		 RXPCU_ASE_HASH_CTRL_HASH_XOR_RESET
#define MAC_ASE_HASH_CTRL_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_ASE_HASH_CTRL_ADDRESS
// SW modifiable bits
#define MAC_ASE_HASH_CTRL_SW_MASK 		 RXPCU_ASE_HASH_CTRL_SW_MASK
// bits defined at reset
#define MAC_ASE_HASH_CTRL_RSTMASK 		 RXPCU_ASE_HASH_CTRL_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_ASE_HASH_CTRL_RESET 		 RXPCU_ASE_HASH_CTRL_RESET

// 32'h868c (MAC_PCU_BSSID3_L32)
#define MAC_PCU_BSSID3_L32_ADDR_MSB 		 RXPCU_BSSID3_L32_ADDR_MSB
#define MAC_PCU_BSSID3_L32_ADDR_LSB 		 RXPCU_BSSID3_L32_ADDR_LSB
#define MAC_PCU_BSSID3_L32_ADDR_MASK 		 RXPCU_BSSID3_L32_ADDR_MASK
#define MAC_PCU_BSSID3_L32_ADDR_GET(x) 		 RXPCU_BSSID3_L32_ADDR_GET(x)
#define MAC_PCU_BSSID3_L32_ADDR_SET(x) 		 RXPCU_BSSID3_L32_ADDR_SET(x)
#define MAC_PCU_BSSID3_L32_ADDR_RESET 		 RXPCU_BSSID3_L32_ADDR_RESET
#define MAC_PCU_BSSID3_L32_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_BSSID3_L32_ADDRESS
// SW modifiable bits
#define MAC_PCU_BSSID3_L32_SW_MASK 		 RXPCU_BSSID3_L32_SW_MASK
// bits defined at reset
#define MAC_PCU_BSSID3_L32_RSTMASK 		 RXPCU_BSSID3_L32_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BSSID3_L32_RESET 		 RXPCU_BSSID3_L32_RESET

// 32'h8690 (MAC_PCU_BSSID3_U16)
#define MAC_PCU_BSSID3_U16_ENABLE_MSB 		 RXPCU_BSSID3_U16_ENABLE_MSB
#define MAC_PCU_BSSID3_U16_ENABLE_LSB 		 RXPCU_BSSID3_U16_ENABLE_LSB
#define MAC_PCU_BSSID3_U16_ENABLE_MASK 		 RXPCU_BSSID3_U16_ENABLE_MASK
#define MAC_PCU_BSSID3_U16_ENABLE_GET(x) 		 RXPCU_BSSID3_U16_ENABLE_GET(x)
#define MAC_PCU_BSSID3_U16_ENABLE_SET(x) 		 RXPCU_BSSID3_U16_ENABLE_SET(x)
#define MAC_PCU_BSSID3_U16_ENABLE_RESET 		 RXPCU_BSSID3_U16_ENABLE_RESET
#define MAC_PCU_BSSID3_U16_ADDR_MSB 		 RXPCU_BSSID3_U16_ADDR_MSB
#define MAC_PCU_BSSID3_U16_ADDR_LSB 		 RXPCU_BSSID3_U16_ADDR_LSB
#define MAC_PCU_BSSID3_U16_ADDR_MASK 		 RXPCU_BSSID3_U16_ADDR_MASK
#define MAC_PCU_BSSID3_U16_ADDR_GET(x) 		 RXPCU_BSSID3_U16_ADDR_GET(x)
#define MAC_PCU_BSSID3_U16_ADDR_SET(x) 		 RXPCU_BSSID3_U16_ADDR_SET(x)
#define MAC_PCU_BSSID3_U16_ADDR_RESET 		 RXPCU_BSSID3_U16_ADDR_RESET
#define MAC_PCU_BSSID3_U16_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_BSSID3_U16_ADDRESS
// SW modifiable bits
#define MAC_PCU_BSSID3_U16_SW_MASK 		 RXPCU_BSSID3_U16_SW_MASK
// bits defined at reset
#define MAC_PCU_BSSID3_U16_RSTMASK 		 RXPCU_BSSID3_U16_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BSSID3_U16_RESET 		 RXPCU_BSSID3_U16_RESET

// 32'h8694 (MAC_PCU_BSSID4_L32)
#define MAC_PCU_BSSID4_L32_ADDR_MSB 		 RXPCU_BSSID4_L32_ADDR_MSB
#define MAC_PCU_BSSID4_L32_ADDR_LSB 		 RXPCU_BSSID4_L32_ADDR_LSB
#define MAC_PCU_BSSID4_L32_ADDR_MASK 		 RXPCU_BSSID4_L32_ADDR_MASK
#define MAC_PCU_BSSID4_L32_ADDR_GET(x) 		 RXPCU_BSSID4_L32_ADDR_GET(x)
#define MAC_PCU_BSSID4_L32_ADDR_SET(x) 		 RXPCU_BSSID4_L32_ADDR_SET(x)
#define MAC_PCU_BSSID4_L32_ADDR_RESET 		 RXPCU_BSSID4_L32_ADDR_RESET
#define MAC_PCU_BSSID4_L32_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_BSSID4_L32_ADDRESS
// SW modifiable bits
#define MAC_PCU_BSSID4_L32_SW_MASK 		 RXPCU_BSSID4_L32_SW_MASK
// bits defined at reset
#define MAC_PCU_BSSID4_L32_RSTMASK 		 RXPCU_BSSID4_L32_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BSSID4_L32_RESET 		 RXPCU_BSSID4_L32_RESET

// 32'h8698 (MAC_PCU_BSSID4_U16)
#define MAC_PCU_BSSID4_U16_ENABLE_MSB 		 RXPCU_BSSID4_U16_ENABLE_MSB
#define MAC_PCU_BSSID4_U16_ENABLE_LSB 		 RXPCU_BSSID4_U16_ENABLE_LSB
#define MAC_PCU_BSSID4_U16_ENABLE_MASK 		 RXPCU_BSSID4_U16_ENABLE_MASK
#define MAC_PCU_BSSID4_U16_ENABLE_GET(x) 		 RXPCU_BSSID4_U16_ENABLE_GET(x)
#define MAC_PCU_BSSID4_U16_ENABLE_SET(x) 		 RXPCU_BSSID4_U16_ENABLE_SET(x)
#define MAC_PCU_BSSID4_U16_ENABLE_RESET 		 RXPCU_BSSID4_U16_ENABLE_RESET
#define MAC_PCU_BSSID4_U16_ADDR_MSB 		 RXPCU_BSSID4_U16_ADDR_MSB
#define MAC_PCU_BSSID4_U16_ADDR_LSB 		 RXPCU_BSSID4_U16_ADDR_LSB
#define MAC_PCU_BSSID4_U16_ADDR_MASK 		 RXPCU_BSSID4_U16_ADDR_MASK
#define MAC_PCU_BSSID4_U16_ADDR_GET(x) 		 RXPCU_BSSID4_U16_ADDR_GET(x)
#define MAC_PCU_BSSID4_U16_ADDR_SET(x) 		 RXPCU_BSSID4_U16_ADDR_SET(x)
#define MAC_PCU_BSSID4_U16_ADDR_RESET 		 RXPCU_BSSID4_U16_ADDR_RESET
#define MAC_PCU_BSSID4_U16_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_BSSID4_U16_ADDRESS
// SW modifiable bits
#define MAC_PCU_BSSID4_U16_SW_MASK 		 RXPCU_BSSID4_U16_SW_MASK
// bits defined at reset
#define MAC_PCU_BSSID4_U16_RSTMASK 		 RXPCU_BSSID4_U16_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_BSSID4_U16_RESET 		 RXPCU_BSSID4_U16_RESET

// 32'h869c (MAC_PCU_RX_FILTER2)
#define MAC_PCU_RX_FILTER2_BRPOLL_MSB 		 RXPCU_RX_FILTER2_BRPOLL_MSB
#define MAC_PCU_RX_FILTER2_BRPOLL_LSB 		 RXPCU_RX_FILTER2_BRPOLL_LSB
#define MAC_PCU_RX_FILTER2_BRPOLL_MASK 		 RXPCU_RX_FILTER2_BRPOLL_MASK
#define MAC_PCU_RX_FILTER2_BRPOLL_GET(x) 		 RXPCU_RX_FILTER2_BRPOLL_GET(x)
#define MAC_PCU_RX_FILTER2_BRPOLL_SET(x) 		 RXPCU_RX_FILTER2_BRPOLL_SET(x)
#define MAC_PCU_RX_FILTER2_BRPOLL_RESET 		 RXPCU_RX_FILTER2_BRPOLL_RESET
#define MAC_PCU_RX_FILTER2_NDPA_MSB 		 RXPCU_RX_FILTER2_NDPA_MSB
#define MAC_PCU_RX_FILTER2_NDPA_LSB 		 RXPCU_RX_FILTER2_NDPA_LSB
#define MAC_PCU_RX_FILTER2_NDPA_MASK 		 RXPCU_RX_FILTER2_NDPA_MASK
#define MAC_PCU_RX_FILTER2_NDPA_GET(x) 		 RXPCU_RX_FILTER2_NDPA_GET(x)
#define MAC_PCU_RX_FILTER2_NDPA_SET(x) 		 RXPCU_RX_FILTER2_NDPA_SET(x)
#define MAC_PCU_RX_FILTER2_NDPA_RESET 		 RXPCU_RX_FILTER2_NDPA_RESET
#define MAC_PCU_RX_FILTER2_BSSID_BASED_UNICAST_MSB 		 RXPCU_RX_FILTER2_BSSID_BASED_UNICAST_MSB
#define MAC_PCU_RX_FILTER2_BSSID_BASED_UNICAST_LSB 		 RXPCU_RX_FILTER2_BSSID_BASED_UNICAST_LSB
#define MAC_PCU_RX_FILTER2_BSSID_BASED_UNICAST_MASK 		 RXPCU_RX_FILTER2_BSSID_BASED_UNICAST_MASK
#define MAC_PCU_RX_FILTER2_BSSID_BASED_UNICAST_GET(x) 		 RXPCU_RX_FILTER2_BSSID_BASED_UNICAST_GET(x)
#define MAC_PCU_RX_FILTER2_BSSID_BASED_UNICAST_SET(x) 		 RXPCU_RX_FILTER2_BSSID_BASED_UNICAST_SET(x)
#define MAC_PCU_RX_FILTER2_BSSID_BASED_UNICAST_RESET 		 RXPCU_RX_FILTER2_BSSID_BASED_UNICAST_RESET
#define MAC_PCU_RX_FILTER2_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_RX_FILTER2_ADDRESS
// SW modifiable bits
#define MAC_PCU_RX_FILTER2_SW_MASK 		 RXPCU_RX_FILTER2_SW_MASK
// bits defined at reset
#define MAC_PCU_RX_FILTER2_RSTMASK 		 RXPCU_RX_FILTER2_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_RX_FILTER2_RESET 		 RXPCU_RX_FILTER2_RESET

// 32'h86a0 (MAC_PCU_RTT_CTRL)
#define MAC_PCU_RTT_CTRL_VHT_ACK_PARTIAL_AID_MSB 		 RXPCU_RTT_CTRL_VHT_ACK_PARTIAL_AID_MSB
#define MAC_PCU_RTT_CTRL_VHT_ACK_PARTIAL_AID_LSB 		 RXPCU_RTT_CTRL_VHT_ACK_PARTIAL_AID_LSB
#define MAC_PCU_RTT_CTRL_VHT_ACK_PARTIAL_AID_MASK 		 RXPCU_RTT_CTRL_VHT_ACK_PARTIAL_AID_MASK
#define MAC_PCU_RTT_CTRL_VHT_ACK_PARTIAL_AID_GET(x) 		 RXPCU_RTT_CTRL_VHT_ACK_PARTIAL_AID_GET(x)
#define MAC_PCU_RTT_CTRL_VHT_ACK_PARTIAL_AID_SET(x) 		 RXPCU_RTT_CTRL_VHT_ACK_PARTIAL_AID_SET(x)
#define MAC_PCU_RTT_CTRL_VHT_ACK_PARTIAL_AID_RESET 		 RXPCU_RTT_CTRL_VHT_ACK_PARTIAL_AID_RESET
#define MAC_PCU_RTT_CTRL_VHT_ACK_GROUP_ID_MSB 		 RXPCU_RTT_CTRL_VHT_ACK_GROUP_ID_MSB
#define MAC_PCU_RTT_CTRL_VHT_ACK_GROUP_ID_LSB 		 RXPCU_RTT_CTRL_VHT_ACK_GROUP_ID_LSB
#define MAC_PCU_RTT_CTRL_VHT_ACK_GROUP_ID_MASK 		 RXPCU_RTT_CTRL_VHT_ACK_GROUP_ID_MASK
#define MAC_PCU_RTT_CTRL_VHT_ACK_GROUP_ID_GET(x) 		 RXPCU_RTT_CTRL_VHT_ACK_GROUP_ID_GET(x)
#define MAC_PCU_RTT_CTRL_VHT_ACK_GROUP_ID_SET(x) 		 RXPCU_RTT_CTRL_VHT_ACK_GROUP_ID_SET(x)
#define MAC_PCU_RTT_CTRL_VHT_ACK_GROUP_ID_RESET 		 RXPCU_RTT_CTRL_VHT_ACK_GROUP_ID_RESET
#define MAC_PCU_RTT_CTRL_ALLOW_HT_VHT_ACK_BA_MSB 		 RXPCU_RTT_CTRL_ALLOW_HT_VHT_ACK_BA_MSB
#define MAC_PCU_RTT_CTRL_ALLOW_HT_VHT_ACK_BA_LSB 		 RXPCU_RTT_CTRL_ALLOW_HT_VHT_ACK_BA_LSB
#define MAC_PCU_RTT_CTRL_ALLOW_HT_VHT_ACK_BA_MASK 		 RXPCU_RTT_CTRL_ALLOW_HT_VHT_ACK_BA_MASK
#define MAC_PCU_RTT_CTRL_ALLOW_HT_VHT_ACK_BA_GET(x) 		 RXPCU_RTT_CTRL_ALLOW_HT_VHT_ACK_BA_GET(x)
#define MAC_PCU_RTT_CTRL_ALLOW_HT_VHT_ACK_BA_SET(x) 		 RXPCU_RTT_CTRL_ALLOW_HT_VHT_ACK_BA_SET(x)
#define MAC_PCU_RTT_CTRL_ALLOW_HT_VHT_ACK_BA_RESET 		 RXPCU_RTT_CTRL_ALLOW_HT_VHT_ACK_BA_RESET
#define MAC_PCU_RTT_CTRL_ACTION_MSB 		 RXPCU_RTT_CTRL_ACTION_MSB
#define MAC_PCU_RTT_CTRL_ACTION_LSB 		 RXPCU_RTT_CTRL_ACTION_LSB
#define MAC_PCU_RTT_CTRL_ACTION_MASK 		 RXPCU_RTT_CTRL_ACTION_MASK
#define MAC_PCU_RTT_CTRL_ACTION_GET(x) 		 RXPCU_RTT_CTRL_ACTION_GET(x)
#define MAC_PCU_RTT_CTRL_ACTION_SET(x) 		 RXPCU_RTT_CTRL_ACTION_SET(x)
#define MAC_PCU_RTT_CTRL_ACTION_RESET 		 RXPCU_RTT_CTRL_ACTION_RESET
#define MAC_PCU_RTT_CTRL_CATEGORY_MSB 		 RXPCU_RTT_CTRL_CATEGORY_MSB
#define MAC_PCU_RTT_CTRL_CATEGORY_LSB 		 RXPCU_RTT_CTRL_CATEGORY_LSB
#define MAC_PCU_RTT_CTRL_CATEGORY_MASK 		 RXPCU_RTT_CTRL_CATEGORY_MASK
#define MAC_PCU_RTT_CTRL_CATEGORY_GET(x) 		 RXPCU_RTT_CTRL_CATEGORY_GET(x)
#define MAC_PCU_RTT_CTRL_CATEGORY_SET(x) 		 RXPCU_RTT_CTRL_CATEGORY_SET(x)
#define MAC_PCU_RTT_CTRL_CATEGORY_RESET 		 RXPCU_RTT_CTRL_CATEGORY_RESET
#define MAC_PCU_RTT_CTRL_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_RTT_CTRL_ADDRESS
// SW modifiable bits
#define MAC_PCU_RTT_CTRL_SW_MASK 		 RXPCU_RTT_CTRL_SW_MASK
// bits defined at reset
#define MAC_PCU_RTT_CTRL_RSTMASK 		 RXPCU_RTT_CTRL_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_RTT_CTRL_RESET 		 RXPCU_RTT_CTRL_RESET

// 32'h86a4 (MAC_PCU_PHY_ERROR_CODE)
#define MAC_PCU_PHY_ERROR_CODE_VALUE_MSB 		 RXPCU_PHY_ERROR_CODE_VALUE_MSB
#define MAC_PCU_PHY_ERROR_CODE_VALUE_LSB 		 RXPCU_PHY_ERROR_CODE_VALUE_LSB
#define MAC_PCU_PHY_ERROR_CODE_VALUE_MASK 		 RXPCU_PHY_ERROR_CODE_VALUE_MASK
#define MAC_PCU_PHY_ERROR_CODE_VALUE_GET(x) 		 RXPCU_PHY_ERROR_CODE_VALUE_GET(x)
#define MAC_PCU_PHY_ERROR_CODE_VALUE_SET(x) 		 RXPCU_PHY_ERROR_CODE_VALUE_SET(x)
#define MAC_PCU_PHY_ERROR_CODE_VALUE_RESET 		 RXPCU_PHY_ERROR_CODE_VALUE_RESET
#define MAC_PCU_PHY_ERROR_CODE_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_PHY_ERROR_CODE_ADDRESS
// SW modifiable bits
#define MAC_PCU_PHY_ERROR_CODE_SW_MASK 		 RXPCU_PHY_ERROR_CODE_SW_MASK
// bits defined at reset
#define MAC_PCU_PHY_ERROR_CODE_RSTMASK 		 RXPCU_PHY_ERROR_CODE_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_PHY_ERROR_CODE_RESET 		 RXPCU_PHY_ERROR_CODE_RESET

// 32'h86a8 (MAC_PCU_PHY_ERROR_EIFS_MASK_CONT)
#define MAC_PCU_PHY_ERROR_EIFS_MASK_CONT_VALUE_MSB 		 RXPCU_PHY_ERROR_EIFS_MASK_CONT_VALUE_MSB
#define MAC_PCU_PHY_ERROR_EIFS_MASK_CONT_VALUE_LSB 		 RXPCU_PHY_ERROR_EIFS_MASK_CONT_VALUE_LSB
#define MAC_PCU_PHY_ERROR_EIFS_MASK_CONT_VALUE_MASK 		 RXPCU_PHY_ERROR_EIFS_MASK_CONT_VALUE_MASK
#define MAC_PCU_PHY_ERROR_EIFS_MASK_CONT_VALUE_GET(x) 		 RXPCU_PHY_ERROR_EIFS_MASK_CONT_VALUE_GET(x)
#define MAC_PCU_PHY_ERROR_EIFS_MASK_CONT_VALUE_SET(x) 		 RXPCU_PHY_ERROR_EIFS_MASK_CONT_VALUE_SET(x)
#define MAC_PCU_PHY_ERROR_EIFS_MASK_CONT_VALUE_RESET 		 RXPCU_PHY_ERROR_EIFS_MASK_CONT_VALUE_RESET
#define MAC_PCU_PHY_ERROR_EIFS_MASK_CONT_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_PHY_ERROR_EIFS_MASK_CONT_ADDRESS
// SW modifiable bits
#define MAC_PCU_PHY_ERROR_EIFS_MASK_CONT_SW_MASK 		 RXPCU_PHY_ERROR_EIFS_MASK_CONT_SW_MASK
// bits defined at reset
#define MAC_PCU_PHY_ERROR_EIFS_MASK_CONT_RSTMASK 		 RXPCU_PHY_ERROR_EIFS_MASK_CONT_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_PHY_ERROR_EIFS_MASK_CONT_RESET 		 RXPCU_PHY_ERROR_EIFS_MASK_CONT_RESET

// 32'h86ac (MAC_PCU_PHY_ERROR_AIFS_MASK_CONT)
#define MAC_PCU_PHY_ERROR_AIFS_MASK_CONT_VALUE_MSB 		 RXPCU_PHY_ERROR_AIFS_MASK_CONT_VALUE_MSB
#define MAC_PCU_PHY_ERROR_AIFS_MASK_CONT_VALUE_LSB 		 RXPCU_PHY_ERROR_AIFS_MASK_CONT_VALUE_LSB
#define MAC_PCU_PHY_ERROR_AIFS_MASK_CONT_VALUE_MASK 		 RXPCU_PHY_ERROR_AIFS_MASK_CONT_VALUE_MASK
#define MAC_PCU_PHY_ERROR_AIFS_MASK_CONT_VALUE_GET(x) 		 RXPCU_PHY_ERROR_AIFS_MASK_CONT_VALUE_GET(x)
#define MAC_PCU_PHY_ERROR_AIFS_MASK_CONT_VALUE_SET(x) 		 RXPCU_PHY_ERROR_AIFS_MASK_CONT_VALUE_SET(x)
#define MAC_PCU_PHY_ERROR_AIFS_MASK_CONT_VALUE_RESET 		 RXPCU_PHY_ERROR_AIFS_MASK_CONT_VALUE_RESET
#define MAC_PCU_PHY_ERROR_AIFS_MASK_CONT_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_PHY_ERROR_AIFS_MASK_CONT_ADDRESS
// SW modifiable bits
#define MAC_PCU_PHY_ERROR_AIFS_MASK_CONT_SW_MASK 		 RXPCU_PHY_ERROR_AIFS_MASK_CONT_SW_MASK
// bits defined at reset
#define MAC_PCU_PHY_ERROR_AIFS_MASK_CONT_RSTMASK 		 RXPCU_PHY_ERROR_AIFS_MASK_CONT_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_PHY_ERROR_AIFS_MASK_CONT_RESET 		 RXPCU_PHY_ERROR_AIFS_MASK_CONT_RESET

// 32'h86b0 (MAC_PCU_PHY_ERR_CNT_2_MASK_CONT)
#define MAC_PCU_PHY_ERR_CNT_2_MASK_CONT_VALUE_MSB 		 RXPCU_PHY_ERR_CNT_2_MASK_CONT_VALUE_MSB
#define MAC_PCU_PHY_ERR_CNT_2_MASK_CONT_VALUE_LSB 		 RXPCU_PHY_ERR_CNT_2_MASK_CONT_VALUE_LSB
#define MAC_PCU_PHY_ERR_CNT_2_MASK_CONT_VALUE_MASK 		 RXPCU_PHY_ERR_CNT_2_MASK_CONT_VALUE_MASK
#define MAC_PCU_PHY_ERR_CNT_2_MASK_CONT_VALUE_GET(x) 		 RXPCU_PHY_ERR_CNT_2_MASK_CONT_VALUE_GET(x)
#define MAC_PCU_PHY_ERR_CNT_2_MASK_CONT_VALUE_SET(x) 		 RXPCU_PHY_ERR_CNT_2_MASK_CONT_VALUE_SET(x)
#define MAC_PCU_PHY_ERR_CNT_2_MASK_CONT_VALUE_RESET 		 RXPCU_PHY_ERR_CNT_2_MASK_CONT_VALUE_RESET
#define MAC_PCU_PHY_ERR_CNT_2_MASK_CONT_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_PHY_ERR_CNT_2_MASK_CONT_ADDRESS
// SW modifiable bits
#define MAC_PCU_PHY_ERR_CNT_2_MASK_CONT_SW_MASK 		 RXPCU_PHY_ERR_CNT_2_MASK_CONT_SW_MASK
// bits defined at reset
#define MAC_PCU_PHY_ERR_CNT_2_MASK_CONT_RSTMASK 		 RXPCU_PHY_ERR_CNT_2_MASK_CONT_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_PHY_ERR_CNT_2_MASK_CONT_RESET 		 RXPCU_PHY_ERR_CNT_2_MASK_CONT_RESET

// 32'h86b4 (MAC_PCU_PHY_ERR_CNT_3_MASK_CONT)
#define MAC_PCU_PHY_ERR_CNT_3_MASK_CONT_VALUE_MSB 		 RXPCU_PHY_ERR_CNT_3_MASK_CONT_VALUE_MSB
#define MAC_PCU_PHY_ERR_CNT_3_MASK_CONT_VALUE_LSB 		 RXPCU_PHY_ERR_CNT_3_MASK_CONT_VALUE_LSB
#define MAC_PCU_PHY_ERR_CNT_3_MASK_CONT_VALUE_MASK 		 RXPCU_PHY_ERR_CNT_3_MASK_CONT_VALUE_MASK
#define MAC_PCU_PHY_ERR_CNT_3_MASK_CONT_VALUE_GET(x) 		 RXPCU_PHY_ERR_CNT_3_MASK_CONT_VALUE_GET(x)
#define MAC_PCU_PHY_ERR_CNT_3_MASK_CONT_VALUE_SET(x) 		 RXPCU_PHY_ERR_CNT_3_MASK_CONT_VALUE_SET(x)
#define MAC_PCU_PHY_ERR_CNT_3_MASK_CONT_VALUE_RESET 		 RXPCU_PHY_ERR_CNT_3_MASK_CONT_VALUE_RESET
#define MAC_PCU_PHY_ERR_CNT_3_MASK_CONT_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_PHY_ERR_CNT_3_MASK_CONT_ADDRESS
// SW modifiable bits
#define MAC_PCU_PHY_ERR_CNT_3_MASK_CONT_SW_MASK 		 RXPCU_PHY_ERR_CNT_3_MASK_CONT_SW_MASK
// bits defined at reset
#define MAC_PCU_PHY_ERR_CNT_3_MASK_CONT_RSTMASK 		 RXPCU_PHY_ERR_CNT_3_MASK_CONT_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_PHY_ERR_CNT_3_MASK_CONT_RESET 		 RXPCU_PHY_ERR_CNT_3_MASK_CONT_RESET

// 32'h86b8 (MAC_PCU_PHY_DATA_LENGTH_THRESH)
#define MAC_PCU_PHY_DATA_LENGTH_THRESH_ENABLE_MSB 		 RXPCU_PHY_DATA_LENGTH_THRESH_ENABLE_MSB
#define MAC_PCU_PHY_DATA_LENGTH_THRESH_ENABLE_LSB 		 RXPCU_PHY_DATA_LENGTH_THRESH_ENABLE_LSB
#define MAC_PCU_PHY_DATA_LENGTH_THRESH_ENABLE_MASK 		 RXPCU_PHY_DATA_LENGTH_THRESH_ENABLE_MASK
#define MAC_PCU_PHY_DATA_LENGTH_THRESH_ENABLE_GET(x) 		 RXPCU_PHY_DATA_LENGTH_THRESH_ENABLE_GET(x)
#define MAC_PCU_PHY_DATA_LENGTH_THRESH_ENABLE_SET(x) 		 RXPCU_PHY_DATA_LENGTH_THRESH_ENABLE_SET(x)
#define MAC_PCU_PHY_DATA_LENGTH_THRESH_ENABLE_RESET 		 RXPCU_PHY_DATA_LENGTH_THRESH_ENABLE_RESET
#define MAC_PCU_PHY_DATA_LENGTH_THRESH_VALUE_MSB 		 RXPCU_PHY_DATA_LENGTH_THRESH_VALUE_MSB
#define MAC_PCU_PHY_DATA_LENGTH_THRESH_VALUE_LSB 		 RXPCU_PHY_DATA_LENGTH_THRESH_VALUE_LSB
#define MAC_PCU_PHY_DATA_LENGTH_THRESH_VALUE_MASK 		 RXPCU_PHY_DATA_LENGTH_THRESH_VALUE_MASK
#define MAC_PCU_PHY_DATA_LENGTH_THRESH_VALUE_GET(x) 		 RXPCU_PHY_DATA_LENGTH_THRESH_VALUE_GET(x)
#define MAC_PCU_PHY_DATA_LENGTH_THRESH_VALUE_SET(x) 		 RXPCU_PHY_DATA_LENGTH_THRESH_VALUE_SET(x)
#define MAC_PCU_PHY_DATA_LENGTH_THRESH_VALUE_RESET 		 RXPCU_PHY_DATA_LENGTH_THRESH_VALUE_RESET
#define MAC_PCU_PHY_DATA_LENGTH_THRESH_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_PHY_DATA_LENGTH_THRESH_ADDRESS
// SW modifiable bits
#define MAC_PCU_PHY_DATA_LENGTH_THRESH_SW_MASK 		 RXPCU_PHY_DATA_LENGTH_THRESH_SW_MASK
// bits defined at reset
#define MAC_PCU_PHY_DATA_LENGTH_THRESH_RSTMASK 		 RXPCU_PHY_DATA_LENGTH_THRESH_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_PHY_DATA_LENGTH_THRESH_RESET 		 RXPCU_PHY_DATA_LENGTH_THRESH_RESET

// 32'h86bc (MAC_PCU_SEC_CHANNEL_TX_PIFS_CNT)
#define MAC_PCU_SEC_CHANNEL_TX_PIFS_CNT_VALUE_MSB 		 RXPCU_SEC_CHANNEL_TX_PIFS_CNT_VALUE_MSB
#define MAC_PCU_SEC_CHANNEL_TX_PIFS_CNT_VALUE_LSB 		 RXPCU_SEC_CHANNEL_TX_PIFS_CNT_VALUE_LSB
#define MAC_PCU_SEC_CHANNEL_TX_PIFS_CNT_VALUE_MASK 		 RXPCU_SEC_CHANNEL_TX_PIFS_CNT_VALUE_MASK
#define MAC_PCU_SEC_CHANNEL_TX_PIFS_CNT_VALUE_GET(x) 		 RXPCU_SEC_CHANNEL_TX_PIFS_CNT_VALUE_GET(x)
#define MAC_PCU_SEC_CHANNEL_TX_PIFS_CNT_VALUE_SET(x) 		 RXPCU_SEC_CHANNEL_TX_PIFS_CNT_VALUE_SET(x)
#define MAC_PCU_SEC_CHANNEL_TX_PIFS_CNT_VALUE_RESET 		 RXPCU_SEC_CHANNEL_TX_PIFS_CNT_VALUE_RESET
#define MAC_PCU_SEC_CHANNEL_TX_PIFS_CNT_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_SEC_CHANNEL_TX_PIFS_CNT_ADDRESS
// SW modifiable bits
#define MAC_PCU_SEC_CHANNEL_TX_PIFS_CNT_SW_MASK 		 RXPCU_SEC_CHANNEL_TX_PIFS_CNT_SW_MASK
// bits defined at reset
#define MAC_PCU_SEC_CHANNEL_TX_PIFS_CNT_RSTMASK 		 RXPCU_SEC_CHANNEL_TX_PIFS_CNT_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_SEC_CHANNEL_TX_PIFS_CNT_RESET 		 RXPCU_SEC_CHANNEL_TX_PIFS_CNT_RESET

// 32'h86c0 (MAC_PCU_SEC_CHANNEL_RX_PIFS_CNT)
#define MAC_PCU_SEC_CHANNEL_RX_PIFS_CNT_VALUE_MSB 		 RXPCU_SEC_CHANNEL_RX_PIFS_CNT_VALUE_MSB
#define MAC_PCU_SEC_CHANNEL_RX_PIFS_CNT_VALUE_LSB 		 RXPCU_SEC_CHANNEL_RX_PIFS_CNT_VALUE_LSB
#define MAC_PCU_SEC_CHANNEL_RX_PIFS_CNT_VALUE_MASK 		 RXPCU_SEC_CHANNEL_RX_PIFS_CNT_VALUE_MASK
#define MAC_PCU_SEC_CHANNEL_RX_PIFS_CNT_VALUE_GET(x) 		 RXPCU_SEC_CHANNEL_RX_PIFS_CNT_VALUE_GET(x)
#define MAC_PCU_SEC_CHANNEL_RX_PIFS_CNT_VALUE_SET(x) 		 RXPCU_SEC_CHANNEL_RX_PIFS_CNT_VALUE_SET(x)
#define MAC_PCU_SEC_CHANNEL_RX_PIFS_CNT_VALUE_RESET 		 RXPCU_SEC_CHANNEL_RX_PIFS_CNT_VALUE_RESET
#define MAC_PCU_SEC_CHANNEL_RX_PIFS_CNT_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_SEC_CHANNEL_RX_PIFS_CNT_ADDRESS
// SW modifiable bits
#define MAC_PCU_SEC_CHANNEL_RX_PIFS_CNT_SW_MASK 		 RXPCU_SEC_CHANNEL_RX_PIFS_CNT_SW_MASK
// bits defined at reset
#define MAC_PCU_SEC_CHANNEL_RX_PIFS_CNT_RSTMASK 		 RXPCU_SEC_CHANNEL_RX_PIFS_CNT_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_SEC_CHANNEL_RX_PIFS_CNT_RESET 		 RXPCU_SEC_CHANNEL_RX_PIFS_CNT_RESET

// 32'h86c4 (MAC_PCU_POWER_SAVE_0)
#define MAC_PCU_POWER_SAVE_0_RSSI_CHECK_ENABLE_MSB 		 RXPCU_POWER_SAVE_0_RSSI_CHECK_ENABLE_MSB
#define MAC_PCU_POWER_SAVE_0_RSSI_CHECK_ENABLE_LSB 		 RXPCU_POWER_SAVE_0_RSSI_CHECK_ENABLE_LSB
#define MAC_PCU_POWER_SAVE_0_RSSI_CHECK_ENABLE_MASK 		 RXPCU_POWER_SAVE_0_RSSI_CHECK_ENABLE_MASK
#define MAC_PCU_POWER_SAVE_0_RSSI_CHECK_ENABLE_GET(x) 		 RXPCU_POWER_SAVE_0_RSSI_CHECK_ENABLE_GET(x)
#define MAC_PCU_POWER_SAVE_0_RSSI_CHECK_ENABLE_SET(x) 		 RXPCU_POWER_SAVE_0_RSSI_CHECK_ENABLE_SET(x)
#define MAC_PCU_POWER_SAVE_0_RSSI_CHECK_ENABLE_RESET 		 RXPCU_POWER_SAVE_0_RSSI_CHECK_ENABLE_RESET
#define MAC_PCU_POWER_SAVE_0_GID_NSTS_ZERO_ENABLE_MSB 		 RXPCU_POWER_SAVE_0_GID_NSTS_ZERO_ENABLE_MSB
#define MAC_PCU_POWER_SAVE_0_GID_NSTS_ZERO_ENABLE_LSB 		 RXPCU_POWER_SAVE_0_GID_NSTS_ZERO_ENABLE_LSB
#define MAC_PCU_POWER_SAVE_0_GID_NSTS_ZERO_ENABLE_MASK 		 RXPCU_POWER_SAVE_0_GID_NSTS_ZERO_ENABLE_MASK
#define MAC_PCU_POWER_SAVE_0_GID_NSTS_ZERO_ENABLE_GET(x) 		 RXPCU_POWER_SAVE_0_GID_NSTS_ZERO_ENABLE_GET(x)
#define MAC_PCU_POWER_SAVE_0_GID_NSTS_ZERO_ENABLE_SET(x) 		 RXPCU_POWER_SAVE_0_GID_NSTS_ZERO_ENABLE_SET(x)
#define MAC_PCU_POWER_SAVE_0_GID_NSTS_ZERO_ENABLE_RESET 		 RXPCU_POWER_SAVE_0_GID_NSTS_ZERO_ENABLE_RESET
#define MAC_PCU_POWER_SAVE_0_DELIMITER_CRC_FAIL_ENABLE_MSB 		 RXPCU_POWER_SAVE_0_DELIMITER_CRC_FAIL_ENABLE_MSB
#define MAC_PCU_POWER_SAVE_0_DELIMITER_CRC_FAIL_ENABLE_LSB 		 RXPCU_POWER_SAVE_0_DELIMITER_CRC_FAIL_ENABLE_LSB
#define MAC_PCU_POWER_SAVE_0_DELIMITER_CRC_FAIL_ENABLE_MASK 		 RXPCU_POWER_SAVE_0_DELIMITER_CRC_FAIL_ENABLE_MASK
#define MAC_PCU_POWER_SAVE_0_DELIMITER_CRC_FAIL_ENABLE_GET(x) 		 RXPCU_POWER_SAVE_0_DELIMITER_CRC_FAIL_ENABLE_GET(x)
#define MAC_PCU_POWER_SAVE_0_DELIMITER_CRC_FAIL_ENABLE_SET(x) 		 RXPCU_POWER_SAVE_0_DELIMITER_CRC_FAIL_ENABLE_SET(x)
#define MAC_PCU_POWER_SAVE_0_DELIMITER_CRC_FAIL_ENABLE_RESET 		 RXPCU_POWER_SAVE_0_DELIMITER_CRC_FAIL_ENABLE_RESET
#define MAC_PCU_POWER_SAVE_0_MAC_ADDRESS_MISMATCH_ENABLE_MSB 		 RXPCU_POWER_SAVE_0_MAC_ADDRESS_MISMATCH_ENABLE_MSB
#define MAC_PCU_POWER_SAVE_0_MAC_ADDRESS_MISMATCH_ENABLE_LSB 		 RXPCU_POWER_SAVE_0_MAC_ADDRESS_MISMATCH_ENABLE_LSB
#define MAC_PCU_POWER_SAVE_0_MAC_ADDRESS_MISMATCH_ENABLE_MASK 		 RXPCU_POWER_SAVE_0_MAC_ADDRESS_MISMATCH_ENABLE_MASK
#define MAC_PCU_POWER_SAVE_0_MAC_ADDRESS_MISMATCH_ENABLE_GET(x) 		 RXPCU_POWER_SAVE_0_MAC_ADDRESS_MISMATCH_ENABLE_GET(x)
#define MAC_PCU_POWER_SAVE_0_MAC_ADDRESS_MISMATCH_ENABLE_SET(x) 		 RXPCU_POWER_SAVE_0_MAC_ADDRESS_MISMATCH_ENABLE_SET(x)
#define MAC_PCU_POWER_SAVE_0_MAC_ADDRESS_MISMATCH_ENABLE_RESET 		 RXPCU_POWER_SAVE_0_MAC_ADDRESS_MISMATCH_ENABLE_RESET
#define MAC_PCU_POWER_SAVE_0_RESERVED_0_MSB 		 RXPCU_POWER_SAVE_0_RESERVED_0_MSB
#define MAC_PCU_POWER_SAVE_0_RESERVED_0_LSB 		 RXPCU_POWER_SAVE_0_RESERVED_0_LSB
#define MAC_PCU_POWER_SAVE_0_RESERVED_0_MASK 		 RXPCU_POWER_SAVE_0_RESERVED_0_MASK
#define MAC_PCU_POWER_SAVE_0_RESERVED_0_GET(x) 		 RXPCU_POWER_SAVE_0_RESERVED_0_GET(x)
#define MAC_PCU_POWER_SAVE_0_RESERVED_0_SET(x) 		 RXPCU_POWER_SAVE_0_RESERVED_0_SET(x)
#define MAC_PCU_POWER_SAVE_0_RESERVED_0_RESET 		 RXPCU_POWER_SAVE_0_RESERVED_0_RESET
#define MAC_PCU_POWER_SAVE_0_EARLY_DTIM_CLEAR_ENABLE_MSB 		 RXPCU_POWER_SAVE_0_EARLY_DTIM_CLEAR_ENABLE_MSB
#define MAC_PCU_POWER_SAVE_0_EARLY_DTIM_CLEAR_ENABLE_LSB 		 RXPCU_POWER_SAVE_0_EARLY_DTIM_CLEAR_ENABLE_LSB
#define MAC_PCU_POWER_SAVE_0_EARLY_DTIM_CLEAR_ENABLE_MASK 		 RXPCU_POWER_SAVE_0_EARLY_DTIM_CLEAR_ENABLE_MASK
#define MAC_PCU_POWER_SAVE_0_EARLY_DTIM_CLEAR_ENABLE_GET(x) 		 RXPCU_POWER_SAVE_0_EARLY_DTIM_CLEAR_ENABLE_GET(x)
#define MAC_PCU_POWER_SAVE_0_EARLY_DTIM_CLEAR_ENABLE_SET(x) 		 RXPCU_POWER_SAVE_0_EARLY_DTIM_CLEAR_ENABLE_SET(x)
#define MAC_PCU_POWER_SAVE_0_EARLY_DTIM_CLEAR_ENABLE_RESET 		 RXPCU_POWER_SAVE_0_EARLY_DTIM_CLEAR_ENABLE_RESET
#define MAC_PCU_POWER_SAVE_0_EARLY_TIM_CLEAR_ENABLE_MSB 		 RXPCU_POWER_SAVE_0_EARLY_TIM_CLEAR_ENABLE_MSB
#define MAC_PCU_POWER_SAVE_0_EARLY_TIM_CLEAR_ENABLE_LSB 		 RXPCU_POWER_SAVE_0_EARLY_TIM_CLEAR_ENABLE_LSB
#define MAC_PCU_POWER_SAVE_0_EARLY_TIM_CLEAR_ENABLE_MASK 		 RXPCU_POWER_SAVE_0_EARLY_TIM_CLEAR_ENABLE_MASK
#define MAC_PCU_POWER_SAVE_0_EARLY_TIM_CLEAR_ENABLE_GET(x) 		 RXPCU_POWER_SAVE_0_EARLY_TIM_CLEAR_ENABLE_GET(x)
#define MAC_PCU_POWER_SAVE_0_EARLY_TIM_CLEAR_ENABLE_SET(x) 		 RXPCU_POWER_SAVE_0_EARLY_TIM_CLEAR_ENABLE_SET(x)
#define MAC_PCU_POWER_SAVE_0_EARLY_TIM_CLEAR_ENABLE_RESET 		 RXPCU_POWER_SAVE_0_EARLY_TIM_CLEAR_ENABLE_RESET
#define MAC_PCU_POWER_SAVE_0_EOF_PAD_DELIMITER_ENABLE_MSB 		 RXPCU_POWER_SAVE_0_EOF_PAD_DELIMITER_ENABLE_MSB
#define MAC_PCU_POWER_SAVE_0_EOF_PAD_DELIMITER_ENABLE_LSB 		 RXPCU_POWER_SAVE_0_EOF_PAD_DELIMITER_ENABLE_LSB
#define MAC_PCU_POWER_SAVE_0_EOF_PAD_DELIMITER_ENABLE_MASK 		 RXPCU_POWER_SAVE_0_EOF_PAD_DELIMITER_ENABLE_MASK
#define MAC_PCU_POWER_SAVE_0_EOF_PAD_DELIMITER_ENABLE_GET(x) 		 RXPCU_POWER_SAVE_0_EOF_PAD_DELIMITER_ENABLE_GET(x)
#define MAC_PCU_POWER_SAVE_0_EOF_PAD_DELIMITER_ENABLE_SET(x) 		 RXPCU_POWER_SAVE_0_EOF_PAD_DELIMITER_ENABLE_SET(x)
#define MAC_PCU_POWER_SAVE_0_EOF_PAD_DELIMITER_ENABLE_RESET 		 RXPCU_POWER_SAVE_0_EOF_PAD_DELIMITER_ENABLE_RESET
#define MAC_PCU_POWER_SAVE_0_GID_MATCH_ENABLE_MSB 		 RXPCU_POWER_SAVE_0_GID_MATCH_ENABLE_MSB
#define MAC_PCU_POWER_SAVE_0_GID_MATCH_ENABLE_LSB 		 RXPCU_POWER_SAVE_0_GID_MATCH_ENABLE_LSB
#define MAC_PCU_POWER_SAVE_0_GID_MATCH_ENABLE_MASK 		 RXPCU_POWER_SAVE_0_GID_MATCH_ENABLE_MASK
#define MAC_PCU_POWER_SAVE_0_GID_MATCH_ENABLE_GET(x) 		 RXPCU_POWER_SAVE_0_GID_MATCH_ENABLE_GET(x)
#define MAC_PCU_POWER_SAVE_0_GID_MATCH_ENABLE_SET(x) 		 RXPCU_POWER_SAVE_0_GID_MATCH_ENABLE_SET(x)
#define MAC_PCU_POWER_SAVE_0_GID_MATCH_ENABLE_RESET 		 RXPCU_POWER_SAVE_0_GID_MATCH_ENABLE_RESET
#define MAC_PCU_POWER_SAVE_0_PARTIAL_AID_MATCH_ENABLE_MSB 		 RXPCU_POWER_SAVE_0_PARTIAL_AID_MATCH_ENABLE_MSB
#define MAC_PCU_POWER_SAVE_0_PARTIAL_AID_MATCH_ENABLE_LSB 		 RXPCU_POWER_SAVE_0_PARTIAL_AID_MATCH_ENABLE_LSB
#define MAC_PCU_POWER_SAVE_0_PARTIAL_AID_MATCH_ENABLE_MASK 		 RXPCU_POWER_SAVE_0_PARTIAL_AID_MATCH_ENABLE_MASK
#define MAC_PCU_POWER_SAVE_0_PARTIAL_AID_MATCH_ENABLE_GET(x) 		 RXPCU_POWER_SAVE_0_PARTIAL_AID_MATCH_ENABLE_GET(x)
#define MAC_PCU_POWER_SAVE_0_PARTIAL_AID_MATCH_ENABLE_SET(x) 		 RXPCU_POWER_SAVE_0_PARTIAL_AID_MATCH_ENABLE_SET(x)
#define MAC_PCU_POWER_SAVE_0_PARTIAL_AID_MATCH_ENABLE_RESET 		 RXPCU_POWER_SAVE_0_PARTIAL_AID_MATCH_ENABLE_RESET
#define MAC_PCU_POWER_SAVE_0_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_POWER_SAVE_0_ADDRESS
// SW modifiable bits
#define MAC_PCU_POWER_SAVE_0_SW_MASK 		 RXPCU_POWER_SAVE_0_SW_MASK
// bits defined at reset
#define MAC_PCU_POWER_SAVE_0_RSTMASK 		 RXPCU_POWER_SAVE_0_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_POWER_SAVE_0_RESET 		 RXPCU_POWER_SAVE_0_RESET

// 32'h86c8 (MAC_PCU_POWER_SAVE_1)
#define MAC_PCU_POWER_SAVE_1_P_AID_2_MATCH_EN_MSB 		 RXPCU_POWER_SAVE_1_P_AID_2_MATCH_EN_MSB
#define MAC_PCU_POWER_SAVE_1_P_AID_2_MATCH_EN_LSB 		 RXPCU_POWER_SAVE_1_P_AID_2_MATCH_EN_LSB
#define MAC_PCU_POWER_SAVE_1_P_AID_2_MATCH_EN_MASK 		 RXPCU_POWER_SAVE_1_P_AID_2_MATCH_EN_MASK
#define MAC_PCU_POWER_SAVE_1_P_AID_2_MATCH_EN_GET(x) 		 RXPCU_POWER_SAVE_1_P_AID_2_MATCH_EN_GET(x)
#define MAC_PCU_POWER_SAVE_1_P_AID_2_MATCH_EN_SET(x) 		 RXPCU_POWER_SAVE_1_P_AID_2_MATCH_EN_SET(x)
#define MAC_PCU_POWER_SAVE_1_P_AID_2_MATCH_EN_RESET 		 RXPCU_POWER_SAVE_1_P_AID_2_MATCH_EN_RESET
#define MAC_PCU_POWER_SAVE_1_P_AID_2_MATCH_VALUE_MSB 		 RXPCU_POWER_SAVE_1_P_AID_2_MATCH_VALUE_MSB
#define MAC_PCU_POWER_SAVE_1_P_AID_2_MATCH_VALUE_LSB 		 RXPCU_POWER_SAVE_1_P_AID_2_MATCH_VALUE_LSB
#define MAC_PCU_POWER_SAVE_1_P_AID_2_MATCH_VALUE_MASK 		 RXPCU_POWER_SAVE_1_P_AID_2_MATCH_VALUE_MASK
#define MAC_PCU_POWER_SAVE_1_P_AID_2_MATCH_VALUE_GET(x) 		 RXPCU_POWER_SAVE_1_P_AID_2_MATCH_VALUE_GET(x)
#define MAC_PCU_POWER_SAVE_1_P_AID_2_MATCH_VALUE_SET(x) 		 RXPCU_POWER_SAVE_1_P_AID_2_MATCH_VALUE_SET(x)
#define MAC_PCU_POWER_SAVE_1_P_AID_2_MATCH_VALUE_RESET 		 RXPCU_POWER_SAVE_1_P_AID_2_MATCH_VALUE_RESET
#define MAC_PCU_POWER_SAVE_1_P_AID_1_MATCH_EN_MSB 		 RXPCU_POWER_SAVE_1_P_AID_1_MATCH_EN_MSB
#define MAC_PCU_POWER_SAVE_1_P_AID_1_MATCH_EN_LSB 		 RXPCU_POWER_SAVE_1_P_AID_1_MATCH_EN_LSB
#define MAC_PCU_POWER_SAVE_1_P_AID_1_MATCH_EN_MASK 		 RXPCU_POWER_SAVE_1_P_AID_1_MATCH_EN_MASK
#define MAC_PCU_POWER_SAVE_1_P_AID_1_MATCH_EN_GET(x) 		 RXPCU_POWER_SAVE_1_P_AID_1_MATCH_EN_GET(x)
#define MAC_PCU_POWER_SAVE_1_P_AID_1_MATCH_EN_SET(x) 		 RXPCU_POWER_SAVE_1_P_AID_1_MATCH_EN_SET(x)
#define MAC_PCU_POWER_SAVE_1_P_AID_1_MATCH_EN_RESET 		 RXPCU_POWER_SAVE_1_P_AID_1_MATCH_EN_RESET
#define MAC_PCU_POWER_SAVE_1_P_AID_1_MATCH_VALUE_MSB 		 RXPCU_POWER_SAVE_1_P_AID_1_MATCH_VALUE_MSB
#define MAC_PCU_POWER_SAVE_1_P_AID_1_MATCH_VALUE_LSB 		 RXPCU_POWER_SAVE_1_P_AID_1_MATCH_VALUE_LSB
#define MAC_PCU_POWER_SAVE_1_P_AID_1_MATCH_VALUE_MASK 		 RXPCU_POWER_SAVE_1_P_AID_1_MATCH_VALUE_MASK
#define MAC_PCU_POWER_SAVE_1_P_AID_1_MATCH_VALUE_GET(x) 		 RXPCU_POWER_SAVE_1_P_AID_1_MATCH_VALUE_GET(x)
#define MAC_PCU_POWER_SAVE_1_P_AID_1_MATCH_VALUE_SET(x) 		 RXPCU_POWER_SAVE_1_P_AID_1_MATCH_VALUE_SET(x)
#define MAC_PCU_POWER_SAVE_1_P_AID_1_MATCH_VALUE_RESET 		 RXPCU_POWER_SAVE_1_P_AID_1_MATCH_VALUE_RESET
#define MAC_PCU_POWER_SAVE_1_P_AID_0_MATCH_EN_MSB 		 RXPCU_POWER_SAVE_1_P_AID_0_MATCH_EN_MSB
#define MAC_PCU_POWER_SAVE_1_P_AID_0_MATCH_EN_LSB 		 RXPCU_POWER_SAVE_1_P_AID_0_MATCH_EN_LSB
#define MAC_PCU_POWER_SAVE_1_P_AID_0_MATCH_EN_MASK 		 RXPCU_POWER_SAVE_1_P_AID_0_MATCH_EN_MASK
#define MAC_PCU_POWER_SAVE_1_P_AID_0_MATCH_EN_GET(x) 		 RXPCU_POWER_SAVE_1_P_AID_0_MATCH_EN_GET(x)
#define MAC_PCU_POWER_SAVE_1_P_AID_0_MATCH_EN_SET(x) 		 RXPCU_POWER_SAVE_1_P_AID_0_MATCH_EN_SET(x)
#define MAC_PCU_POWER_SAVE_1_P_AID_0_MATCH_EN_RESET 		 RXPCU_POWER_SAVE_1_P_AID_0_MATCH_EN_RESET
#define MAC_PCU_POWER_SAVE_1_P_AID_0_MATCH_VALUE_MSB 		 RXPCU_POWER_SAVE_1_P_AID_0_MATCH_VALUE_MSB
#define MAC_PCU_POWER_SAVE_1_P_AID_0_MATCH_VALUE_LSB 		 RXPCU_POWER_SAVE_1_P_AID_0_MATCH_VALUE_LSB
#define MAC_PCU_POWER_SAVE_1_P_AID_0_MATCH_VALUE_MASK 		 RXPCU_POWER_SAVE_1_P_AID_0_MATCH_VALUE_MASK
#define MAC_PCU_POWER_SAVE_1_P_AID_0_MATCH_VALUE_GET(x) 		 RXPCU_POWER_SAVE_1_P_AID_0_MATCH_VALUE_GET(x)
#define MAC_PCU_POWER_SAVE_1_P_AID_0_MATCH_VALUE_SET(x) 		 RXPCU_POWER_SAVE_1_P_AID_0_MATCH_VALUE_SET(x)
#define MAC_PCU_POWER_SAVE_1_P_AID_0_MATCH_VALUE_RESET 		 RXPCU_POWER_SAVE_1_P_AID_0_MATCH_VALUE_RESET
#define MAC_PCU_POWER_SAVE_1_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_POWER_SAVE_1_ADDRESS
// SW modifiable bits
#define MAC_PCU_POWER_SAVE_1_SW_MASK 		 RXPCU_POWER_SAVE_1_SW_MASK
// bits defined at reset
#define MAC_PCU_POWER_SAVE_1_RSTMASK 		 RXPCU_POWER_SAVE_1_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_POWER_SAVE_1_RESET 		 RXPCU_POWER_SAVE_1_RESET

// 32'h86cc (MAC_PCU_POWER_SAVE_2)
#define MAC_PCU_POWER_SAVE_2_P_AID_5_MATCH_EN_MSB 		 RXPCU_POWER_SAVE_2_P_AID_5_MATCH_EN_MSB
#define MAC_PCU_POWER_SAVE_2_P_AID_5_MATCH_EN_LSB 		 RXPCU_POWER_SAVE_2_P_AID_5_MATCH_EN_LSB
#define MAC_PCU_POWER_SAVE_2_P_AID_5_MATCH_EN_MASK 		 RXPCU_POWER_SAVE_2_P_AID_5_MATCH_EN_MASK
#define MAC_PCU_POWER_SAVE_2_P_AID_5_MATCH_EN_GET(x) 		 RXPCU_POWER_SAVE_2_P_AID_5_MATCH_EN_GET(x)
#define MAC_PCU_POWER_SAVE_2_P_AID_5_MATCH_EN_SET(x) 		 RXPCU_POWER_SAVE_2_P_AID_5_MATCH_EN_SET(x)
#define MAC_PCU_POWER_SAVE_2_P_AID_5_MATCH_EN_RESET 		 RXPCU_POWER_SAVE_2_P_AID_5_MATCH_EN_RESET
#define MAC_PCU_POWER_SAVE_2_P_AID_5_MATCH_VALUE_MSB 		 RXPCU_POWER_SAVE_2_P_AID_5_MATCH_VALUE_MSB
#define MAC_PCU_POWER_SAVE_2_P_AID_5_MATCH_VALUE_LSB 		 RXPCU_POWER_SAVE_2_P_AID_5_MATCH_VALUE_LSB
#define MAC_PCU_POWER_SAVE_2_P_AID_5_MATCH_VALUE_MASK 		 RXPCU_POWER_SAVE_2_P_AID_5_MATCH_VALUE_MASK
#define MAC_PCU_POWER_SAVE_2_P_AID_5_MATCH_VALUE_GET(x) 		 RXPCU_POWER_SAVE_2_P_AID_5_MATCH_VALUE_GET(x)
#define MAC_PCU_POWER_SAVE_2_P_AID_5_MATCH_VALUE_SET(x) 		 RXPCU_POWER_SAVE_2_P_AID_5_MATCH_VALUE_SET(x)
#define MAC_PCU_POWER_SAVE_2_P_AID_5_MATCH_VALUE_RESET 		 RXPCU_POWER_SAVE_2_P_AID_5_MATCH_VALUE_RESET
#define MAC_PCU_POWER_SAVE_2_P_AID_4_MATCH_EN_MSB 		 RXPCU_POWER_SAVE_2_P_AID_4_MATCH_EN_MSB
#define MAC_PCU_POWER_SAVE_2_P_AID_4_MATCH_EN_LSB 		 RXPCU_POWER_SAVE_2_P_AID_4_MATCH_EN_LSB
#define MAC_PCU_POWER_SAVE_2_P_AID_4_MATCH_EN_MASK 		 RXPCU_POWER_SAVE_2_P_AID_4_MATCH_EN_MASK
#define MAC_PCU_POWER_SAVE_2_P_AID_4_MATCH_EN_GET(x) 		 RXPCU_POWER_SAVE_2_P_AID_4_MATCH_EN_GET(x)
#define MAC_PCU_POWER_SAVE_2_P_AID_4_MATCH_EN_SET(x) 		 RXPCU_POWER_SAVE_2_P_AID_4_MATCH_EN_SET(x)
#define MAC_PCU_POWER_SAVE_2_P_AID_4_MATCH_EN_RESET 		 RXPCU_POWER_SAVE_2_P_AID_4_MATCH_EN_RESET
#define MAC_PCU_POWER_SAVE_2_P_AID_4_MATCH_VALUE_MSB 		 RXPCU_POWER_SAVE_2_P_AID_4_MATCH_VALUE_MSB
#define MAC_PCU_POWER_SAVE_2_P_AID_4_MATCH_VALUE_LSB 		 RXPCU_POWER_SAVE_2_P_AID_4_MATCH_VALUE_LSB
#define MAC_PCU_POWER_SAVE_2_P_AID_4_MATCH_VALUE_MASK 		 RXPCU_POWER_SAVE_2_P_AID_4_MATCH_VALUE_MASK
#define MAC_PCU_POWER_SAVE_2_P_AID_4_MATCH_VALUE_GET(x) 		 RXPCU_POWER_SAVE_2_P_AID_4_MATCH_VALUE_GET(x)
#define MAC_PCU_POWER_SAVE_2_P_AID_4_MATCH_VALUE_SET(x) 		 RXPCU_POWER_SAVE_2_P_AID_4_MATCH_VALUE_SET(x)
#define MAC_PCU_POWER_SAVE_2_P_AID_4_MATCH_VALUE_RESET 		 RXPCU_POWER_SAVE_2_P_AID_4_MATCH_VALUE_RESET
#define MAC_PCU_POWER_SAVE_2_P_AID_3_MATCH_EN_MSB 		 RXPCU_POWER_SAVE_2_P_AID_3_MATCH_EN_MSB
#define MAC_PCU_POWER_SAVE_2_P_AID_3_MATCH_EN_LSB 		 RXPCU_POWER_SAVE_2_P_AID_3_MATCH_EN_LSB
#define MAC_PCU_POWER_SAVE_2_P_AID_3_MATCH_EN_MASK 		 RXPCU_POWER_SAVE_2_P_AID_3_MATCH_EN_MASK
#define MAC_PCU_POWER_SAVE_2_P_AID_3_MATCH_EN_GET(x) 		 RXPCU_POWER_SAVE_2_P_AID_3_MATCH_EN_GET(x)
#define MAC_PCU_POWER_SAVE_2_P_AID_3_MATCH_EN_SET(x) 		 RXPCU_POWER_SAVE_2_P_AID_3_MATCH_EN_SET(x)
#define MAC_PCU_POWER_SAVE_2_P_AID_3_MATCH_EN_RESET 		 RXPCU_POWER_SAVE_2_P_AID_3_MATCH_EN_RESET
#define MAC_PCU_POWER_SAVE_2_P_AID_3_MATCH_VALUE_MSB 		 RXPCU_POWER_SAVE_2_P_AID_3_MATCH_VALUE_MSB
#define MAC_PCU_POWER_SAVE_2_P_AID_3_MATCH_VALUE_LSB 		 RXPCU_POWER_SAVE_2_P_AID_3_MATCH_VALUE_LSB
#define MAC_PCU_POWER_SAVE_2_P_AID_3_MATCH_VALUE_MASK 		 RXPCU_POWER_SAVE_2_P_AID_3_MATCH_VALUE_MASK
#define MAC_PCU_POWER_SAVE_2_P_AID_3_MATCH_VALUE_GET(x) 		 RXPCU_POWER_SAVE_2_P_AID_3_MATCH_VALUE_GET(x)
#define MAC_PCU_POWER_SAVE_2_P_AID_3_MATCH_VALUE_SET(x) 		 RXPCU_POWER_SAVE_2_P_AID_3_MATCH_VALUE_SET(x)
#define MAC_PCU_POWER_SAVE_2_P_AID_3_MATCH_VALUE_RESET 		 RXPCU_POWER_SAVE_2_P_AID_3_MATCH_VALUE_RESET
#define MAC_PCU_POWER_SAVE_2_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_POWER_SAVE_2_ADDRESS
// SW modifiable bits
#define MAC_PCU_POWER_SAVE_2_SW_MASK 		 RXPCU_POWER_SAVE_2_SW_MASK
// bits defined at reset
#define MAC_PCU_POWER_SAVE_2_RSTMASK 		 RXPCU_POWER_SAVE_2_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_POWER_SAVE_2_RESET 		 RXPCU_POWER_SAVE_2_RESET

// 32'h86d0 (MAC_PCU_POWER_SAVE_3)
#define MAC_PCU_POWER_SAVE_3_GID_LSB_BITMAP_VALUE_MSB 		 RXPCU_POWER_SAVE_3_GID_LSB_BITMAP_VALUE_MSB
#define MAC_PCU_POWER_SAVE_3_GID_LSB_BITMAP_VALUE_LSB 		 RXPCU_POWER_SAVE_3_GID_LSB_BITMAP_VALUE_LSB
#define MAC_PCU_POWER_SAVE_3_GID_LSB_BITMAP_VALUE_MASK 		 RXPCU_POWER_SAVE_3_GID_LSB_BITMAP_VALUE_MASK
#define MAC_PCU_POWER_SAVE_3_GID_LSB_BITMAP_VALUE_GET(x) 		 RXPCU_POWER_SAVE_3_GID_LSB_BITMAP_VALUE_GET(x)
#define MAC_PCU_POWER_SAVE_3_GID_LSB_BITMAP_VALUE_SET(x) 		 RXPCU_POWER_SAVE_3_GID_LSB_BITMAP_VALUE_SET(x)
#define MAC_PCU_POWER_SAVE_3_GID_LSB_BITMAP_VALUE_RESET 		 RXPCU_POWER_SAVE_3_GID_LSB_BITMAP_VALUE_RESET
#define MAC_PCU_POWER_SAVE_3_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_POWER_SAVE_3_ADDRESS
// SW modifiable bits
#define MAC_PCU_POWER_SAVE_3_SW_MASK 		 RXPCU_POWER_SAVE_3_SW_MASK
// bits defined at reset
#define MAC_PCU_POWER_SAVE_3_RSTMASK 		 RXPCU_POWER_SAVE_3_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_POWER_SAVE_3_RESET 		 RXPCU_POWER_SAVE_3_RESET

// 32'h86d4 (MAC_PCU_POWER_SAVE_4)
#define MAC_PCU_POWER_SAVE_4_GID_MSB_BITMAP_VALUE_MSB 		 RXPCU_POWER_SAVE_4_GID_MSB_BITMAP_VALUE_MSB
#define MAC_PCU_POWER_SAVE_4_GID_MSB_BITMAP_VALUE_LSB 		 RXPCU_POWER_SAVE_4_GID_MSB_BITMAP_VALUE_LSB
#define MAC_PCU_POWER_SAVE_4_GID_MSB_BITMAP_VALUE_MASK 		 RXPCU_POWER_SAVE_4_GID_MSB_BITMAP_VALUE_MASK
#define MAC_PCU_POWER_SAVE_4_GID_MSB_BITMAP_VALUE_GET(x) 		 RXPCU_POWER_SAVE_4_GID_MSB_BITMAP_VALUE_GET(x)
#define MAC_PCU_POWER_SAVE_4_GID_MSB_BITMAP_VALUE_SET(x) 		 RXPCU_POWER_SAVE_4_GID_MSB_BITMAP_VALUE_SET(x)
#define MAC_PCU_POWER_SAVE_4_GID_MSB_BITMAP_VALUE_RESET 		 RXPCU_POWER_SAVE_4_GID_MSB_BITMAP_VALUE_RESET
#define MAC_PCU_POWER_SAVE_4_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_POWER_SAVE_4_ADDRESS
// SW modifiable bits
#define MAC_PCU_POWER_SAVE_4_SW_MASK 		 RXPCU_POWER_SAVE_4_SW_MASK
// bits defined at reset
#define MAC_PCU_POWER_SAVE_4_RSTMASK 		 RXPCU_POWER_SAVE_4_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_POWER_SAVE_4_RESET 		 RXPCU_POWER_SAVE_4_RESET

// 32'h86d8 (MAC_PCU_POWER_SAVE_5)
#define MAC_PCU_POWER_SAVE_5_GID_USER_NUMBER_REGISTER_0_MSB 		 RXPCU_POWER_SAVE_5_GID_USER_NUMBER_REGISTER_0_MSB
#define MAC_PCU_POWER_SAVE_5_GID_USER_NUMBER_REGISTER_0_LSB 		 RXPCU_POWER_SAVE_5_GID_USER_NUMBER_REGISTER_0_LSB
#define MAC_PCU_POWER_SAVE_5_GID_USER_NUMBER_REGISTER_0_MASK 		 RXPCU_POWER_SAVE_5_GID_USER_NUMBER_REGISTER_0_MASK
#define MAC_PCU_POWER_SAVE_5_GID_USER_NUMBER_REGISTER_0_GET(x) 		 RXPCU_POWER_SAVE_5_GID_USER_NUMBER_REGISTER_0_GET(x)
#define MAC_PCU_POWER_SAVE_5_GID_USER_NUMBER_REGISTER_0_SET(x) 		 RXPCU_POWER_SAVE_5_GID_USER_NUMBER_REGISTER_0_SET(x)
#define MAC_PCU_POWER_SAVE_5_GID_USER_NUMBER_REGISTER_0_RESET 		 RXPCU_POWER_SAVE_5_GID_USER_NUMBER_REGISTER_0_RESET
#define MAC_PCU_POWER_SAVE_5_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_POWER_SAVE_5_ADDRESS
// SW modifiable bits
#define MAC_PCU_POWER_SAVE_5_SW_MASK 		 RXPCU_POWER_SAVE_5_SW_MASK
// bits defined at reset
#define MAC_PCU_POWER_SAVE_5_RSTMASK 		 RXPCU_POWER_SAVE_5_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_POWER_SAVE_5_RESET 		 RXPCU_POWER_SAVE_5_RESET

// 32'h86dc (MAC_PCU_POWER_SAVE_6)
#define MAC_PCU_POWER_SAVE_6_GID_USER_NUMBER_REGISTER_1_MSB 		 RXPCU_POWER_SAVE_6_GID_USER_NUMBER_REGISTER_1_MSB
#define MAC_PCU_POWER_SAVE_6_GID_USER_NUMBER_REGISTER_1_LSB 		 RXPCU_POWER_SAVE_6_GID_USER_NUMBER_REGISTER_1_LSB
#define MAC_PCU_POWER_SAVE_6_GID_USER_NUMBER_REGISTER_1_MASK 		 RXPCU_POWER_SAVE_6_GID_USER_NUMBER_REGISTER_1_MASK
#define MAC_PCU_POWER_SAVE_6_GID_USER_NUMBER_REGISTER_1_GET(x) 		 RXPCU_POWER_SAVE_6_GID_USER_NUMBER_REGISTER_1_GET(x)
#define MAC_PCU_POWER_SAVE_6_GID_USER_NUMBER_REGISTER_1_SET(x) 		 RXPCU_POWER_SAVE_6_GID_USER_NUMBER_REGISTER_1_SET(x)
#define MAC_PCU_POWER_SAVE_6_GID_USER_NUMBER_REGISTER_1_RESET 		 RXPCU_POWER_SAVE_6_GID_USER_NUMBER_REGISTER_1_RESET
#define MAC_PCU_POWER_SAVE_6_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_POWER_SAVE_6_ADDRESS
// SW modifiable bits
#define MAC_PCU_POWER_SAVE_6_SW_MASK 		 RXPCU_POWER_SAVE_6_SW_MASK
// bits defined at reset
#define MAC_PCU_POWER_SAVE_6_RSTMASK 		 RXPCU_POWER_SAVE_6_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_POWER_SAVE_6_RESET 		 RXPCU_POWER_SAVE_6_RESET

// 32'h86e0 (MAC_PCU_POWER_SAVE_7)
#define MAC_PCU_POWER_SAVE_7_GID_USER_NUMBER_REGISTER_2_MSB 		 RXPCU_POWER_SAVE_7_GID_USER_NUMBER_REGISTER_2_MSB
#define MAC_PCU_POWER_SAVE_7_GID_USER_NUMBER_REGISTER_2_LSB 		 RXPCU_POWER_SAVE_7_GID_USER_NUMBER_REGISTER_2_LSB
#define MAC_PCU_POWER_SAVE_7_GID_USER_NUMBER_REGISTER_2_MASK 		 RXPCU_POWER_SAVE_7_GID_USER_NUMBER_REGISTER_2_MASK
#define MAC_PCU_POWER_SAVE_7_GID_USER_NUMBER_REGISTER_2_GET(x) 		 RXPCU_POWER_SAVE_7_GID_USER_NUMBER_REGISTER_2_GET(x)
#define MAC_PCU_POWER_SAVE_7_GID_USER_NUMBER_REGISTER_2_SET(x) 		 RXPCU_POWER_SAVE_7_GID_USER_NUMBER_REGISTER_2_SET(x)
#define MAC_PCU_POWER_SAVE_7_GID_USER_NUMBER_REGISTER_2_RESET 		 RXPCU_POWER_SAVE_7_GID_USER_NUMBER_REGISTER_2_RESET
#define MAC_PCU_POWER_SAVE_7_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_POWER_SAVE_7_ADDRESS
// SW modifiable bits
#define MAC_PCU_POWER_SAVE_7_SW_MASK 		 RXPCU_POWER_SAVE_7_SW_MASK
// bits defined at reset
#define MAC_PCU_POWER_SAVE_7_RSTMASK 		 RXPCU_POWER_SAVE_7_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_POWER_SAVE_7_RESET 		 RXPCU_POWER_SAVE_7_RESET

// 32'h86e4 (MAC_PCU_POWER_SAVE_8)
#define MAC_PCU_POWER_SAVE_8_GID_USER_NUMBER_REGISTER_3_MSB 		 RXPCU_POWER_SAVE_8_GID_USER_NUMBER_REGISTER_3_MSB
#define MAC_PCU_POWER_SAVE_8_GID_USER_NUMBER_REGISTER_3_LSB 		 RXPCU_POWER_SAVE_8_GID_USER_NUMBER_REGISTER_3_LSB
#define MAC_PCU_POWER_SAVE_8_GID_USER_NUMBER_REGISTER_3_MASK 		 RXPCU_POWER_SAVE_8_GID_USER_NUMBER_REGISTER_3_MASK
#define MAC_PCU_POWER_SAVE_8_GID_USER_NUMBER_REGISTER_3_GET(x) 		 RXPCU_POWER_SAVE_8_GID_USER_NUMBER_REGISTER_3_GET(x)
#define MAC_PCU_POWER_SAVE_8_GID_USER_NUMBER_REGISTER_3_SET(x) 		 RXPCU_POWER_SAVE_8_GID_USER_NUMBER_REGISTER_3_SET(x)
#define MAC_PCU_POWER_SAVE_8_GID_USER_NUMBER_REGISTER_3_RESET 		 RXPCU_POWER_SAVE_8_GID_USER_NUMBER_REGISTER_3_RESET
#define MAC_PCU_POWER_SAVE_8_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_POWER_SAVE_8_ADDRESS
// SW modifiable bits
#define MAC_PCU_POWER_SAVE_8_SW_MASK 		 RXPCU_POWER_SAVE_8_SW_MASK
// bits defined at reset
#define MAC_PCU_POWER_SAVE_8_RSTMASK 		 RXPCU_POWER_SAVE_8_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_POWER_SAVE_8_RESET 		 RXPCU_POWER_SAVE_8_RESET

// 32'h86e8 (MAC_PCU_NDP_TIMEOUT)
#define MAC_PCU_NDP_TIMEOUT_VALUE_MSB 		 RXPCU_NDP_TIMEOUT_VALUE_MSB
#define MAC_PCU_NDP_TIMEOUT_VALUE_LSB 		 RXPCU_NDP_TIMEOUT_VALUE_LSB
#define MAC_PCU_NDP_TIMEOUT_VALUE_MASK 		 RXPCU_NDP_TIMEOUT_VALUE_MASK
#define MAC_PCU_NDP_TIMEOUT_VALUE_GET(x) 		 RXPCU_NDP_TIMEOUT_VALUE_GET(x)
#define MAC_PCU_NDP_TIMEOUT_VALUE_SET(x) 		 RXPCU_NDP_TIMEOUT_VALUE_SET(x)
#define MAC_PCU_NDP_TIMEOUT_VALUE_RESET 		 RXPCU_NDP_TIMEOUT_VALUE_RESET
#define MAC_PCU_NDP_TIMEOUT_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_NDP_TIMEOUT_ADDRESS
// SW modifiable bits
#define MAC_PCU_NDP_TIMEOUT_SW_MASK 		 RXPCU_NDP_TIMEOUT_SW_MASK
// bits defined at reset
#define MAC_PCU_NDP_TIMEOUT_RSTMASK 		 RXPCU_NDP_TIMEOUT_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_NDP_TIMEOUT_RESET 		 RXPCU_NDP_TIMEOUT_RESET

// 32'h86ec (MAC_PCU_DIAGNOSTIC_MODE)
#define MAC_PCU_DIAGNOSTIC_MODE_H_CV_MSB 		 RXPCU_DIAGNOSTIC_MODE_H_CV_MSB
#define MAC_PCU_DIAGNOSTIC_MODE_H_CV_LSB 		 RXPCU_DIAGNOSTIC_MODE_H_CV_LSB
#define MAC_PCU_DIAGNOSTIC_MODE_H_CV_MASK 		 RXPCU_DIAGNOSTIC_MODE_H_CV_MASK
#define MAC_PCU_DIAGNOSTIC_MODE_H_CV_GET(x) 		 RXPCU_DIAGNOSTIC_MODE_H_CV_GET(x)
#define MAC_PCU_DIAGNOSTIC_MODE_H_CV_SET(x) 		 RXPCU_DIAGNOSTIC_MODE_H_CV_SET(x)
#define MAC_PCU_DIAGNOSTIC_MODE_H_CV_RESET 		 RXPCU_DIAGNOSTIC_MODE_H_CV_RESET
#define MAC_PCU_DIAGNOSTIC_MODE_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_DIAGNOSTIC_MODE_ADDRESS
// SW modifiable bits
#define MAC_PCU_DIAGNOSTIC_MODE_SW_MASK 		 RXPCU_DIAGNOSTIC_MODE_SW_MASK
// bits defined at reset
#define MAC_PCU_DIAGNOSTIC_MODE_RSTMASK 		 RXPCU_DIAGNOSTIC_MODE_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_DIAGNOSTIC_MODE_RESET 		 RXPCU_DIAGNOSTIC_MODE_RESET

// 32'h86f0 (MAC_PCU_TXBF_CNTL)
#define MAC_PCU_TXBF_CNTL_MU_NC_MISMATCH_CLEAR_MSB 		 RXPCU_TXBF_CNTL_MU_NC_MISMATCH_CLEAR_MSB
#define MAC_PCU_TXBF_CNTL_MU_NC_MISMATCH_CLEAR_LSB 		 RXPCU_TXBF_CNTL_MU_NC_MISMATCH_CLEAR_LSB
#define MAC_PCU_TXBF_CNTL_MU_NC_MISMATCH_CLEAR_MASK 		 RXPCU_TXBF_CNTL_MU_NC_MISMATCH_CLEAR_MASK
#define MAC_PCU_TXBF_CNTL_MU_NC_MISMATCH_CLEAR_GET(x) 		 RXPCU_TXBF_CNTL_MU_NC_MISMATCH_CLEAR_GET(x)
#define MAC_PCU_TXBF_CNTL_MU_NC_MISMATCH_CLEAR_SET(x) 		 RXPCU_TXBF_CNTL_MU_NC_MISMATCH_CLEAR_SET(x)
#define MAC_PCU_TXBF_CNTL_MU_NC_MISMATCH_CLEAR_RESET 		 RXPCU_TXBF_CNTL_MU_NC_MISMATCH_CLEAR_RESET
#define MAC_PCU_TXBF_CNTL_CLEAR_CV_DATA_VALID_MSB 		 RXPCU_TXBF_CNTL_CLEAR_CV_DATA_VALID_MSB
#define MAC_PCU_TXBF_CNTL_CLEAR_CV_DATA_VALID_LSB 		 RXPCU_TXBF_CNTL_CLEAR_CV_DATA_VALID_LSB
#define MAC_PCU_TXBF_CNTL_CLEAR_CV_DATA_VALID_MASK 		 RXPCU_TXBF_CNTL_CLEAR_CV_DATA_VALID_MASK
#define MAC_PCU_TXBF_CNTL_CLEAR_CV_DATA_VALID_GET(x) 		 RXPCU_TXBF_CNTL_CLEAR_CV_DATA_VALID_GET(x)
#define MAC_PCU_TXBF_CNTL_CLEAR_CV_DATA_VALID_SET(x) 		 RXPCU_TXBF_CNTL_CLEAR_CV_DATA_VALID_SET(x)
#define MAC_PCU_TXBF_CNTL_CLEAR_CV_DATA_VALID_RESET 		 RXPCU_TXBF_CNTL_CLEAR_CV_DATA_VALID_RESET
#define MAC_PCU_TXBF_CNTL_IGNORE_CV_DATA_VALID_MSB 		 RXPCU_TXBF_CNTL_IGNORE_CV_DATA_VALID_MSB
#define MAC_PCU_TXBF_CNTL_IGNORE_CV_DATA_VALID_LSB 		 RXPCU_TXBF_CNTL_IGNORE_CV_DATA_VALID_LSB
#define MAC_PCU_TXBF_CNTL_IGNORE_CV_DATA_VALID_MASK 		 RXPCU_TXBF_CNTL_IGNORE_CV_DATA_VALID_MASK
#define MAC_PCU_TXBF_CNTL_IGNORE_CV_DATA_VALID_GET(x) 		 RXPCU_TXBF_CNTL_IGNORE_CV_DATA_VALID_GET(x)
#define MAC_PCU_TXBF_CNTL_IGNORE_CV_DATA_VALID_SET(x) 		 RXPCU_TXBF_CNTL_IGNORE_CV_DATA_VALID_SET(x)
#define MAC_PCU_TXBF_CNTL_IGNORE_CV_DATA_VALID_RESET 		 RXPCU_TXBF_CNTL_IGNORE_CV_DATA_VALID_RESET
#define MAC_PCU_TXBF_CNTL_RESERVED_MSB 		 RXPCU_TXBF_CNTL_RESERVED_MSB
#define MAC_PCU_TXBF_CNTL_RESERVED_LSB 		 RXPCU_TXBF_CNTL_RESERVED_LSB
#define MAC_PCU_TXBF_CNTL_RESERVED_MASK 		 RXPCU_TXBF_CNTL_RESERVED_MASK
#define MAC_PCU_TXBF_CNTL_RESERVED_GET(x) 		 RXPCU_TXBF_CNTL_RESERVED_GET(x)
#define MAC_PCU_TXBF_CNTL_RESERVED_SET(x) 		 RXPCU_TXBF_CNTL_RESERVED_SET(x)
#define MAC_PCU_TXBF_CNTL_RESERVED_RESET 		 RXPCU_TXBF_CNTL_RESERVED_RESET
#define MAC_PCU_TXBF_CNTL_CLEAR_NDP_TIMER_EN_MSB 		 RXPCU_TXBF_CNTL_CLEAR_NDP_TIMER_EN_MSB
#define MAC_PCU_TXBF_CNTL_CLEAR_NDP_TIMER_EN_LSB 		 RXPCU_TXBF_CNTL_CLEAR_NDP_TIMER_EN_LSB
#define MAC_PCU_TXBF_CNTL_CLEAR_NDP_TIMER_EN_MASK 		 RXPCU_TXBF_CNTL_CLEAR_NDP_TIMER_EN_MASK
#define MAC_PCU_TXBF_CNTL_CLEAR_NDP_TIMER_EN_GET(x) 		 RXPCU_TXBF_CNTL_CLEAR_NDP_TIMER_EN_GET(x)
#define MAC_PCU_TXBF_CNTL_CLEAR_NDP_TIMER_EN_SET(x) 		 RXPCU_TXBF_CNTL_CLEAR_NDP_TIMER_EN_SET(x)
#define MAC_PCU_TXBF_CNTL_CLEAR_NDP_TIMER_EN_RESET 		 RXPCU_TXBF_CNTL_CLEAR_NDP_TIMER_EN_RESET
#define MAC_PCU_TXBF_CNTL_CLEAR_CV_FRAME_MSB 		 RXPCU_TXBF_CNTL_CLEAR_CV_FRAME_MSB
#define MAC_PCU_TXBF_CNTL_CLEAR_CV_FRAME_LSB 		 RXPCU_TXBF_CNTL_CLEAR_CV_FRAME_LSB
#define MAC_PCU_TXBF_CNTL_CLEAR_CV_FRAME_MASK 		 RXPCU_TXBF_CNTL_CLEAR_CV_FRAME_MASK
#define MAC_PCU_TXBF_CNTL_CLEAR_CV_FRAME_GET(x) 		 RXPCU_TXBF_CNTL_CLEAR_CV_FRAME_GET(x)
#define MAC_PCU_TXBF_CNTL_CLEAR_CV_FRAME_SET(x) 		 RXPCU_TXBF_CNTL_CLEAR_CV_FRAME_SET(x)
#define MAC_PCU_TXBF_CNTL_CLEAR_CV_FRAME_RESET 		 RXPCU_TXBF_CNTL_CLEAR_CV_FRAME_RESET
#define MAC_PCU_TXBF_CNTL_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_TXBF_CNTL_ADDRESS
// SW modifiable bits
#define MAC_PCU_TXBF_CNTL_SW_MASK 		 RXPCU_TXBF_CNTL_SW_MASK
// bits defined at reset
#define MAC_PCU_TXBF_CNTL_RSTMASK 		 RXPCU_TXBF_CNTL_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_TXBF_CNTL_RESET 		 RXPCU_TXBF_CNTL_RESET

// 32'h86f8 (MAC_PCU_DPD_TRAINING_SELF_CTS_BW)
#define MAC_PCU_DPD_TRAINING_SELF_CTS_BW_REG_MSB 		 TXPCU_DPD_TRAINING_SELF_CTS_BW_REG_MSB
#define MAC_PCU_DPD_TRAINING_SELF_CTS_BW_REG_LSB 		 TXPCU_DPD_TRAINING_SELF_CTS_BW_REG_LSB
#define MAC_PCU_DPD_TRAINING_SELF_CTS_BW_REG_MASK 		 TXPCU_DPD_TRAINING_SELF_CTS_BW_REG_MASK
#define MAC_PCU_DPD_TRAINING_SELF_CTS_BW_REG_GET(x) 		 TXPCU_DPD_TRAINING_SELF_CTS_BW_REG_GET(x)
#define MAC_PCU_DPD_TRAINING_SELF_CTS_BW_REG_SET(x) 		 TXPCU_DPD_TRAINING_SELF_CTS_BW_REG_SET(x)
#define MAC_PCU_DPD_TRAINING_SELF_CTS_BW_REG_RESET 		 TXPCU_DPD_TRAINING_SELF_CTS_BW_REG_RESET
#define MAC_PCU_DPD_TRAINING_SELF_CTS_BW_ADDRESS 		 MAC_TXPCU_BASE_ADDRESS+TXPCU_DPD_TRAINING_SELF_CTS_BW_ADDRESS
// SW modifiable bits
#define MAC_PCU_DPD_TRAINING_SELF_CTS_BW_SW_MASK 		 TXPCU_DPD_TRAINING_SELF_CTS_BW_SW_MASK
// bits defined at reset
#define MAC_PCU_DPD_TRAINING_SELF_CTS_BW_RSTMASK 		 TXPCU_DPD_TRAINING_SELF_CTS_BW_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_DPD_TRAINING_SELF_CTS_BW_RESET 		 TXPCU_DPD_TRAINING_SELF_CTS_BW_RESET

// 32'h86fc (MAC_PCU_PAID_GID_MISMATCH)
#define MAC_PCU_PAID_GID_MISMATCH_EIFS_EN_MSB 		 RXPCU_PAID_GID_MISMATCH_EIFS_EN_MSB
#define MAC_PCU_PAID_GID_MISMATCH_EIFS_EN_LSB 		 RXPCU_PAID_GID_MISMATCH_EIFS_EN_LSB
#define MAC_PCU_PAID_GID_MISMATCH_EIFS_EN_MASK 		 RXPCU_PAID_GID_MISMATCH_EIFS_EN_MASK
#define MAC_PCU_PAID_GID_MISMATCH_EIFS_EN_GET(x) 		 RXPCU_PAID_GID_MISMATCH_EIFS_EN_GET(x)
#define MAC_PCU_PAID_GID_MISMATCH_EIFS_EN_SET(x) 		 RXPCU_PAID_GID_MISMATCH_EIFS_EN_SET(x)
#define MAC_PCU_PAID_GID_MISMATCH_EIFS_EN_RESET 		 RXPCU_PAID_GID_MISMATCH_EIFS_EN_RESET
#define MAC_PCU_PAID_GID_MISMATCH_ADDRESS 		 MAC_RXPCU_BASE_ADDRESS+RXPCU_PAID_GID_MISMATCH_ADDRESS
// SW modifiable bits
#define MAC_PCU_PAID_GID_MISMATCH_SW_MASK 		 RXPCU_PAID_GID_MISMATCH_SW_MASK
// bits defined at reset
#define MAC_PCU_PAID_GID_MISMATCH_RSTMASK 		 RXPCU_PAID_GID_MISMATCH_RSTMASK
// reset value (ignore bits undefined at reset)
#define MAC_PCU_PAID_GID_MISMATCH_RESET 		 RXPCU_PAID_GID_MISMATCH_RESET


#endif /* _MAC_PCU_REG_H_ */
