// Copyright (c) 2013 Qualcomm Atheros, Inc.  All rights reserved.
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT!  This file is automatically generated
//               These definitions are tied to a particular hardware layout


#ifndef _TX_FREEZE_CAPTURE_CHANNEL_H_
#define _TX_FREEZE_CAPTURE_CHANNEL_H_
#if !defined(__ASSEMBLER__)
#endif

// ################ START SUMMARY #################
//
//	Dword	Fields
//	0	freeze[0], reserved[31:1]
//
// ################ END SUMMARY #################

#define NUM_OF_DWORDS_TX_FREEZE_CAPTURE_CHANNEL 1

struct tx_freeze_capture_channel {
    volatile uint32_t freeze                          :  1, //[0]
                      reserved                        : 31; //[31:1]
};

/*

freeze
			
			0: Allow channel capture
			
			1: Freeze channel capture

reserved
			
			Reserved field. HW fills zero. 
*/


/* Description		TX_FREEZE_CAPTURE_CHANNEL_0_FREEZE
			
			0: Allow channel capture
			
			1: Freeze channel capture
*/
#define TX_FREEZE_CAPTURE_CHANNEL_0_FREEZE_OFFSET                    0x00000000
#define TX_FREEZE_CAPTURE_CHANNEL_0_FREEZE_LSB                       0
#define TX_FREEZE_CAPTURE_CHANNEL_0_FREEZE_MASK                      0x00000001

/* Description		TX_FREEZE_CAPTURE_CHANNEL_0_RESERVED
			
			Reserved field. HW fills zero. 
*/
#define TX_FREEZE_CAPTURE_CHANNEL_0_RESERVED_OFFSET                  0x00000000
#define TX_FREEZE_CAPTURE_CHANNEL_0_RESERVED_LSB                     1
#define TX_FREEZE_CAPTURE_CHANNEL_0_RESERVED_MASK                    0xfffffffe


#endif // _TX_FREEZE_CAPTURE_CHANNEL_H_